| Commit message (Collapse) | Author | Age | Files | Lines |
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It is observed that the lid accelerator not apprears on the i2c bus which
causes the i2c master got NACK in multiple retries during the S5 (and G3)
to S0 power sequence. (i.e. [10106.692955 Lid Accel: 0: init failed: 1])
Learnt from the CL:1091211, refer to the CL:433338 as well, the patch is
similar to the delay option for suspend actions, provide a delay option
for the resume actions as well.
BRANCH=master
BUG=b:116170194
TEST=Examining EC console for KX022 init succeeds in S5->S3->S0 path
on octopus child boards w/ KX022.
(i.e. [10039.971601 Lid Accel: MS Done Init type:0x0 range:4])
Change-Id: Iae4f0fd1e6c46c1b7e12a202a517d8f3b3d82c40
Signed-off-by: Harry Pan <harry.pan@intel.com>
Reviewed-on: https://chromium-review.googlesource.com/1239974
Reviewed-by: Jett Rink <jettrink@chromium.org>
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The MAX14637 BC 1.2 USB charger detection chip is functionally similar
to the bq24392 and can use the same driver. Rather than have 2 copies
of the same driver, or a generic named driver than can be used for
both chips, rename the existing bq24392 driver to max14637 as that's
the BC 1.2 chip that our current designs are using.
BUG=b:113267982
BRANCH=none
TEST=make -j buildall
Change-Id: I03cfb4918513d756c2a41341001a8162652a29b6
Signed-off-by: Scott Collyer <scollyer@google.com>
Reviewed-on: https://chromium-review.googlesource.com/1250031
Commit-Ready: Scott Collyer <scollyer@chromium.org>
Tested-by: Scott Collyer <scollyer@chromium.org>
Reviewed-by: Edward Hill <ecgh@chromium.org>
Reviewed-by: Jett Rink <jettrink@chromium.org>
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All NPCX variants support PSL mode in hardware now; enable this at the
baseboard level.
This is adding support for Bobba; other boards are unaffected
BRANCH=none
BUG=b:115677776
TEST=bobba goes into PSL
Change-Id: I38974371b101c42841e4f11ba72b466415c754d9
Signed-off-by: Jett Rink <jettrink@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/1227050
Commit-Ready: ChromeOS CL Exonerator Bot <chromiumos-cl-exonerator@appspot.gserviceaccount.com>
Reviewed-by: Justin TerAvest <teravest@chromium.org>
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See go/usb-pd-slow-response-time for more information
BRANCH=none
BUG=b:112088135
TEST=CL stack on fleex and bobba consistently meet PD timing spec
Change-Id: I9eabf8de8d866f5a0af7d1daba5ab585b418d26c
Signed-off-by: Jett Rink <jettrink@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/1185729
Reviewed-by: Jonathan Brandmeyer <jbrandmeyer@chromium.org>
Reviewed-by: Diana Z <dzigterman@chromium.org>
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This converts the compile time option of
CONFIG_USB_PD_TCPM_TCPCI_MUX_ONLY into a runtime option to better
support draggon egg designs and reduce CONFIG complexity in general.
Introduce new mux_read/write to read from tcpc_config_t or mux driver
depending on new flag setting.
Audited all mux drivers for any use of tcpc_read/write and updated to
mux_read/write.
BRANCH=none
BUG=b:110937880
TEST=On Bip with CL stack:
Verified by connecting DP monitor at boot;
Verified plug / unplug of DP cable works;
Change-Id: I968893b886ff0ccc4074beae5ec42973814ae77c
Signed-off-by: Jett Rink <jettrink@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/1200062
Commit-Ready: Gaggery Tsai <gaggery.tsai@intel.corp-partner.google.com>
Reviewed-by: Scott Collyer <scollyer@chromium.org>
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All of the octopus board define the table mode option the same, so move
them into baseboard.
BRANCH=none
BUG=none
TEST=fleex still works
Change-Id: Ibed874a609a2e5947d7aee39f915dc3046a0cc19
Signed-off-by: Jett Rink <jettrink@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/1204700
Reviewed-by: Furquan Shaikh <furquan@chromium.org>
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All octopus boards should have this enabled by now. We are consolidating
this option in octopus baseboard.
This turns on DPTF on:
- Fleex
This turns on DPTP_DEVICE_ORIENTATION on:
- Bip
- Bobba
- Fleex
BRANCH=none
BUG=b:113348027
TEST=fleex has tablet mode icon
Change-Id: I0d25895785c6a8fcce25b3b6bf587b6030119045
Signed-off-by: Jett Rink <jettrink@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/1204699
Reviewed-by: Furquan Shaikh <furquan@chromium.org>
Reviewed-by: Justin TerAvest <teravest@chromium.org>
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Modify the USB charge mode setting.
SDP mode:
USB_A0_CHARGE_EN_L=High, USB_A1_CHARGE_EN_L=High
CDP mode:
USB_A0_CHARGE_EN_L=Low, USB_A1_CHARGE_EN_L=Low
BUG=b:112292707
BRANCH=none
TEST=Can detect the Pioneer BDR-XD06J-UHD and BDR-XS06T DVD rom
via USB port. And use the command "ectool gpioget" to check
the GPIO USB_A0_CHARGE_EN_L and USB_A0_CHARGE_EN_L the voltage
level is correct.
Change-Id: Ica5f3dae726adb82f5062bead3a7a73f566b5987
Signed-off-by: matt_wang <matt_wang@compal.corp-partner.google.com>
Reviewed-on: https://chromium-review.googlesource.com/1193562
Commit-Ready: Jett Rink <jettrink@chromium.org>
Tested-by: Jett Rink <jettrink@chromium.org>
Reviewed-by: Jett Rink <jettrink@chromium.org>
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This change increases the history buffer len for port80 messages to
256 bytes. It allows viewing all the port80 messages from a single
boot of AP.
BUG=None
BRANCH=None
TEST=Verified that all port80 messages from a single boot are present
when dumping port80 buffer.
Change-Id: I14b7dcd2258b72a4dd1f727cf6e9bcf8a53b3be9
Signed-off-by: Furquan Shaikh <furquan@google.com>
Reviewed-on: https://chromium-review.googlesource.com/1164578
Commit-Ready: Furquan Shaikh <furquan@chromium.org>
Tested-by: Furquan Shaikh <furquan@chromium.org>
Reviewed-by: Justin TerAvest <teravest@chromium.org>
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Octopus uses NPCX part with W25W80 SPI flash chip. This change selects
the right config option for the flash chip.
BUG=b:111735126
BRANCH=None
TEST=None
Change-Id: I1ab90ea47605d466b992c62ef13069c0f2422008
Signed-off-by: Furquan Shaikh <furquan@google.com>
Reviewed-on: https://chromium-review.googlesource.com/1152696
Commit-Ready: Furquan Shaikh <furquan@chromium.org>
Tested-by: Furquan Shaikh <furquan@chromium.org>
Reviewed-by: Scott Collyer <scollyer@chromium.org>
Reviewed-by: Jett Rink <jettrink@chromium.org>
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With the changes made to tcpci for alert handling and low power mode
entry, the anx7447 can operate with auto toggle and low power config
options.
BUG=b:77544959
BRANCH=none
TEST=Verfied that low power mode is entered when nothing is attached
and that when an adapter is attached it connects and when removed
returns to low power mode.
Change-Id: I8101d31a5271102c34ecc2ef326c36619825c7d4
Signed-off-by: Scott Collyer <scollyer@google.com>
Reviewed-on: https://chromium-review.googlesource.com/1044870
Commit-Ready: Scott Collyer <scollyer@chromium.org>
Tested-by: Scott Collyer <scollyer@chromium.org>
Reviewed-by: Furquan Shaikh <furquan@chromium.org>
Reviewed-by: Venkateswarlu Vinjamuri <venkateswarlu.v.vinjamuri@intel.corp-partner.google.com>
Reviewed-by: Jett Rink <jettrink@chromium.org>
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If the battery is booting from shipmode, it cannot provide power
hence check for the battery revive state and do not disable charge
ports instead assume the power source port as dedicated charge port
and remain in charge manager safe mode till the battery is
initialized and able to provide power.
1. Remove custom battery hardware present logic:
In case of booting from battery shipmode, though battery is
physically present it cannot provide power hence we need to prevent
auto-power on till the negotiated power is >=
CONFIG_CHARGER_MIN_POWER_MW_FOR_POWER_ON hence removed the custom
h/w present logic
2. Remove custom battery present logic
As we are using battery revive logic to remain in charge manager
safe mode till the battery is initialized, enabled logic to use the
physical battery GPIO for battery detection and removed the custom
battery present logic.
BUG=b:80299100, b:74427009, b:110438520
BRANCH=none
TEST=Manually tested on BIP
1. Battery can revive from shipmode
2. DUT can boot to S0 when no battery connected and from
shipmode battery, without pressing the power button
3. Deeply discharged battery is recovered and DUT booted
to OS without pressing the power button
Change-Id: I75378d5d70d07cea13ec775188ce17cb8fe9d9ae
Signed-off-by: Vijay Hiremath <vijay.p.hiremath@intel.com>
Reviewed-on: https://chromium-review.googlesource.com/1109443
Commit-Ready: Vijay P Hiremath <vijay.p.hiremath@intel.com>
Tested-by: Vijay P Hiremath <vijay.p.hiremath@intel.com>
Reviewed-by: Jett Rink <jettrink@chromium.org>
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This change enables EC deep sleep in S0, which should give a power
savings of about 20 mW when the system is idle.
BRANCH=none
BUG=b:78225493
TEST=with yorp: ran "ectool version" 50k times with feature enabled
and saw no errors, plugged board into keyboard, trackpad, and
screen to ensure no apparent lag or keystroke loss occurred, ran
faft_ec suite and verified pass/fail rate was the same as without
feature
Change-Id: Ib943ea098acf47d989f6b0d229c72b4982ffc4cb
Signed-off-by: Diana Z <dzigterman@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/1115466
Reviewed-by: Jett Rink <jettrink@chromium.org>
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BRANCH=none
BUG=b:79872754
TEST=On yorp:FAFT test firmware_ECUsbPorts passes
Change-Id: Ib1316ebc4716d5fdd24bafda0bb2a84157347da7
Signed-off-by: Shaunak Saha <shaunak.saha@intel.com>
Signed-off-by: Divya Sasidharan <divya.s.sasidharan@intel.com>
Reviewed-on: https://chromium-review.googlesource.com/1077592
Commit-Ready: Divya Sasidharan <divya.s.sasidharan@intel.corp-partner.google.com>
Tested-by: Divya Sasidharan <divya.s.sasidharan@intel.corp-partner.google.com>
Reviewed-by: Jett Rink <jettrink@chromium.org>
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Hardware does not support ADCs for Vbus anymore for
all boards except bip. Make bip the same as other octopus
boards (i.e. not using ADCs for Vbus measurements).
BRANCH=none
BUG=b:109747036
TEST=CL stack works with current yorp
Change-Id: I96b82b70799e8b70bf5d479a1714524fc1652140
Signed-off-by: Jett Rink <jettrink@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/1089199
Reviewed-by: Furquan Shaikh <furquan@chromium.org>
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Move fuel gauge code to common to avoid duplication in octopus and
grunt baseboards.
BUG=b:79704826,b:74018100
BRANCH=none
TEST=make -j buildall
Change-Id: I58a615c9ed7906cb19b49c2baa36aaa619838cf1
Signed-off-by: Edward Hill <ecgh@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/1072637
Commit-Ready: ChromeOS CL Exonerator Bot <chromiumos-cl-exonerator@appspot.gserviceaccount.com>
Reviewed-by: Furquan Shaikh <furquan@chromium.org>
Reviewed-by: Vijay Hiremath <vijay.p.hiremath@intel.corp-partner.google.com>
Reviewed-by: Jett Rink <jettrink@chromium.org>
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Enable PWM control of backlight in EC for yorp and phaser. Proto build
of bip will not have backlight control in EC.
BRANCH=none
BUG=b:79422226
TEST=none (no hardware to test with)
Change-Id: Ib6ed4af4de3145b112ed43b4ca1ec9f931f3875f
Signed-off-by: Jett Rink <jettrink@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/1050785
Reviewed-by: Justin TerAvest <teravest@chromium.org>
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Convert all boards that use both CONFIG_ESPI and CONFIG_LPC to only use
the CONFIG_HOSTCMD_ESPI option.
BRANCH=none
BUG=chromium:818804
TEST=entire stack works with lpc and espi
Change-Id: Idd1519494a4f880b7b2018d059579d50c5461fcf
Signed-off-by: Jett Rink <jettrink@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/1067499
Reviewed-by: Randall Spangler <rspangler@chromium.org>
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To enable device mode, set the gpio USB2_OTG_ID
in the respective boards to high.
Pull the gpio low to disable device mode.
BUG=b:79343083
BRANCH=NONE
TEST=On Yorp board, for UFP mode gpio USB2_OTG_ID should be high,
for DFP mode gpio USB2_OTG_ID should be low.
In OS console, lspci should list xdci.
(with chromiumos/third_party/coreboot/+/1064592)
Change-Id: I70f13a9705626d9bcbe989239f6826d35d8fa536
Signed-off-by: Jagadish Krishnamoorthy <jagadish.krishnamoorthy@intel.com>
Reviewed-on: https://chromium-review.googlesource.com/1058832
Reviewed-by: Jett Rink <jettrink@chromium.org>
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Enable trackpad when entering S3, and display backlight when entering S0
and disable them on the opposite transition. Moving common code to
baseboard.
BRANCH=none
BUG=b:79900266
TEST=bip trackpad works in S3 as wake source. backlight turns off in
S0ix and S3.
Change-Id: I0937771093d87c020b3c0d94a482d108c5a5c180
Signed-off-by: Jett Rink <jettrink@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/1064693
Reviewed-by: Furquan Shaikh <furquan@chromium.org>
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Adding this config so that battery_get_disconnect_state() is called
directly as a condition in prevent_power_on instead of having this be
a condition battery_is_present. This change allows precharge current
to be sent to the battery when the battery is dead or recovering from
battery cutoff condition.
BRANCH=none
BUG=b:79133101
TEST=tested on Yorp and verfied that in both dead battery and battery
cutoff cases, the battery wakes up as expected.
Change-Id: Iefec578dd241ddb832630ffa2530ba7c631f9a96
Signed-off-by: Scott Collyer <scollyer@google.com>
Reviewed-on: https://chromium-review.googlesource.com/1053096
Commit-Ready: Scott Collyer <scollyer@chromium.org>
Tested-by: Scott Collyer <scollyer@chromium.org>
Reviewed-by: Furquan Shaikh <furquan@chromium.org>
Reviewed-by: Jett Rink <jettrink@chromium.org>
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The ITE TCPC driver does not current support drp_toggle and so can't
have these config options defined. The driver method for drp_toggle is
set to NULL which causes the EC to reboot when power button is pressed
as that calls drp_toggle in the chipset hook.
BRANCH=none
BUG=b:79637786
TEST=Verfied that with these config options not defined the EC no
longer reboots when power button is pressed.
Change-Id: I08e27bb2541bac4fac52411d9c01a366b8874379
Signed-off-by: Scott Collyer <scollyer@google.com>
Reviewed-on: https://chromium-review.googlesource.com/1059580
Commit-Ready: Scott Collyer <scollyer@chromium.org>
Tested-by: Scott Collyer <scollyer@chromium.org>
Reviewed-by: Furquan Shaikh <furquan@chromium.org>
Reviewed-by: Jett Rink <jettrink@chromium.org>
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Move driver configuration to baseboard in preparation for phaser board
BRANCH=none
BUG=none
TEST=yorp still works
Change-Id: Ifeb434d2d4103160acd6eb9f784533d1ae0ae35a
Signed-off-by: Jett Rink <jettrink@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/1042729
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-by: Furquan Shaikh <furquan@chromium.org>
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The `make BOARD=yorp print-configs` and bip version
show no diff before and after this change.
BRANCH=none
BUG=none
TEST=verify the print-configs output does not change.
Change-Id: If2cdc39b685f529ece707b9831052daf58e91dfa
Signed-off-by: Jett Rink <jettrink@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/1038898
Reviewed-by: Furquan Shaikh <furquan@chromium.org>
Reviewed-by: Vijay Hiremath <vijay.p.hiremath@intel.corp-partner.google.com>
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This CL introduces /baseboard to the EC project which can contain
config options and code which is specific to certain family, but can
be shared among the board derivatives of that family. Only the
infrastructure changes are included with an empty baseboard.c/.h for
octopus.
BRANCH=none
BUG=b:74358864
TEST='make buildall' and ensure that all boards build successfully. In
addition, temporarily moved config options for USB-C and charger to
baseboard.h and tested that 'make BOARD=yorp' is successful.
Change-Id: I16656574f835c56598a9d2bf49bc1e946d71fe76
Signed-off-by: Scott Collyer <scollyer@google.com>
Reviewed-on: https://chromium-review.googlesource.com/954444
Commit-Ready: Scott Collyer <scollyer@chromium.org>
Tested-by: Scott Collyer <scollyer@chromium.org>
Reviewed-by: Furquan Shaikh <furquan@chromium.org>
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
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