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* driver/tcpm/it83xx: Enable TCPC receive SOP'Ruibin Chang2019-08-211-4/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | Enable TCPC receive SOP' for communication with cable, when we are Vconn source role. BUG=None BRANCH=None TEST=test on board: ampton and reef_it8320 1.SRC connects to SNK via E-mark cable, sources Vconn successfully, and receives cable's ack of discover id request. 2.SRC connects to SNK via E-mark cable, but not source Vconn to cable, and receives nothing of discover id request (this isn't effect on request SNK flow). 3.console cmd pdcable 0 2019-07-30 11:43:40 > pdcable 0 2019-07-30 11:43:45 Cable Type: Passive 2019-07-30 11:43:45 Connector Type: Type C 2019-07-30 11:43:45 Cable Current: 5A 2019-07-30 11:43:45 USB Superspeed Signaling support: Gen 1 Change-Id: Icd2e6f8481bb7a4e0b922460d46b831f36112738 Signed-off-by: Ruibin Chang <Ruibin.Chang@ite.com.tw> Signed-off-by: Vijay Hiremath <vijay.p.hiremath@intel.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1728669 Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org>
* octopus: reduce USB-C source current to 1.5Alu.zhang2019-08-131-1/+0
| | | | | | | | | | | | | | | | octopus hardware does not support sourcing 3A over USB-C and 1.5A over USB-A at the same time for any daughter board. Reduce what we advertise to 1.5A. BRANCH=none BUG=b:139110010,b:139201733 TEST=connect a sink device with a pd analyzer to see if source capabilities is 5V/1.5A Change-Id: Idad7a11b28cefda1aabbca540864a6248d826a47 Signed-off-by: Jett Rink <jettrink@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1741597 Reviewed-by: Edward Hill <ecgh@chromium.org>
* Remove __7b, __8b and __7bfDenis Brockus2019-07-203-11/+11
| | | | | | | | | | | | | | | | | | | The extentions were added to make the compiler perform most of the verification that the conversion was being done correctly to remove 8bit addressing as the standard I2C/SPI address type. Now that the compiler has verified the code, the extra extentions are being removed BUG=chromium:971296 BRANCH=none TEST=make buildall -j TEST=verify sensor functionality on arcada_ish Change-Id: I36894f8bb9daefb5b31b5e91577708f6f9af2a4f Signed-off-by: Denis Brockus <dbrockus@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1704792 Reviewed-by: Jack Rosenthal <jrosenth@chromium.org>
* baseboard: octopus: Guard sensor configurations with variantYuval Peress2019-07-201-0/+2
| | | | | | | | | | | | | | The octopus baseboard should only declare the sensor CONFIG_ values if we didn't define the NO_SENSORS variant BUG=b:137758297 BRANCH=None TEST=buildall Change-Id: I32443f08ee7d1412b425bd55c8c40d67f22ef089 Signed-off-by: Yuval Peress <peress@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1706687 Reviewed-by: Enrico Granata <egranata@chromium.org>
* Use 7bit I2C/SPI slave addresses in ECDenis Brockus2019-07-193-11/+11
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Opt for 7bit slave addresses in EC code. If 8bit is expected by a driver, make it local and show this in the naming. Use __7b, __7bf and __8b as name extensions for i2c/spi addresses used in the EC codebase. __7b indicates a 7bit address by itself. __7bf indicates a 7bit address with optional flags attached. __8b indicates a 8bit address by itself. Allow space for 10bit addresses, even though this is not currently being used by any of our attached devices. These extensions are for verification purposes only and will be removed in the last pass of this ticket. I want to make sure the variable names reflect the type to help eliminate future 7/8/7-flags confusion. BUG=chromium:971296 BRANCH=none TEST=make buildall -j Change-Id: I2fc3d1b52ce76184492b2aaff3060f486ca45f45 Signed-off-by: Denis Brockus <dbrockus@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1699893 Reviewed-by: Jack Rosenthal <jrosenth@chromium.org>
* cleanup: Segregate USB MUX related drivers in usb_mux folderVijay Hiremath2019-07-171-1/+1
| | | | | | | | | | | BUG=none BRANCH=none TEST=make buildall -j Change-Id: If44a363d1288cbfabe5c6545e550f2b8fc623227 Signed-off-by: Vijay Hiremath <vijay.p.hiremath@intel.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1700793 Reviewed-by: Jett Rink <jettrink@chromium.org>
* intel_x86/power: Consolidate chipset specific power signals arrayVijay Hiremath2019-06-132-37/+0
| | | | | | | | | | | | | | | Currently chipset specific power signals are defined at board/baseboard level. These power signals are moved to chipset specific file to minimize the redundant power signals array defined for each board/baseboard. BUG=b:134079574 BRANCH=none TEST=make buildall -j Change-Id: I351904f7cd2e0f27844c0711beb118d390219581 Signed-off-by: Vijay Hiremath <vijay.p.hiremath@intel.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1636837 Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
* TCPC: Make tcpc_config handle other bus typesDaisuke Nojiri2019-06-102-11/+17
| | | | | | | | | | | | | | | | | | | | | Currently, tcpc_config assumes TCPCs are on I2C bus. ITE's EC has an embedded TCPC. This patch adds bus_type field to struct tcpc_config_t so that a TCPC location on other type of bus can be specified. Signed-off-by: Daisuke Nojiri <dnojiri@chromium.org> BUG=none BRANCH=none TEST=buildall Change-Id: Ieac733011700b351e6323f46070dcf46d9e1154b Reviewed-on: https://chromium-review.googlesource.com/1640305 Commit-Ready: Daisuke Nojiri <dnojiri@chromium.org> Tested-by: Daisuke Nojiri <dnojiri@chromium.org> Legacy-Commit-Queue: Commit Bot <commit-bot@chromium.org> Reviewed-by: Jett Rink <jettrink@chromium.org>
* Casta: Increase board_hibernate() wait to avoid hard resetsDiana Z2019-05-221-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | When hibernating with AC plugged in, casta will try negotiating down to 5V. This negotiation may sometimes take longer than the currently allocated sleep, causing the port partner to go into error recovery (re-sending PS_RDY, followed by soft resets, followed by a hard reset). This hard reset will wake the system back up from hibernation. Increasing this sleep to 300 ms appears to give enough time for a GoodCRC to be send to the PS_RDY message from the charger, avoiding the hard reset. Note that hibernating on AC is not a customer or factory requirement, as the typical EC hibernate scenario is when there is no external power and the battery needs to be conserved. BRANCH=octopus BUG=b:130687403 TEST=flashed to casta EVT, ran hibernate key sequence several times with AC plugged in and verified system hibernated Change-Id: Ia40ee63f3cf9a244ba35b4cc700e2b41eea1dde5 Signed-off-by: Diana Z <dzigterman@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/1584768 Tested-by: YongBeum Ha <ybha@samsung.com> Legacy-Commit-Queue: Commit Bot <commit-bot@chromium.org> Reviewed-by: Jett Rink <jettrink@chromium.org> Reviewed-by: YongBeum Ha <ybha@samsung.com>
* octopus: Support keypad function on BobbaSue Chen2019-05-211-0/+5
| | | | | | | | | | | | | | | | | | | | | | | 1. Using CONFIG_KEYBOARD_KEYPAD to choose actual_key_mask w or w/o keypad. 2. Enable keypad function on Bobba. 3. Disable scan KSO13 & 14 and modify actual_key_mask for SKU w/o keypad on Bobba. 4. taking care define of TEST_BUILD to prevent broke build since keyboard_cols from keyboard_scan.c is not in test-list-y yet. BUG=b:131095327 BRANCH=octopus TEST=`make buildall` and `make BOARD=bobba tests` both PASS Signed-off-by: Sue Chen <sue.chen@quanta.corp-partner.google.com> Change-Id: I0e98a8f60bf5022503b4a86ee8a5b2bbba3b3825 Reviewed-on: https://chromium-review.googlesource.com/1610390 Commit-Ready: Marco Chen <marcochen@chromium.org> Commit-Ready: David Huang <David.Huang@quantatw.com> Tested-by: Sue Chen <sue.chen@quanta.corp-partner.google.com> Legacy-Commit-Queue: Commit Bot <commit-bot@chromium.org> Reviewed-by: Marco Chen <marcochen@chromium.org> Reviewed-by: Sue Chen <sue.chen@quanta.corp-partner.google.com>
* Revert "octopus: Support keypad function on Bobba"Justin TerAvest2019-05-101-5/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This reverts commit 73312c0f227d0b21d5ffa788caa4579c82c78731. Reason for revert: broke build Original change's description: > octopus: Support keypad function on Bobba > > 1. Using CONFIG_KEYBOARD_KEYPAD to choose actual_key_mask w or w/o keypad. > 2. Enable keypad function on Bobba. > 3. Disable scan KSO13 & 14 and modify actual_key_mask for SKU w/o keypad on > Bobba. > > BUG=b:131095327 > BRANCH=octopus > TEST=make buildall > > Change-Id: I33ea85ec3966b4bba64b2a5aa11f186b5b92c52b > Signed-off-by: Sue Chen <sue.chen@quanta.corp-partner.google.com> > Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1600944 > Reviewed-by: Marco Chen <marcochen@chromium.org> > Reviewed-by: Diana Z <dzigterman@chromium.org> Bug: b:131095327 Change-Id: Ic5228fb5047b6c3a6a05b9e8ce9e47677758c2e2 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1606072 Reviewed-by: Justin TerAvest <teravest@chromium.org> Commit-Queue: Justin TerAvest <teravest@chromium.org> Tested-by: Justin TerAvest <teravest@chromium.org>
* octopus: Support keypad function on BobbaSue Chen2019-05-101-0/+5
| | | | | | | | | | | | | | | | | 1. Using CONFIG_KEYBOARD_KEYPAD to choose actual_key_mask w or w/o keypad. 2. Enable keypad function on Bobba. 3. Disable scan KSO13 & 14 and modify actual_key_mask for SKU w/o keypad on Bobba. BUG=b:131095327 BRANCH=octopus TEST=make buildall Change-Id: I33ea85ec3966b4bba64b2a5aa11f186b5b92c52b Signed-off-by: Sue Chen <sue.chen@quanta.corp-partner.google.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1600944 Reviewed-by: Marco Chen <marcochen@chromium.org> Reviewed-by: Diana Z <dzigterman@chromium.org>
* Octopus: Allow power role swap to sink in S0ixDiana Z2019-05-021-4/+9
| | | | | | | | | | | | | | | | | | | | | | | Currently, if a hub is plugged in during S0 and a system is suspended to S0ix, we will reject any requests from that hub to power role swap if it becomes powered (note this is not a concern for S5, when we will disconnect a sinking partner, so on becoming powered the hub would start a new connection). This change allows role swaps if we are currently sourcing a partner who could be providing us power instead. BUG=b:131267739 BRANCH=octopus TEST=plugged in unpowered 3-in-1 dongle to casta in S0, closed the lid to trigger S0ix, plugged in power to the dongle and saw power role swap was accepted Change-Id: I1a25372c681a06681abb28c58b96f73e9416404e Signed-off-by: Diana Z <dzigterman@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/1585121 Reviewed-by: Jett Rink <jettrink@chromium.org> Reviewed-by: Edward Hill <ecgh@chromium.org>
* common: led_onoff_states: move forward baseboard led_state to common codeDevin Lu2019-04-204-318/+1
| | | | | | | | | | | | | | | | | Now we have led_onoff_states instead of led_state of baseboard, to avoid duplicate file so move forward to common code. BUG=b:126460269 BRANCH=none TEST=make buildall -j, make sure led behavior on meep intended as well. Change-Id: I3adf20ebf2efd2f02b1ae101faf1c36f2f5ed454 Signed-off-by: Devin Lu <Devin.Lu@quantatw.com> Reviewed-on: https://chromium-review.googlesource.com/1556869 Commit-Ready: ChromeOS CL Exonerator Bot <chromiumos-cl-exonerator@appspot.gserviceaccount.com> Reviewed-by: Marco Chen <marcochen@chromium.org> Reviewed-by: Paul Fagerburg <pfagerburg@chromium.org> Reviewed-by: Diana Z <dzigterman@chromium.org>
* tcpm: Refactor tcpc_config to include a flags fieldScott Collyer2019-04-172-5/+10
| | | | | | | | | | | | | | | | | | | | | | | | tcpc_config contained a field for both the alert polarity and open drain/push pull configuration. There is also a possible difference in TCPC reset polarity. Instead of adding yet another field to describe this configuration, it would be better to convert alert polairty, open drain and reset polarity into a single flags field. This CL modifies the tcpc_config struct to use a single flags field and adds defines for what existing flag options can be. BUG=b:130194031 BRANCH=none TEST=make -j buildall Change-Id: Ifb7e7604edb7021fb2d36ee279049eb52fefc99e Signed-off-by: Scott Collyer <scollyer@google.com> Signed-off-by: Furquan Shaikh <furquan@google.com> Reviewed-on: https://chromium-review.googlesource.com/1551581 Commit-Ready: Furquan Shaikh <furquan@chromium.org> Tested-by: Furquan Shaikh <furquan@chromium.org> Reviewed-by: Jett Rink <jettrink@chromium.org> Reviewed-by: Paul Fagerburg <pfagerburg@chromium.org>
* bip: Delete boardEvan Green2019-04-021-1/+1
| | | | | | | | | | | | | | | | | | | | | | bip has an it8320bx with 256kB of flash space. After dividing by two and subtracting 0x800, this means the RO section of bip is 126kB. This is very tight. We've already removed a few commands to free up space, but this board hasn't been worked on since summer 2018. Delete it to avoid excessive maintenance burden. BUG=b:129283539 BRANCH=none TEST=make -j buildall CQ-DEPEND=CL:1538819,CL:*1086038 Signed-off-by: Evan Green <evgreen@chromium.org> Change-Id: Iac903397dd653c8e012c8b3956807ba1bacf681e Reviewed-on: https://chromium-review.googlesource.com/1536490 Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org> Reviewed-by: Karthikeyan Ramasubramanian <kramasub@chromium.org> Reviewed-by: Jett Rink <jettrink@chromium.org>
* mkbp_event,include/config.h: Clarify MKBP delivery method.Yilun Lin2019-03-071-1/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Now we have two MKBP delivery methods: 1. define CONFIG_MKBP_USE_HOST_EVENT to notify via host event 2. undef CONFIG_MKBP_USE_HOST_EVENT to notify via GPIO interrupt It may become more complicated if new notification methods introduced. e.g.: mt_scp uses IPI, rather than host event and GPIO interrupt. This CL does: 1. add CONFIG_MKBP_USE_GPIO to explicilty declare that MKBP event are sent via GPIO interrupt. 2. CONFIG_MKBP_USE_CUSTOM for boards which have custmized methods. 3. Remove weak attribute in mkbp_set_host_active (which can be done with CONFIG_MKBP_USE_CUSTOM now. 4. Removes mkbp_set_host_active function in board Nocturne. It only deliver MKBP events through GPIO interrupt now. BRANCH=None BUG=b:120808999 TEST=grep -rn "CONFIG_MKBP_USE_GPIO\|EC_INT_L" board/ baseboard/ and see the result is reasonable: 1. EC_INT_L must be 1-to-1 mapped to define CONFIG_MKBP_USE_GPIO in every board, except that meep, yorp, ampton which are defined in baseboard octopus. 2. undef CONFIG_MKBP_USE_GPIO in bip and casta, which use host event, but also have baseboard octopus. Change-Id: I4af6110e4fd3c009968075c3623ef2d91cbd770b Signed-off-by: Yilun Lin <yllin@google.com> Reviewed-on: https://chromium-review.googlesource.com/1490794 Commit-Ready: Jett Rink <jettrink@chromium.org> Tested-by: Yilun Lin <yllin@chromium.org> Reviewed-by: Furquan Shaikh <furquan@chromium.org> Reviewed-by: Jett Rink <jettrink@chromium.org>
* Casta: Tune USB mux registersDiana Z2019-02-141-0/+10
| | | | | | | | | | | | | | | | | | Casta is currently having issues with its Rx measurement on port 0. With this change, the mux registers on the PS8751 for port 0 should be tuned every time the TCPC comes out of low power mode. BUG=b:122987819 BRANCH=octopus TEST=builds, loaded onto casta and confirmed register 0xE7 read 0x40 from the ec console Change-Id: Ieb884eeaddc418f97ace69b9db0041d50fe2b5d9 Signed-off-by: Diana Z <dzigterman@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/1430953 Commit-Ready: YongBeum Ha <ybha@samsung.com> Tested-by: YongBeum Ha <ybha@samsung.com> Reviewed-by: Jett Rink <jettrink@chromium.org>
* Fleex: Add new LED state for fully charged in S5Diana Z2019-01-282-3/+24
| | | | | | | | | | | | | | | | | | | This change adds another battery LED state to represent a fully charged system in S5, so that fleex systems can have their LED off when this occurs. This state will be optional, and the state machine will fall back to using the previously defined FULL_CHARGE state if this new state is not defined. BUG=b:122636016 BRANCH=octopus TEST=flashed orbatrix and ensured LED went off in S5 after EC reported it was charged, flashed another octopus board to ensure it didn't regress Change-Id: I0265b268818e7f1ec20339afe5cf3544c882926b Signed-off-by: Diana Z <dzigterman@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/1419477 Reviewed-by: Jett Rink <jettrink@chromium.org>
* Ampton: Set the PS8751 to source mode before enter low power modeJames_Chao2019-01-251-1/+1
| | | | | | | | | | | | | BUG=b:113830171 BRANCH=octopus TEST=check the power consumption is lower Change-Id: I527cdc5d1e4dd5de137ab0927e66c171696758ce Signed-off-by: James_Chao <james_chao@asus.corp-partner.google.com> Reviewed-on: https://chromium-review.googlesource.com/1426306 Commit-Ready: James Chao <james_chao@asus.corp-partner.google.com> Tested-by: James Chao <james_chao@asus.corp-partner.google.com> Reviewed-by: Jett Rink <jettrink@chromium.org>
* octopus/ampton: disable espi pad when system goes into G3Dino Li2019-01-241-0/+20
| | | | | | | | | | | | | | | | | | On Ampton, the EC's power consumption is about 5.5mA on battery mode in G3 state. This is because EC unable to go into low power mode properly in idle task when eSPI CS# pin is low. So we disable eSPI pad when system goes into G3 state to reduce power number. BUG=b:121105042 BRANCH=none TEST=On Ampton, EC power rail drops to about 1.1mA in G3. Signed-off-by: Dino Li <Dino.Li@ite.com.tw> Change-Id: I1c85bd0e909936e7f143b15b5e9b7c1884d5cc62 Reviewed-on: https://chromium-review.googlesource.com/1426304 Reviewed-by: Furquan Shaikh <furquan@chromium.org> Reviewed-by: Jett Rink <jettrink@chromium.org>
* octopus: convert boards to use hardware intJett Rink2019-01-101-0/+7
| | | | | | | | | | | | | | | | | | Recent kernel changes expect the EC to use a dedicated interrupt pin from the EC to the AP to notify the AP of pending sensor data (instead of using an eSPI "interrupt"). The octopus boards have this hardware support, we just need to enable the EC use it. BRANCH=octopus BUG=b:122552125,b:120679547 TEST=perform sensor tests on various octopus boards Change-Id: I2bd3ffe14947d5f1ec71acbb53fcac962b007cf9 Signed-off-by: Jett Rink <jettrink@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/1403103 Reviewed-by: Enrico Granata <egranata@chromium.org>
* octopus: reduce all octopus sensor fifo sizesJett Rink2019-01-051-0/+10
| | | | | | | | | | | | | | | | Too large of a FIFO causes jitter in the sensor timestamp which can cause issues during batch CTS tests. BRANCH=octopus BUG=b:120508077 TEST=everything builds. Test with smaller fifo were done on bobba. See CL:1387348 Change-Id: If67a46faa6e136006a20ac243b826b7ce06d9868 Signed-off-by: Jett Rink <jettrink@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/1392425 Commit-Ready: ChromeOS CL Exonerator Bot <chromiumos-cl-exonerator@appspot.gserviceaccount.com> Reviewed-by: Karthikeyan Ramasubramanian <kramasub@chromium.org>
* Octopus: remove keyboard backlight enable defaultDiana Z2019-01-031-2/+0
| | | | | | | | | | | | | | | | | | | So far, no octopus boards are actually using the keyboard backlight stuffing option. This change removes the config from being the default, and frees up about 1.8 kB of flash space on the boards. For any future boards wishing to use the backlight, the two configs can be moved into their individual board.h files. BUG=None BRANCH=octopus TEST=builds, bobba360 boots with no issue Change-Id: I0e2184b8decfa2a274569f8e863a2c59b59dbd63 Signed-off-by: Diana Z <dzigterman@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/1383196 Commit-Ready: ChromeOS CL Exonerator Bot <chromiumos-cl-exonerator@appspot.gserviceaccount.com> Reviewed-by: Jett Rink <jettrink@chromium.org>
* Octopus: correct keyboard backlight flagsstabilize-atlas.11448.BDiana Z2018-12-201-1/+3
| | | | | | | | | | | | | | | Since we're allowing deep sleep on the NPCX EC in the S0 power state, the keyboard backlight should be configured to stay on during sleep in order to prevent it from flashing. BRANCH=octopus BUG=None TEST=builds Change-Id: I1f41b9b00e2808520e773497991d389d23bf25fb Signed-off-by: Diana Z <dzigterman@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/1383195 Reviewed-by: Jett Rink <jettrink@chromium.org>
* Octopus: add mux reset when applicableDiana Z2018-12-121-5/+12
| | | | | | | | | | | | | | | | | The ITE based octopus boards have a PS8751 acting as a USB mux on at least one port. Since these boards have GPIOs hooked up to the PS8751 reset pin(s), we should reset the chips on startup. This should help in rare error cases, for example if the chip is hung up. BUG=b:120087080 BRANCH=octopus TEST=loaded onto apel board version 0, ran several EC reboots and verified the DB USB-C and USB-A ports functioned well Change-Id: I04279e5e12996deedf4d22b2be2aa2f9909f4852 Signed-off-by: Diana Z <dzigterman@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/1372028 Reviewed-by: Jett Rink <jettrink@chromium.org>
* octopus: remove unused TCPC re-driver power codeJett Rink2018-12-101-78/+0
| | | | | | | | | | | | | | | | | | | | | | | | We had a hardware revision that used GPIO03 from the PS8751 as the enable signal for the TypeA USB re-driver power regulator. This prove to not work especially when the TCPC came back from low power mode. The hardware change has been reverted and now we are removing the firmware support for this change. BRANCH=octopus BUG=b:111406013,b:117656946 TEST=builds. Version 2.24 (released 10/30) of sub-board schematics mark the stuffing options to have the TCPC control the power as DNS. Version 2.2 was never officially released that had the faulty hardware circuit. Only a single spin of sub-boards had this circuit and they have been reworked. Change-Id: Ib7f5a369af26a83fb71ef7e27f52086a4aed9c0c Signed-off-by: Jett Rink <jettrink@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/1366295 Commit-Ready: ChromeOS CL Exonerator Bot <chromiumos-cl-exonerator@appspot.gserviceaccount.com> Reviewed-by: Tom Sliva <tsliva@google.com> Reviewed-by: Diana Z <dzigterman@chromium.org>
* baseboard/octopus: Enable CONFIG_BOARD_HAS_RTC_RESETKarthikeyan Ramasubramanian2018-12-052-0/+8
| | | | | | | | | | | | | | | | | | | Add a helper function to reset the RTC using EC_PCH_RTCRST GPIO. Enable the config to use the hardware support to reset the RTC. BUG=b:119678692 BRANCH=octopus TEST=make -j buildall && Boot to ChromeOS. Create a forced scenario to trigger an RTC reset and ensure that EC does not get reset while the SoC boots to ChromeOS. Execute warm reboot from AP, cold reboot from EC and wake from ec hibernate (10 iterations each) and suspend_stress_test for 50 iterations successfully. Change-Id: I5eb1025cdaa62098de0250640788921621829cd1 Signed-off-by: Karthikeyan Ramasubramanian <kramasub@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/1354494 Reviewed-by: Furquan Shaikh <furquan@chromium.org> Reviewed-by: Jett Rink <jettrink@chromium.org>
* Ampton: change the port0 mux to PS8751James_Chao2018-12-033-5/+7
| | | | | | | | | | | | | | | | | Due to the DP measurement eye-diagram and pre-emphasize fail, we change the mux to PS8751 on the type-c port in mainboard. BUG=b:118728290,b:119840612 BRANCH=octopus TEST=FAFT pass and check the mux function working on EVT. Change-Id: I1817686f09f6aa9a557907b279ab61c889335d9e Signed-off-by: James_Chao <james_chao@asus.corp-partner.google.com> Reviewed-on: https://chromium-review.googlesource.com/1343642 Commit-Ready: James Chao <james_chao@asus.corp-partner.google.com> Tested-by: James Chao <james_chao@asus.corp-partner.google.com> Reviewed-by: Jett Rink <jettrink@chromium.org> Reviewed-by: Diana Z <dzigterman@chromium.org>
* Octopus: allow data role swapping in RODiana Z2018-12-031-11/+3
| | | | | | | | | | | | | | | | | | | | Since we keep our data role in the BBRAM flags now, it should be safe to allow the EC to perform a data roll swap in RO. This change primarily affects unlocked systems which allow PD communication in RO, and especially affects developers who have software sync disabled and use powered usb dongles for display. BRANCH=octopus BUG=b:116764439 TEST=disabled software sync on a bobba360 and confirmed a powered hub could reliably display, enabled software sync and put the EC into hibernate, waking it with a powered hub, confirming data role swap in RO had no adverse affects or hard resets Change-Id: If56e408afa17c8c9eeeb033d977c25710390fe32 Signed-off-by: Diana Z <dzigterman@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/1355371 Reviewed-by: Jett Rink <jettrink@chromium.org>
* octopus: remove OCM erase commandJett Rink2018-11-291-1/+0
| | | | | | | | | | | | | | We haven't need the OCM erase command for anlogix TCPCs for a while since they are being shipped with the OCM pre-erased BRANCH=octopus BUG=b:109882250 TEST=buildall Change-Id: Ic4d2fa1e40037e01d5ed03116e8ceb14840f0ea9 Signed-off-by: Jett Rink <jettrink@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/1352057 Commit-Ready: ChromeOS CL Exonerator Bot <chromiumos-cl-exonerator@appspot.gserviceaccount.com>
* tablet_mode: Introduce hall sensor specific handlingFurquan Shaikh2018-11-291-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This change performs the following renaming: 1. CONFIG_TABLET_SWITCH -> CONFIG_HALL_SENSOR Indicates if a device has hall sensor 2. TABLET_MODE_GPIO_L -> HALL_SENSOR_GPIO_L Provides the interrupt line from hall sensor to EC. 3. tablet_mode_isr -> hall_sensor_isr Interrupt routine that gets control on hall sensor interrupt. 4. tablet_mode_init -> hall_sensor_init Init routine for initializing hall sensor interrupt. 5. tablet_switch_disable -> hall_sensor_disable Disable hall sensor interrupt and tablet mode sub-system. This is done to separate hall sensor interrupt from tablet mode handling. It is another step towards aligning tablet mode detection on EC with Chrome. Hall sensor interrupt occurs when the lid is in 360-degree flipped mode. If tablet mode is not already triggered by lid motion driver, then hall_sensor_isr will set tablet mode and take necessary actions to disable input peripherals. CQ-DEPEND=CL:1351518 BUG=b:120050761 BRANCH=octopus TEST=make -j buildall Change-Id: I5841f6875d538a624cb888bc048f252397ab457c Signed-off-by: Furquan Shaikh <furquan@google.com> Reviewed-on: https://chromium-review.googlesource.com/1350469 Commit-Ready: Furquan Shaikh <furquan@chromium.org> Tested-by: Furquan Shaikh <furquan@chromium.org> Reviewed-by: Aaron Durbin <adurbin@chromium.org> Reviewed-by: Jett Rink <jettrink@chromium.org>
* Casta: initial EC imageDiana Z2018-11-273-13/+51
| | | | | | | | | | | | | Initial image for casta based on the most recent schematics available. BUG=b:119174492 BRANCH=octopus TEST=builds Change-Id: Ie0575476d79fd8f6c5f697499bc8a660880348e3 Signed-off-by: Diana Z <dzigterman@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/1347011 Reviewed-by: Jett Rink <jettrink@chromium.org>
* ocotpus: move VBUS_ADC config to baseJett Rink2018-11-192-1/+13
| | | | | | | | | | | | | | | | All boards but yorp have added the ADC hardware support back for VBUS ADC measurements. Move code to common baseboard BRANCH=none BUG=none TEST=ADC measurements still works on phaser and fleex Change-Id: I36a7ba92df21de4c1188613c6a12da83fdba6eb6 Signed-off-by: Jett Rink <jettrink@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/1337456 Commit-Ready: ChromeOS CL Exonerator Bot <chromiumos-cl-exonerator@appspot.gserviceaccount.com> Reviewed-by: Karthikeyan Ramasubramanian <kramasub@chromium.org> Reviewed-by: Diana Z <dzigterman@chromium.org>
* octopus: ignore C0 interrupts if in resetJett Rink2018-11-161-2/+5
| | | | | | | | | | | | | | Now that we have a reset line to C0, we should ignore interrupts while the C0 TCPC is in reset. BRANCH=none BUG=none TEST=flashed on fleex (uses C0 reset) without issue Change-Id: I014e95f80844b30623d1fba7e59bea8f5eb8572e Signed-off-by: Jett Rink <jettrink@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/1332807 Reviewed-by: Diana Z <dzigterman@chromium.org>
* cleanup: updating grunt & octopus style to matchJett Rink2018-11-141-4/+11
| | | | | | | | | | | | | | | | Making style of tcpc_alert_event method match the style of other ToT implementations. BRANCH=grunt BUG=none TEST=octopus pd still works. Change-Id: Id9132380a466b6e9580cff6d014f30e1c11de583 Signed-off-by: Jett Rink <jettrink@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/1283453 Commit-Ready: ChromeOS CL Exonerator Bot <chromiumos-cl-exonerator@appspot.gserviceaccount.com> Reviewed-by: Edward Hill <ecgh@chromium.org> Reviewed-by: Diana Z <dzigterman@chromium.org>
* SN5S330: treat interrupts as level-sensitiveDiana Z2018-11-131-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | The SN5S330 PPC will pull its /INT pin low until all interrupts are cleared. Since the interrupt pin is treated as edge-sensitive, its handler needs to provide level-checking before exiting. Otherwise, if not all interrupts are cleared before the handler exits, the EC won't see another edge to call the handler again. Boards which share the PPC interrupt pin with other sources may choose to implement their own callback, if they are able to determine which chip was the source of the interrupt. BUG=b:118846062 BRANCH=None TEST=performed several power swaps and unplugs on a pair of Careenas, verifying that in instances where the handler had to loop around we correctly cleared the interrupts and the "ectool usbpdpower" output was normal Change-Id: Iccbe40976a746d109d67b9a91f8fbd81898f9b3f Signed-off-by: Diana Z <dzigterman@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/1327123 Reviewed-by: Scott Collyer <scollyer@chromium.org> Reviewed-by: Edward Hill <ecgh@chromium.org> Reviewed-by: Jett Rink <jettrink@chromium.org>
* Octopus: fine tune host command debugsDiana Z2018-11-021-2/+4
| | | | | | | | | | | | | | | | | | | This change adjusts the host command printing for octopus boards. Rather than just blocking all host commands, we'll selectively not print some of the most common host commands which don't add much debugging value. BRANCH=None BUG=None TEST=deployed on bobba360, observed a lot of host commands during boot but none printed while the system idled Change-Id: Ib408a6627285988d0bcb203906d89df728942f77 Signed-off-by: Diana Z <dzigterman@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/1312201 Reviewed-by: Furquan Shaikh <furquan@chromium.org> Reviewed-by: Enrico Granata <egranata@chromium.org> Reviewed-by: Karthikeyan Ramasubramanian <kramasub@chromium.org>
* octopus: disable verbose EC logging of host commandsEnrico Granata2018-10-301-0/+8
| | | | | | | | | | | | | | | | | | Once the sensors are enabled, the default logging mode of the EC is extremely verbose. Tune this down by removing the logging statements at every host command. BRANCH=none TEST=observe fewer log messages coming in BUG=b:118443377, crbug:896347 Change-Id: Ib93f9280b8f70a8ecdc53621c4364173c77efed6 Signed-off-by: Enrico Granata <egranata@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/1302293 Reviewed-by: Gwendal Grignou <gwendal@chromium.org> Reviewed-by: Karthikeyan Ramasubramanian <kramasub@chromium.org> Reviewed-by: Justin TerAvest <teravest@chromium.org> Reviewed-by: Diana Z <dzigterman@chromium.org>
* Octopus: Prevent possible i2c_unwedge watchdog reset in S5Diana Z2018-10-302-0/+10
| | | | | | | | | | | | | | | | | | | | When the system enters S5 and the motion_sensor_task was just about to gather data from its sensors, we can hit a scenario where the attempts to unwedge the I2C bus cause the EC to hit a watchdog reset. This change adds the configuration option to indicate that the sensors are unpowered in S5/G3, and therefore the low SCL line is expected. BRANCH=None BUG=b:116774375 TEST=Added sleep to motion_sensor_task to increase the probability of hitting this timing window, confirmed this change triggered the not powered check instead of attempting an unwedge Change-Id: I126a096afde24d0823e6d4fce7e0da3059b421f5 Signed-off-by: Diana Z <dzigterman@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/1305121 Reviewed-by: Furquan Shaikh <furquan@chromium.org> Reviewed-by: Justin TerAvest <teravest@chromium.org>
* dptf: Get rid of CONFIG_DPTF_DEVICE_ORIENTATIONFurquan Shaikh2018-10-301-1/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | CONFIG_DPTF_DEVICE_ORIENTATION was added to indicate mode change to the host to allow it to read the tablet mode flag from shared EC memory and select the right DPTF table to load (if supported). However, this config seems unnecessary because of the following reasons: 1. Host sets SCI mask to indicate to the EC which events it wants to process. Thus, even if the EC sets mode change flag, it will not be notified to the host unless it supports mode change event. 2. Additionally, if host supports mode change event, but does not support multiple DPTF tables, then EC ACPI code takes care of ensuring that there is a thermal event handler present to reload tables. 3. CONFIG_DPTF_DEVICE_ORIENTATION was defined for almost all new x86 boards. BUG=b:117844490 BRANCH=None TEST=make -j buildall Change-Id: Ic4097ae047e2d559673a321da4df86514f902993 Signed-off-by: Furquan Shaikh <furquan@google.com> Reviewed-on: https://chromium-review.googlesource.com/1292359 Commit-Ready: Furquan Shaikh <furquan@chromium.org> Tested-by: Furquan Shaikh <furquan@chromium.org> Reviewed-by: Gwendal Grignou <gwendal@chromium.org>
* octopus: limit charging currentJett Rink2018-10-251-0/+7
| | | | | | | | | | | | | | | | Through empirical testing, fleex/bobba were pulling 3.130A instead of 3.0A from the 45W charger. Limiting the current to 95% of 3A ensures that the board does not draw more than 3A from the 45W charger. This will also help the 20V at 2.25A case as well. BRANCH=none BUG=b:117907836,b:118338454 TEST=With this setting, maximum draw is 2.95A on charger for 2A setting. Change-Id: I4b9aa721d0db57724860f8cf78b87ca165cb3fdd Signed-off-by: Jett Rink <jettrink@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/1294255 Reviewed-by: Justin TerAvest <teravest@chromium.org>
* octopus: enable a1 redriver in S3+Jett Rink2018-10-101-0/+78
| | | | | | | | | | | | | | | | | | | | With the upcoming hardware changes, we need to ensure that TypeA port 1 has power during S3+. Previously other hardware signals controlled the power. We still want to optimize this signal to turn off power in S3/S0ix if we know that nothing is plugged in the port. BRANCH=none BUG=b:111406013 TEST=flashed on meep without issue, however the actually GPIO toggle is still untested since we don't have hardware that needs this yet. Change-Id: I99c548c317a3ec77fef8ece0cc710d072d5b862e Signed-off-by: Jett Rink <jettrink@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/1262108 Commit-Ready: ChromeOS CL Exonerator Bot <chromiumos-cl-exonerator@appspot.gserviceaccount.com> Reviewed-by: Diana Z <dzigterman@chromium.org>
* Octopus: add reset logic for C0 TCPCDiana Z2018-10-091-1/+17
| | | | | | | | | | | | | | | | | This change adds a call to the C0 TCPC reset for standalone TCPC boards which have that pin hooked up in hardware, and adds the GPIO as unimplemented for boards which do not have this yet. BRANCH=None BUG=b:112756630 TEST=Added a log print and rebooted EC on bobba to verify TCPC C0 reset, then verified that charging on C0 worked. Also imaged yorp proto 2 and rebooted, verifying C0 reset was not attempted. Change-Id: I615861f0d9ce9b5a89692e3982ed2e19c7e0b237 Signed-off-by: Diana Z <dzigterman@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/1257647 Reviewed-by: Jett Rink <jettrink@chromium.org>
* octopus: motion_sense: provide option to defer the sensor resume actionsHarry Pan2018-10-031-0/+5
| | | | | | | | | | | | | | | | | | | | | It is observed that the lid accelerator not apprears on the i2c bus which causes the i2c master got NACK in multiple retries during the S5 (and G3) to S0 power sequence. (i.e. [10106.692955 Lid Accel: 0: init failed: 1]) Learnt from the CL:1091211, refer to the CL:433338 as well, the patch is similar to the delay option for suspend actions, provide a delay option for the resume actions as well. BRANCH=master BUG=b:116170194 TEST=Examining EC console for KX022 init succeeds in S5->S3->S0 path on octopus child boards w/ KX022. (i.e. [10039.971601 Lid Accel: MS Done Init type:0x0 range:4]) Change-Id: Iae4f0fd1e6c46c1b7e12a202a517d8f3b3d82c40 Signed-off-by: Harry Pan <harry.pan@intel.com> Reviewed-on: https://chromium-review.googlesource.com/1239974 Reviewed-by: Jett Rink <jettrink@chromium.org>
* bc12: rename bq24392 driver to max14637Scott Collyer2018-10-022-5/+5
| | | | | | | | | | | | | | | | | | | | The MAX14637 BC 1.2 USB charger detection chip is functionally similar to the bq24392 and can use the same driver. Rather than have 2 copies of the same driver, or a generic named driver than can be used for both chips, rename the existing bq24392 driver to max14637 as that's the BC 1.2 chip that our current designs are using. BUG=b:113267982 BRANCH=none TEST=make -j buildall Change-Id: I03cfb4918513d756c2a41341001a8162652a29b6 Signed-off-by: Scott Collyer <scollyer@google.com> Reviewed-on: https://chromium-review.googlesource.com/1250031 Commit-Ready: Scott Collyer <scollyer@chromium.org> Tested-by: Scott Collyer <scollyer@chromium.org> Reviewed-by: Edward Hill <ecgh@chromium.org> Reviewed-by: Jett Rink <jettrink@chromium.org>
* meep: Add clamshell Suspend LED BehaviorZick Wei2018-09-201-1/+1
| | | | | | | | | | | | | | | | | | | | Meep and Mimrock use same mother board, Mimrock is clamshell sku only have Charge LED. To meet LED spec: System without Power LED, Suspend/S0ix without charge blink White on Charge LED(1 sec on, 1 sec off). BUG=none BRANCH=none TEST=manual Set cbi sku id to clamshell sku, Check Charge LED will blink(1 sec on, 1 sec off), when system is Suspend/S0ix without charge. Change-Id: Ib443d6176d929aad4b65c1cb0d4b40c102e6f67e Signed-off-by: Zick Wei <zick.wei@quanta.corp-partner.google.com> Reviewed-on: https://chromium-review.googlesource.com/1226830 Reviewed-by: Jett Rink <jettrink@chromium.org>
* ss-mux: remove unused port_addr initializationv2.0.0Jett Rink2018-09-171-2/+0
| | | | | | | | | | | | | | | | | | | We do not need to set the port_addr variable most places because the SS-MUX is also the TCPC and the tcpc_config_t information is used instead. Remove unused variable setting to avoid confusion. BRANCH=none BUG=none TEST=buildall. phaser USB-C communication (and muxs) still work which is a nominal case for all of these changes. Change-Id: I72ee5da251956eb133091974e8dce5ac7f8787c6 Signed-off-by: Jett Rink <jettrink@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/1200064 Commit-Ready: ChromeOS CL Exonerator Bot <chromiumos-cl-exonerator@appspot.gserviceaccount.com> Reviewed-by: Edward Hill <ecgh@chromium.org>
* octopus: enable PSL for all NPCX variantsJett Rink2018-09-172-3/+4
| | | | | | | | | | | | | | | | | All NPCX variants support PSL mode in hardware now; enable this at the baseboard level. This is adding support for Bobba; other boards are unaffected BRANCH=none BUG=b:115677776 TEST=bobba goes into PSL Change-Id: I38974371b101c42841e4f11ba72b466415c754d9 Signed-off-by: Jett Rink <jettrink@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/1227050 Commit-Ready: ChromeOS CL Exonerator Bot <chromiumos-cl-exonerator@appspot.gserviceaccount.com> Reviewed-by: Justin TerAvest <teravest@chromium.org>
* yorp: increase TCPC i2c speedDiana Z2018-09-171-2/+2
| | | | | | | | | | | | | | | | | Yorp and other NPCX octopus variants should be able to use 400k speeds on their TCPC i2c ports with the recent changes that went into the nxp driver. BRANCH=None BUG=b:78554726 TEST=Loaded onto yorp proto 2 and confirmed that charging and display on ports 0 and 1 work with 400k speed Change-Id: I73f4e175184c9d4f791ea5b84dc91ba6821ce8a7 Signed-off-by: Diana Z <dzigterman@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/1185890 Commit-Ready: ChromeOS CL Exonerator Bot <chromiumos-cl-exonerator@appspot.gserviceaccount.com> Reviewed-by: Jett Rink <jettrink@chromium.org>
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