| Commit message (Collapse) | Author | Age | Files | Lines |
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Commit 7dec638eb577aaa3a00d0551d73c276b94ebacb2 introduced two polarity
modes POLARITY_CC1_DTS, POLARITY_CC2_DTS in enum tcpc_cc_polarity, but
in many places there was an assumption that value other than 0 means
that cable is inverted, the most notable example is usb_mux_set(). As a
result kernel sometimes was not reporting SuperSpeed depending on if
cable was inverted or not.
This patch adds mapping from polarity with DTS to polarity without DTS
where necessary.
BUG=b:162254118
BRANCH=none
TEST=Connect ServoV4 to eve and run servod. Make sure that USB-C muxer
is connects USB3.0 lines (servod should set it).
Flash EC ToT on eve. Boot ChromeOS and go to Developer Console.
Run 'dmesg -w', check if device (eg. ethernet adapter) is attached as
SuperSpeed device. Unplug cable, invert and plug again. Kernel
should report that device is attached as SuperSpeed.
Signed-off-by: Patryk Duda <pdk@semihalf.com>
Change-Id: I354ef7047240cc8b5db01936b3780fae7387edb5
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2555157
Reviewed-by: Jett Rink <jettrink@chromium.org>
Reviewed-by: Denis Brockus <dbrockus@chromium.org>
Commit-Queue: Jett Rink <jettrink@chromium.org>
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Only one DP path is allowed in the Trogdor design. If the DP path
is occupied by another port, we ignored the HPD High but we forgot
to ignore the HPD Low. We should ignore both HPD High and Low.
When exit the DP alt-mode, also check if it is the correct path
before clean up.
BRANCH=None
BUG=b:173213397
TEST=Plugged the 1st monitor to a port. Plugging the 2nd monitor to
another port didn't affect the 1st monitor. Unplugging the 2nd monitor
didn't affect the 1st monitor.
Change-Id: Ice2ebc512239f062d22fa69befcaa39b9090c7db
Signed-off-by: Wai-Hong Tam <waihong@google.com>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2537157
Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
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The messages on CC_EVENT are not too noisy. They help debug. Do not
suppress it.
BRANCH=Trogdor
BUG=b:168714440
TEST=Checked the CC_EVENT messages showing up, like
[0.063848 event set 0x0000000000002000]
Change-Id: I1036ce52ccea22ced73e7e0127b8777ca016325f
Signed-off-by: Wai-Hong Tam <waihong@google.com>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2543109
Reviewed-by: Alexandru M Stan <amstan@chromium.org>
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Move this CONFIG from bringup to production.
BRANCH=None
BUG=b:169736149
TEST=Built the image.
Change-Id: I490499f3a85f91c6f07a0e099b8c0738bf0eb787
Signed-off-by: Wai-Hong Tam <waihong@google.com>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2538262
Reviewed-by: Stephen Boyd <swboyd@chromium.org>
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Rename CONFIG_I2C_CONTROLLER and related comments.
BRANCH=None
BUG=None
TEST=make -j buildall
Signed-off-by: Diana Z <dzigterman@chromium.org>
Change-Id: Ied6a1829bf54a5c9a32e6772982a4b8aa31aaf23
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2518659
Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org>
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The charger is not efficient on buck mode when the operating current
is low. It happens when AP is off and battery is full.
Request the external adapter to a lower voltage, 5V. The charger will
switch to boost mode that has a better efficiency.
BRANCH=None
BUG=b:170794007
TEST=Charged the battery to full. Checked it requesting 20V when AP is
ON, and requesting 5V when AP is OFF.
TEST=Discharged the battery to not full. Checked it requesting 20V no
matter AP is ON or OFF.
Change-Id: Ifa333fccb40e7ebb2461c396be392c4ccc2d4320
Signed-off-by: Wai-Hong Tam <waihong@google.com>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2518326
Reviewed-by: Eric Yilun Lin <yllin@chromium.org>
Reviewed-by: Alexandru M Stan <amstan@chromium.org>
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The OE_L has external pull-up. It is actually an open-drain output.
Configuring it to push-pull has leakage through the pull-up to an
unpowered rail during EC hibernate.
Also configure SEL to output low if OE_L is deasserted. The SEL has
no meaning if the muxes are disabled. When EC hibernate, the muxing
ICs are unpowered. Outputing low prevents leakage through the muxing
ICs.
BRANCH=None
BUG=b:169595541
TEST=Plugged a HDMI monitor to port-0 and port-1; checked the DP mux
settings correctly.
Change-Id: Icf0e81172626c09bc556756f1bcdddb83f45ac68
Signed-off-by: Wai-Hong Tam <waihong@google.com>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2508864
Reviewed-by: Stephen Boyd <swboyd@chromium.org>
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Turning off the MST hub in S3 (via IOEX_HDMI_DATA_EN_DB) causes a
VDM:Attention that immediately wakes us back up from S3.
Wait 500ms after S3 entry before setting EC_MKBP_EVENT_DP_ALT_MODE_ENTERED
in pd_notify_dp_alt_mode_entry().
BUG=b:167949458
BRANCH=zork
TEST=powerd_dbus_suspend with display connected to MST hub DB
Signed-off-by: Edward Hill <ecgh@chromium.org>
Change-Id: I0d90d0a5130403b9aca1057725509814cac0d545
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2506424
Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
Reviewed-by: Denis Brockus <dbrockus@chromium.org>
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This signal is no longer connected to PMIC on recent hardware
revisions. It is unused. Deprecate it.
BRANCH=None
BUG=b:171245607
TEST=Built the affected Trogdor images.
Change-Id: I75562f1aa9e411df38afd321ab63b51e91e7d4f7
Signed-off-by: Wai-Hong Tam <waihong@google.com>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2488660
Reviewed-by: Alexandru M Stan <amstan@chromium.org>
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When chipset is transitioning to a new state or on sysjump, the EC
re-negotiates to enter an alternate mode on booting up.
This commit adds support for exiting Thunderbolt mode for SOP' and SOP''
for active cable on chipset transition and also moves all the alternate
mode exit rotines to their respective files.
It also delays deleting the SVID data until after the EXIT_MODE message
has ACKed and avoids pd_dfp_exit_mode() from changing the alternate
mode's internal states.
This commit also makes sure that the mux is set to safe state before
exiting the alternate mode and it is reconfigured according to the
port's current data role on receiving ACK/NAK from the cable/port
partner.
BUG=b:151169925, b:159717794
BRANCH=none
TEST=On reboot, able to exit and re-enter into DisplayPort mode,
Thunderbolt mode with passive cable and thunderbolt mode with
active cable.
Change-Id: If1e48e9f31cd678e23fe89bd3494551b5d1a78f1
Signed-off-by: Ayushee <ayushee.shah@intel.com>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2415082
Reviewed-by: Abe Levkoy <alevkoy@chromium.org>
Reviewed-by: Diana Z <dzigterman@chromium.org>
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The Type-C ports on Trogdor doesn't support UFP, like ADB
mode. So make the ports DFP only. When the data role change
to UFP, it disconnects the USB mux.
BRANCH=None
BUG=b:143616352
TEST=Checked the USB mux disconnected when switching to UFP.
Change-Id: I968f1fc7b8c15d34f635275911a013f28dc92359
Signed-off-by: Wai-Hong Tam <waihong@google.com>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2464233
Reviewed-by: Alexandru M Stan <amstan@chromium.org>
Commit-Queue: Alexandru M Stan <amstan@chromium.org>
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Increase console output buffer since we have the RAM available.
It helps console message drop/corruption.
BRANCH=None
BUG=None
TEST=Enabled i2ctrace which dumps lots of messages.
Change-Id: Icd98d429ec80cdae1d8970624a1c4c385ef73184
Signed-off-by: Wai-Hong Tam <waihong@google.com>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2464232
Reviewed-by: Alexandru M Stan <amstan@chromium.org>
Commit-Queue: Alexandru M Stan <amstan@chromium.org>
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This patch enables the console command 'chargen'.
BUG=b:158477297
BRANCH=trogdor
TEST=buildall
Signed-off-by: Namyoon Woo <namyoon@chromium.org>
Change-Id: I0bffc5ee489b1a3984ea4c59894dda770303fb92
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2463596
Reviewed-by: Wai-Hong Tam <waihong@google.com>
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We disabled the PSL mode hibernate. We uses another GPIO to control
switches, which were originally controlled by PSL_OUT. Add this GPIO,
named HIBERNATE_L, such that the non-PSL mode hibernate can retrofit
the original design.
BRANCH=None
BUG=b:169797080
TEST=Triggered EC hibernate and checked the HIBERNATE_L GPIO asserted.
Change-Id: I69c0d0296f701f3027adfd4d27fa51bdae0844a5
Signed-off-by: Wai-Hong Tam <waihong@google.com>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2446662
Reviewed-by: Alexandru M Stan <amstan@chromium.org>
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The RTC stops counting under PSL mode. The Trogdor design relies on
EC to give the RTC counter. Disable the PSL mode hibernate and use
the traditional non-PSL mode way, i.e. power down all RAM blocks
except the last one.
BRANCH=None
BUG=b:169595541
TEST=Tested on Lazor; triggered hibernate, and waked it up using:
* power button press
* lid open
* servo toggling EC_RST_ODL
* AC plug (doesn't work, need to investigate why)
TEST=Verified RTC still counting in hibernate:
2020-10-07 14:35:53 [244.922648 power state 9 = S5->G3, in 0x0005]
2020-10-07 14:35:53 RTC: 0x5f7e34b9 (1602106553.00 s)
2020-10-07 14:35:53 [244.923417 power state 0 = G3, in 0x0005]
2020-10-07 14:35:53 [244.926855 SDC Safe]
2020-10-07 14:35:53 [244.927138 Hibernate due to G3 idle]
2020-10-07 14:36:20
2020-10-07 14:36:20
2020-10-07 14:36:20 --- UART initialized after reboot ---
2020-10-07 14:36:20 [Image: RO, lazor_v2.0.5690-d95436fd6 ...]
2020-10-07 14:36:20 [Reset cause: hibernate wake-pin]
2020-10-07 14:36:20
...
2020-10-07 14:36:23 > rtc
2020-10-07 14:36:25 RTC: 0x5f7e34d9 (1602106585.00 s)
First RTC diff from the wall clock: 6553-53 = 6500
Second RTC diff from the wall clock: 6585-(60+25) = 6500
TEST=Verified RTC wake up from hibernate:
2020-10-07 14:59:25 > hibernate 10
2020-10-07 14:59:27 Hibernating for 10.000000 s
2020-10-07 14:59:37
2020-10-07 14:59:37
2020-10-07 14:59:37 --- UART initialized after reboot ---
Change-Id: I23f6a65115d5722cf183948fad81dc16d3a6af47
Signed-off-by: Wai-Hong Tam <waihong@google.com>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2447049
Reviewed-by: Alexandru M Stan <amstan@chromium.org>
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Need this config to save the reset flags across double EC reset on the
first power-on.
On power-on, H1 releases the EC from reset but then quickly asserts and
releases the reset a second time. This means the EC sees 2 resets:
(1) power-on reset, (2) reset-pin reset. This config will
allow the second reset to be treated as a power-on.
BRANCH=None
BUG=b:169188750
TEST=Tested on a Trogdor board that the first power-on has the
"power-on" reset flag.
> --- UART initialized after reboot ---
> [Image: RO, pompom_v2.0.5526+3b3e20008 2020-09-23 12:00:19 ...]
> [Reset cause: power-on]
Change-Id: I2cccb94d8fac938b4c70984f1a4e4c49b97a8b7b
Signed-off-by: Wai-Hong Tam <waihong@google.com>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2427102
Reviewed-by: Stephen Boyd <swboyd@chromium.org>
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To reflect the number we measured, set the min operating power to 10W.
BRANCH=None
BUG=b:152647632
TEST=Using Pompom without battery,
* checked AP auto-boot when plugged a PD charger (>10W);
* checked AP not auto-boot when plugged a SuzyQ (7.5W).
Change-Id: I5f4c2a4befb5f231d8f62acf15e103c155c4b956
Signed-off-by: Wai-Hong Tam <waihong@google.com>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2417003
Reviewed-by: Matthias Kaehlcke <mka@chromium.org>
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Move the I2C config to the board level such that they can have different
configs.
Also add the extra I2C bus for WLC on Coachz. The device on this I2C bus
supports fast-mode plus, 1Mbit/s.
BRANCH=None
BUG=b:167884598
TEST=Built all Trogdor variants.
Change-Id: Ibcb0e110e1b2c67f8ba843c2dc08efabeb5fe9ba
Signed-off-by: Wai-Hong Tam <waihong@google.com>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2412821
Reviewed-by: Stephen Boyd <swboyd@chromium.org>
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Rename the GPIOs to reflect the netnames.
Add the GPIOs for the hall sensors, not implemented yet.
Add the GPIOs for the base detection, not implemented yet.
Add the GPIOs and I2C bus for the stylus, not implemented yet.
BRANCH=None
BUG=b:167884598
TEST=Built the Coachz image.
Change-Id: If30e00d8ede0b6ca2e9a4f9efe474c22a8a16933
Signed-off-by: Wai-Hong Tam <waihong@google.com>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2411507
Reviewed-by: Bob Moragues <moragues@chromium.org>
Reviewed-by: Stephen Boyd <swboyd@chromium.org>
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Coachz doesn't has an internal keyboard.
Move the CONFIG from baseboard to board, as the keyboard backlight
is not a common feature.
BRANCH=None
BUG=b:167884598
TEST=Built the Coachz image.
Change-Id: Idd5937da9ad6a3ab1be277e537bbd2e70e2b1d9a
Signed-off-by: Wai-Hong Tam <waihong@google.com>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2410855
Reviewed-by: Stephen Boyd <swboyd@chromium.org>
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We switched to use the TCPC to detect the VBUS, instead of the
BC1.2, from CL:2086092. But the BC1.2 VBUS detection GPIOs are
still used. Remove these references.
BRANCH=None
BUG=b:150682632, b:167884598
TEST=Built the affected Trogdor boards.
Change-Id: I66d59b16cd93b1dbf460a56a9bc97268d571f6d1
Signed-off-by: Wai-Hong Tam <waihong@google.com>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2410851
Reviewed-by: Stephen Boyd <swboyd@chromium.org>
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Move some GPIO aliases from baseboard to board such that they can be
customized to use different names.
BRANCH=None
BUG=b:167884598
TEST=Built the affect Trogdor boards.
Change-Id: Id8d68d9b03d43010a81565f7625b8033aab14594
Signed-off-by: Wai-Hong Tam <waihong@google.com>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2410850
Reviewed-by: Stephen Boyd <swboyd@chromium.org>
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This patch removes configurations (I2C, GPIO, TASK and
Interrupt...) about TCPC port1 for pompom.
BUG=b:167476139
BRANCH=none
TEST=power on after flashing FW and it works normal.
Signed-off-by: AlvinCC_Hsu <alvincc_hsu@compal.corp-partner.google.com>
Change-Id: I1275c1ef7e7d3e65d695dace834a9bcbb4e66dcc
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2391022
Reviewed-by: Wai-Hong Tam <waihong@google.com>
Commit-Queue: Wai-Hong Tam <waihong@google.com>
Tested-by: Wai-Hong Tam <waihong@google.com>
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Enable the related CONFIG's.
BRANCH=None
BUG=b:148149387
TEST=Tried the following scenaiors:
(1) Host suspend event -> no AP_SUSPEND assertion -> timeout -> HANG_DETECT
-> wake AP up
(2) Host suspend event -> AP_SUSPEND assertion -> go to S3 -> SUSPEND
hook triggered
(3) Continue (2), AP_SUSPEND deassertion -> go to S0, host resume event
-> RESUME hook triggered
(4) Continue (2), AP_SUSPEND deassertion -> go to S0 -> AP_SUSPEND
assertion -> go to S3
(5) Continue (2), AP_SUSPEND deassertion -> timeout -> HANG_DETECT
-> wake AP up -> RESUME hook triggered
Change-Id: I8101c9fe61946c52e15834413c806a19f3a6df4d
Signed-off-by: Wai-Hong Tam <waihong@google.com>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2321877
Reviewed-by: Ting Shen <phoenixshen@chromium.org>
Reviewed-by: Stephen Boyd <swboyd@chromium.org>
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Add the allow list of the host events and MKBP events. Without this
allow list, any event will wake the AP up from suspend, that we don't
want.
The "AC plug/unplug" is new to the CrOS requirements.
BRANCH=None
BUG=b:163375086
TEST=Tested the positive wake sources:
* Press a key on the internal keyboard
* Plug AC
* Unplug AC
* Press the power button
* Switch the lid open
* suspend_stress_test which uses RTC host event
and tested the negative wake sources:
* Press the VolUp/VolDown button
Change-Id: If146aa82b66440160ea670554c0510a49ad00e6e
Signed-off-by: Wai-Hong Tam <waihong@google.com>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2348194
Reviewed-by: Duncan Laurie <dlaurie@google.com>
Reviewed-by: Stephen Boyd <swboyd@chromium.org>
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Define the CONFIG_POWER_TRACK_HOST_SLEEP_STATE, which enable the host to
self-report its sleep state. The handling function is not defined, so it
just saves the state, no further action.
BRANCH=None
BUG=b:148149387
TEST=Without this CL, will show HC 0xa9 error on suspend/resume:
[35.916083 HC 0xa9 err 1]
as the host sleep event (0xa9) is not handled.
With this CL, the HC 0xa9 error doesn't happen.
Change-Id: I68036d9ca611104eaf651b4d4cae15571713ac90
Signed-off-by: Wai-Hong Tam <waihong@google.com>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2321870
Reviewed-by: Alexandru M Stan <amstan@chromium.org>
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We don't want the OS to have access to our battery or anything on our
i2c busses. It's just confuses things.
BUG=b:160784792
TEST=See virtual battery being used
BRANCH=none
Change-Id: Icab307ea945d13c0a25dd8b4cd4ff8765b1bf6a4
Signed-off-by: Douglas Anderson <dianders@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2300460
Reviewed-by: Wai-Hong Tam <waihong@google.com>
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Different DB options may cause different numbers of charger chips to be
present on the system. Remove constant count for charger chips, and
instead always call into the overridable function to query the count.
BRANCH=None
BUG=b:155963446
TEST=make -j buildall
Signed-off-by: Diana Z <dzigterman@chromium.org>
Change-Id: I0e65b8af351ecabe6f7b823e0e56f1932cc280a6
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2277833
Commit-Queue: Aseda Aboagye <aaboagye@chromium.org>
Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
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Add a transmit type parameter to functions involved in mode entry; also
add such a parameter to various functions calling those functions. For
DisplayPort-specific definitions or calls, specify SOP; we do not
currently support DisplayPort mode for cable plugs. For TCPMv1-specific
code, specify SOP. TCPMv1 generally assumes that the discovery/mode
structures are 1-dimensional, as they were previously, and changing that
is outside the scope of this CL.
BUG=b:155890173
TEST=Enter DP mode on Volteer with TCPMv2
TEST=Enter DP mode on Volteer with TCPMv1
TEST=Enter TBT mode on Volteer with TCPMV1
BRANCH=none
Change-Id: I8afc75b3f3be8939c4645058ac4a31f24c88fb9e
Signed-off-by: Abe Levkoy <alevkoy@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2229279
Reviewed-by: Diana Z <dzigterman@chromium.org>
Commit-Queue: Diana Z <dzigterman@chromium.org>
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Extend the tcpci register dump command to allow chip specific
register dumps to be displayed.
BUG=b:157206143
TEST=Display ANX3447 registers on Puff.
BRANCH=none
Change-Id: Ib2bf1adcbe3bce75ff54c36c4306b17356eae96f
Signed-off-by: Andrew McRae <amcrae@google.com>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2208344
Tested-by: Andrew McRae <amcrae@chromium.org>
Auto-Submit: Andrew McRae <amcrae@chromium.org>
Reviewed-by: Peter Marheine <pmarheine@chromium.org>
Reviewed-by: Jett Rink <jettrink@chromium.org>
Commit-Queue: Andrew McRae <amcrae@chromium.org>
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Flashrom first uses the host command to get EC SPI flash info. If not
there, then uses the host command to get EC chip info. The factory
process expects flashrom return the EC chip info in order to construct
a HWID.
Disable the host command of EC SPI flash info to be compliant with the
factory flow.
BRANCH=None
BUG=b:156778746
TEST=Ran "flashrom -p ec --flash-name 2>/dev/null", which returned:
vendor="Nuvoton" name="NPCX796F"
Change-Id: I729ce40942283e41c38d70fcca38181613d9ed9c
Signed-off-by: Wai-Hong Tam <waihong@google.com>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2209428
Reviewed-by: Philip Chen <philipchen@chromium.org>
Reviewed-by: Bob Moragues <moragues@chromium.org>
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Enable the I2C trace and TCPCI dump, which are useful for debugging
USB Type-C related issues. TCPCI dump has no performance impact. It
can still be enabled on production.
BRANCH=None
BUG=b:146075455
TEST=Tried the console commands i2ctrace and tcpci_dump.
Change-Id: I2f39c8fb91db2a853eb4b9d5d159d5e137b3b087
Signed-off-by: Wai-Hong Tam <waihong@google.com>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2204580
Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
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BUG=none
BRANCH=none
TEST=make buildall -j
Change-Id: I33a63d6ac45bbd46da74db34a21d1bb130476362
Signed-off-by: Vijay Hiremath <vijay.p.hiremath@intel.com>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2196946
Reviewed-by: Sooraj Govindan <sooraj.govindan@intel.corp-partner.google.com>
Reviewed-by: Keith Short <keithshort@chromium.org>
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Move the common stuff to from board to baseboard to reduce the effort
of forking and maintaining derivatives.
This CL is intended to simply moving things around, not to address
other needs, like supporting a different EC.
Leave the following stuff in board:
* Features for debugging
* GPIO and interrupt handlers (likely will be changed)
* BC 1.2 (already changed from Trogdor rev-0 and rev-1)
* TCPC/MUX/PPC (will be changed)
* Sensors (clamshell vs convertible)
* ADC (detachable vs convertible)
* LED/PWM
* Battery
Others are moved to baseboard.
BRANCH=None
BUG=b:146237680
TEST=Build Trogdor and it boots. Should be good as there is no logic
change.
Change-Id: I2e4cd76d18f8739b5b7d5b1dae67c13e038b4480
Signed-off-by: Wai-Hong Tam <waihong@google.com>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2099390
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