| Commit message (Collapse) | Author | Age | Files | Lines |
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Due to in Treeya360 project add "#undef CONFIG_HIBERNATE_PSL" this
configuration, so PPC1 remains powered during hibernate.
PPC1 therefore now needs to be configured the same way as PPC0, to mimic
the previous dead-battery behavior and allow wake on AC plug.
BRANCH=none
BUG=b:259211176
TEST=make buildall -j48
Change-Id: Ie353a3f3ca118dd94a2131d8ea62ddf5ee12c470
Signed-off-by: amber.chen <amber.chen@lcfc.corp-partner.google.com>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/4119878
Code-Coverage: Zoss <zoss-cl-coverage@prod.google.com>
Reviewed-by: Edward Hill <ecgh@chromium.org>
Reviewed-by: Zhuohao Lee <zhuohao@chromium.org>
(cherry picked from commit 950c21ed4d0181029653bfebabcbfc990c1757d3)
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/4140778
Reviewed-by: YH Lin <yueherngl@chromium.org>
Commit-Queue: YH Lin <yueherngl@chromium.org>
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Currently, power-on battery SoC and shutdown battery SoC are
independently configured by each board. This patch will unify the
setting as follows:
CONFIG_CHARGER_MIN_BAT_PCT_FOR_POWER_ON = 2 (don't boot if soc < 2%)
CONFIG_BATT_HOST_SHUTDOWN_PERCENTAGE = 2 (shutdown if soc <= 2%)
BATTERY_LEVEL_SHUTDOWN = 3 (shutdown if soc < 3%)
CONFIG_BATTERY_EXPORT_DISPLAY_SOC = Y (removed)
CONFIG_CHARGER_MIN_BAT_PCT_FOR_POWER_ON_WITH_AC = 1
This allows us to show the low battery alert whenever we can because
EC doesn't inhibit power-on even if it knows the host would
immediately shut down.
With CONFIG_BATTERY_EXPORT_DISPLAY_SOC, boards will start using the
CONFIG_BATT_HOST_SHUTDOWN_PERCENTAGE = 2% as the low battery
threshold (and the SoC will be agreed between the EC and Powerd).
Boards with CONFIG_CHARGER_MIN_BAT_PCT_FOR_POWER_ON = 1 will keep the
same threshold. This is for avoiding degrading the UX by increasing
the power-on threshold (even though a question that 1% may not be
enough for soft sync to finish consistently remains to be answered).
Boards with CONFIG_CHARGER_MIN_BAT_PCT_FOR_POWER_ON > 2 will have a
lower threshold but we think 2% is enough to finish the software sync.
A lower threshold also improves the UX by showing the low battery
alert in the situation where otherwise the system would leave the user
uninformed by not responding to a power button press.
BUG=b:191837893
BRANCH=None
TEST=buildall
Change-Id: If6ff733bc181f929561a3fffb8a84e760668ce37
Signed-off-by: Daisuke Nojiri <dnojiri@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2981468
Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3872712
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Add skuid 0xbe(190), 0xbf(191) for treeya360 new audio codec sku.
BRANCH=grunt
BUG=b:185972050
TEST=make buildall -j
Signed-off-by: arthur.lin <arthur.lin@lcfc.corp-partner.google.com>
Change-Id: I8d9fb10af1d4ec5abb146561172180c23d327226
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3088958
Reviewed-by: Paul Fagerburg <pfagerburg@chromium.org>
Reviewed-by: Edward Hill <ecgh@chromium.org>
Reviewed-by: Yu-Hsuan Hsu <yuhsuan@chromium.org>
Commit-Queue: Yu-Hsuan Hsu <yuhsuan@chromium.org>
(cherry picked from commit 721b08706da83d59100c06be1da5a8a853e2597a)
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3105910
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BUG=b:171755306
BRANCH=firmware-grunt-11031.B
TEST=make buildall -j
Signed-off-by: Devin Lu <Devin.Lu@quantatw.com>
Change-Id: I45830335545206f665e84866e0b11a2c666d0101
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2752572
Reviewed-by: Edward Hill <ecgh@chromium.org>
(cherry picked from commit 01e7c7cc367f1e17804640f7820f071738b2f83a)
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2755353
Commit-Queue: Edward Hill <ecgh@chromium.org>
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If CCD not active, set port 0 SBU_EN=0 to avoid power leakage during
hibernation.
BUG=b:175674973
BRANCH=grunt
TEST=no power leakage during hibernate
Signed-off-by: Edward Hill <ecgh@chromium.org>
Change-Id: I05b8079aebc1282b9bb955bbf153c0fc2399bee1
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2668063
Tested-by: Peichao Wang <pwang12@lenovo.corp-partner.google.com>
Reviewed-by: Mary Ruthven <mruthven@chromium.org>
Reviewed-by: Peichao Wang <pwang12@lenovo.corp-partner.google.com>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2643589
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There is a board specific usb_pd_policy.c file that contains a lot of
code for handling DisplayPort Alternate mode, Google Firmware Update
Alternate mode, as well as some PD policy functions such as deciding to
Accept or Reject a data role swap or a power role swap. Several boards
simply copy/paste this code from project to project as a lot of this
functionality is not actually board specific.
This commit tries to refactor this by pulling the functions that are not
mainly board specific into common code. The functions are made
overridable such that boards that truly do require a different
implementation may do so.
Additionally, this consolidation changes the policy behaviour for some
boards, but they should be for the better. Some examples include that
data swaps are always allowed if we are a UFP (no system image
requirement), power swaps are allowed to become a sink if we are no
longer dual role (e.g. - in suspend), and DisplayPort Alternate Mode is
not entered if the AP is off.
In order to facilitate this refactor, a couple CONFIG_* options were
introduced:
- CONFIG_USB_PD_DP_HPD_GPIO
/* HPD is sent to the GPU from the EC via a GPIO */
- CONFIG_USB_PD_CUSTOM_VDO
/*
* Define this if a board needs custom SNK and/or SRC PDOs.
*
* The default SRC PDO is a fixed 5V/1.5A with PDO_FIXED_FLAGS indicating
* Dual-Role power, USB Communication Capable, and Dual-Role data.
*
* The default SNK PDOs are:
* - Fixed 5V/500mA with the same PDO_FIXED_FLAGS
* - Variable (non-battery) min 4.75V, max PD_MAX_VOLTAGE_MV,
* operational current PD_MAX_CURRENT_MA,
* - Battery min 4.75V, max PD_MAX_VOLTAGE_MV, operational power
* PD_OPERATING_POWER_MW
*/
BUG=chromium:1021724,b:141458448
BRANCH=firmware-grunt-11031.B
TEST=With other PD Policies patches, flash grunt and run faft_ec&pd
Change-Id: I18fd7e22dc77fe1dc6c21c38cd7f1bc53cae86cb
Signed-off-by: Aseda Aboagye <aaboagye@google.com>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1949052
Tested-by: Aseda Aboagye <aaboagye@chromium.org>
Reviewed-by: Paul Fagerburg <pfagerburg@chromium.org>
Reviewed-by: Diana Z <dzigterman@chromium.org>
Reviewed-by: Denis Brockus <dbrockus@chromium.org>
Commit-Queue: Aseda Aboagye <aaboagye@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2213574
Tested-by: Dawid Niedźwiecki <dn@semihalf.com>
Reviewed-by: Edward Hill <ecgh@chromium.org>
Commit-Queue: Denis Brockus <dbrockus@chromium.org>
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this changes the declaration and definitions of
typec_set_source_current_limit() to take an enum tcpc_rp_value instead
of int.
BUG=none
BRANCH=firmware-grunt-11031.B
TEST=With other PD Policies patches, flash grunt and run faft_ec&pd
Change-Id: If633641a581eeb6085b94bc727e23fb57f7cd435
Signed-off-by: Caveh Jalali <caveh@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1889117
Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2213573
Tested-by: Dawid Niedźwiecki <dn@semihalf.com>
Reviewed-by: Paul Fagerburg <pfagerburg@chromium.org>
Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
Commit-Queue: Denis Brockus <dbrockus@chromium.org>
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We still need to pull out more common code between the two stacks, but
this is scaffolding with a few examples.
BUG=b:137493121
BRANCH=firmware-grunt-11031.B
TEST=With other PD Policies patches, flash grunt and run faft_ec&pd
Change-Id: Ibd9dda1e544e06f02aa3dde48ca7de1539700cfa
Signed-off-by: Jett Rink <jettrink@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1744655
Reviewed-by: Denis Brockus <dbrockus@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2213572
Tested-by: Dawid Niedźwiecki <dn@semihalf.com>
Reviewed-by: Paul Fagerburg <pfagerburg@chromium.org>
Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
Commit-Queue: Denis Brockus <dbrockus@chromium.org>
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Slow the keyboard scan rate from 60 us to 80 us. This compensates the
additional delay added to the KBO line by H1.
BUG=b:153470574
BRANCH=grunt
TEST=make sure defect unit will not output t Key while pressing F3 key.
Change-Id: I9548ccc2368ac7be5ea566577a479e98291efb29
Signed-off-by: Devin Lu <Devin.Lu@quantatw.com>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2141372
Reviewed-by: Edward Hill <ecgh@chromium.org>
(cherry picked from commit dbfc6ded455817d6de0ddd9ecfe454bc564d0362)
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2141376
Commit-Queue: Edward Hill <ecgh@chromium.org>
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nuwani sku id range is from 0xd0 to 0xdf, and
nuwani180 sku id is 0xd0, nuwani360 sku id is 0xd8.
BUG=b:150846518
BRANCH=firmware-grunt-11031.B
TEST=boot nuwani180/360 board, function as expected.
Signed-off-by: xiaoqiang.zhu <xiaoqiang.zhu@bitland.corp-partner.google.com>
Change-Id: I3be5df864d52415f8b471cf990ff6b50c9ad7909
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2134337
Reviewed-by: Edward Hill <ecgh@chromium.org>
Commit-Queue: Edward Hill <ecgh@chromium.org>
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The default USB TYPE C connector facing receiver equalization
setting is 0x90, compensate for channel loss up to 15.4dB
It's high for some dongles. Apply lower USB EQ to 8.7dB
BUG=b:140472120
BRANCH=none
TEST=build and boot on, read back registers to verify
> ectool i2cread 8 2 0x16 0xe7
0x40
Signed-off-by: Lu Zhang <lu.zhang@bitland.corp-partner.google.com>
Change-Id: I1fce255d0dbe8c5a12cf8c8ff5b3c506e8d19475
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1830538
Reviewed-by: Edward Hill <ecgh@chromium.org>
Reviewed-by: Paul Ma <magf@bitland.corp-partner.google.com>
Tested-by: Paul Ma <magf@bitland.corp-partner.google.com>
(cherry picked from commit c469aa1bcbef30ee57f12e4f99799ca8b95d576c)
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1862871
Commit-Queue: Edward Hill <ecgh@chromium.org>
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BUG=b:139686328
BRANCH=grunt
TEST=make buildall -j
Change-Id: I588874c2f4f9556137d4cc9e895c3f2f6aaa5436
Signed-off-by: Devin Lu <Devin.Lu@quantatw.com>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1772868
Reviewed-by: Edward Hill <ecgh@chromium.org>
Commit-Queue: Edward Hill <ecgh@chromium.org>
(cherry picked from commit a15ef31af52679f715a10589ef89b4343141dd91)
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1773030
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Treeya use two sets of base/lid sensors, one is BMI160/KX022 which
is supported by baseboard, another is LSM6DS3TR/LIS2DWL. This patch
will enable one of them according to sku_id.
This patch also remove keyboard backlight feature from ec feature
flags according to sku_id since both Treeya and Treeya360 do not
support keyboard backlight.
BUG=b:138744661, b:137945787, b:137849739
BRANCH=none
TEST=boot treeya boards which mounted BMI160/KX022 or
LSM6DS3TR/LIS2DWL, use 'accelinfo on' to enable sensor output,
make sure that their x/y/x value are correct.
Cq-Depend: chromium:1741598, chromium:1751302
Change-Id: I213a2073c2232ef0f2f70be788f859a264e09425
Signed-off-by: Paul Ma <magf@bitland.corp-partner.google.com>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1746006
Tested-by: Martin Roth <martinroth@chromium.org>
Reviewed-by: Paul Fagerburg <pfagerburg@chromium.org>
Reviewed-by: Edward Hill <ecgh@chromium.org>
Reviewed-by: Martin Roth <martinroth@chromium.org>
Commit-Queue: Martin Roth <martinroth@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1767535
Commit-Queue: Edward Hill <ecgh@chromium.org>
Tested-by: Edward Hill <ecgh@chromium.org>
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Merge common TCPC code into baseboard, and add choice of ANX3429 or
ANX3447 for port 0 TCPC.
Treeya uses ANX3447, all others use ANX3429.
BUG=b:138744661
BRANCH=none
TEST=build -j BOARD=treeya
Change-Id: I66f84ae50be0b5fe80479dfdc699717427e4457c
Signed-off-by: Paul Ma <magf@bitland.corp-partner.google.com>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1751302
Reviewed-by: Jett Rink <jettrink@chromium.org>
Reviewed-by: Martin Roth <martinroth@chromium.org>
Tested-by: Martin Roth <martinroth@chromium.org>
Commit-Queue: Martin Roth <martinroth@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1767534
Reviewed-by: Edward Hill <ecgh@chromium.org>
Commit-Queue: Edward Hill <ecgh@chromium.org>
Tested-by: Edward Hill <ecgh@chromium.org>
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The extentions were added to make the compiler perform most
of the verification that the conversion was being done correctly
to remove 8bit addressing as the standard I2C/SPI address type.
Now that the compiler has verified the code, the extra
extentions are being removed
BUG=chromium:971296
BRANCH=none
TEST=make buildall -j
TEST=verify sensor functionality on arcada_ish
Change-Id: I36894f8bb9daefb5b31b5e91577708f6f9af2a4f
Signed-off-by: Denis Brockus <dbrockus@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1704792
Reviewed-by: Jack Rosenthal <jrosenth@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1767528
Reviewed-by: Edward Hill <ecgh@chromium.org>
Commit-Queue: Edward Hill <ecgh@chromium.org>
Tested-by: Edward Hill <ecgh@chromium.org>
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Opt for 7bit slave addresses in EC code. If 8bit is
expected by a driver, make it local and show this in
the naming.
Use __7b, __7bf and __8b as name extensions for i2c/spi
addresses used in the EC codebase. __7b indicates a
7bit address by itself. __7bf indicates a 7bit address
with optional flags attached. __8b indicates a 8bit
address by itself.
Allow space for 10bit addresses, even though this is
not currently being used by any of our attached
devices.
These extensions are for verification purposes only and
will be removed in the last pass of this ticket. I want
to make sure the variable names reflect the type to help
eliminate future 7/8/7-flags confusion.
BUG=chromium:971296
BRANCH=none
TEST=make buildall -j
Change-Id: I2fc3d1b52ce76184492b2aaff3060f486ca45f45
Signed-off-by: Denis Brockus <dbrockus@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1699893
Reviewed-by: Jack Rosenthal <jrosenth@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1767525
Reviewed-by: Edward Hill <ecgh@chromium.org>
Commit-Queue: Edward Hill <ecgh@chromium.org>
Tested-by: Edward Hill <ecgh@chromium.org>
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Currently, tcpc_config assumes TCPCs are on I2C bus. ITE's EC has an
embedded TCPC.
This patch adds bus_type field to struct tcpc_config_t so that a TCPC
location on other type of bus can be specified.
Signed-off-by: Daisuke Nojiri <dnojiri@chromium.org>
BUG=none
BRANCH=none
TEST=buildall
Change-Id: Ieac733011700b351e6323f46070dcf46d9e1154b
Reviewed-on: https://chromium-review.googlesource.com/1640305
Commit-Ready: Daisuke Nojiri <dnojiri@chromium.org>
Tested-by: Daisuke Nojiri <dnojiri@chromium.org>
Legacy-Commit-Queue: Commit Bot <commit-bot@chromium.org>
Reviewed-by: Jett Rink <jettrink@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1767520
Reviewed-by: Edward Hill <ecgh@chromium.org>
Commit-Queue: Edward Hill <ecgh@chromium.org>
Tested-by: Edward Hill <ecgh@chromium.org>
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tcpc_config contained a field for both the alert polarity and open
drain/push pull configuration. There is also a possible difference in TCPC
reset polarity. Instead of adding yet another field to describe this
configuration, it would be better to convert alert polairty, open
drain and reset polarity into a single flags field.
This CL modifies the tcpc_config struct to use a single flags field
and adds defines for what existing flag options can be.
BUG=b:130194031
BRANCH=none
TEST=make -j buildall
Change-Id: Ifb7e7604edb7021fb2d36ee279049eb52fefc99e
Signed-off-by: Scott Collyer <scollyer@google.com>
Signed-off-by: Furquan Shaikh <furquan@google.com>
Reviewed-on: https://chromium-review.googlesource.com/1551581
Commit-Ready: Furquan Shaikh <furquan@chromium.org>
Tested-by: Furquan Shaikh <furquan@chromium.org>
Reviewed-by: Jett Rink <jettrink@chromium.org>
Reviewed-by: Paul Fagerburg <pfagerburg@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1767512
Reviewed-by: Edward Hill <ecgh@chromium.org>
Commit-Queue: Edward Hill <ecgh@chromium.org>
Tested-by: Edward Hill <ecgh@chromium.org>
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BUG=b:113830171
BRANCH=octopus
TEST=check the power consumption is lower
Change-Id: I527cdc5d1e4dd5de137ab0927e66c171696758ce
Signed-off-by: James_Chao <james_chao@asus.corp-partner.google.com>
Reviewed-on: https://chromium-review.googlesource.com/1426306
Commit-Ready: James Chao <james_chao@asus.corp-partner.google.com>
Tested-by: James Chao <james_chao@asus.corp-partner.google.com>
Reviewed-by: Jett Rink <jettrink@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1767505
Reviewed-by: Edward Hill <ecgh@chromium.org>
Commit-Queue: Edward Hill <ecgh@chromium.org>
Tested-by: Edward Hill <ecgh@chromium.org>
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Now we have led_onoff_states instead of led_state of baseboard, to avoid
duplicate file so move forward to common code.
BUG=b:126460269
BRANCH=none
TEST=make buildall -j, make sure led behavior on meep intended as well.
Change-Id: I3adf20ebf2efd2f02b1ae101faf1c36f2f5ed454
Signed-off-by: Devin Lu <Devin.Lu@quantatw.com>
Reviewed-on: https://chromium-review.googlesource.com/1556869
Commit-Ready: ChromeOS CL Exonerator Bot <chromiumos-cl-exonerator@appspot.gserviceaccount.com>
Reviewed-by: Marco Chen <marcochen@chromium.org>
Reviewed-by: Paul Fagerburg <pfagerburg@chromium.org>
Reviewed-by: Diana Z <dzigterman@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1749722
Reviewed-by: Edward Hill <ecgh@chromium.org>
Commit-Queue: Edward Hill <ecgh@chromium.org>
Tested-by: Edward Hill <ecgh@chromium.org>
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This changes requires all boards to define the maximum number
of sensors they support. This will allow us to later create
static arrays with the appropriate length.
BUG=chromium:966506
BRANCH=None
TEST=make buildall
Change-Id: I5a2fa8f0fdcaef69065dfd4c2bfea4e3f371e986
Signed-off-by: Yuval Peress <peress@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1637414
Reviewed-by: Jett Rink <jettrink@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1719565
Reviewed-by: Edward Hill <ecgh@chromium.org>
Tested-by: Edward Hill <ecgh@chromium.org>
Commit-Queue: Edward Hill <ecgh@chromium.org>
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Now we have two MKBP delivery methods:
1. define CONFIG_MKBP_USE_HOST_EVENT to notify via host event
2. undef CONFIG_MKBP_USE_HOST_EVENT to notify via GPIO interrupt
It may become more complicated if new notification methods introduced.
e.g.: mt_scp uses IPI, rather than host event and GPIO interrupt.
This CL does:
1. add CONFIG_MKBP_USE_GPIO to explicilty declare that MKBP event are
sent via GPIO interrupt.
2. CONFIG_MKBP_USE_CUSTOM for boards which have custmized methods.
3. Remove weak attribute in mkbp_set_host_active (which can be done
with CONFIG_MKBP_USE_CUSTOM now.
4. Removes mkbp_set_host_active function in board Nocturne. It only
deliver MKBP events through GPIO interrupt now.
BRANCH=None
BUG=b:120808999
TEST=grep -rn "CONFIG_MKBP_USE_GPIO\|EC_INT_L" board/ baseboard/ and
see the result is reasonable:
1. EC_INT_L must be 1-to-1 mapped to define CONFIG_MKBP_USE_GPIO in
every board, except that meep, yorp, ampton which are defined in
baseboard octopus.
2. undef CONFIG_MKBP_USE_GPIO in bip and casta, which use host
event, but also have baseboard octopus.
Change-Id: I4af6110e4fd3c009968075c3623ef2d91cbd770b
Signed-off-by: Yilun Lin <yllin@google.com>
Reviewed-on: https://chromium-review.googlesource.com/1490794
Commit-Ready: Jett Rink <jettrink@chromium.org>
Tested-by: Yilun Lin <yllin@chromium.org>
Reviewed-by: Furquan Shaikh <furquan@chromium.org>
Reviewed-by: Jett Rink <jettrink@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1719541
Reviewed-by: Edward Hill <ecgh@chromium.org>
Tested-by: Edward Hill <ecgh@chromium.org>
Commit-Queue: Edward Hill <ecgh@chromium.org>
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Add GPIO_EC_RST_ODL to hibernate_wake_pins[] for Aleena + Careena + Liara
since the HW supports this as a PSL wake input.
BUG=b:122833270
BRANCH=grunt
TEST='dut-control cold_reset:on cold_reset:off' with ServoV2
Change-Id: I24a878be5e2c822b052a7d65b1964dcb6ed2ce94
Signed-off-by: Edward Hill <ecgh@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1658524
Reviewed-by: Raul E Rangel <rrangel@chromium.org>
Reviewed-by: Diana Z <dzigterman@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1709621
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When configuring DisplayPort alt mode, follow the spec more closely:
Place the USB Type-C pins that are to be re-configured to DisplayPort
Configuration into the Safe state before sending the configure command.
Then switch the pins to DisplayPort after receiving the ack to the
command.
For TYPEC_MUX_DOCK, the superspeed signals can remain connected. For
TYPEC_MUX_DP, disconnect the superspeed signals in svdm_dp_config,
then re-configure the pins to DisplayPort in svdm_dp_post_config.
This means we avoid an unnecessary disconnection in the TYPEC_MUX_DOCK
case (CL:1553572) but still follow the spec and put the pins in safe
state in the TYPEC_MUX_DP case.
BUG=b:123310411
BRANCH=grunt
TEST=External display works with both DOCK and DP pin modes.
Change-Id: I7de990e7dae053d089027cdc62094e5f8cd5ec4b
Signed-off-by: Edward Hill <ecgh@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/1575429
Tested-by: Raul E Rangel <rrangel@chromium.org>
Reviewed-by: Raul E Rangel <rrangel@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1603140
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This policy causes USB 3 to disconnect when doing DP negotiation. If
negotiation results in DOCK then the USB 3 lines are reconnected
resulting in renegotiating the USB device again.
There are other chromebooks already doing the same thing. e.g., oak.
BUG=b:123310411
TEST=Tried a test with a monitor and with a USB-C hub with HDMI.
Verified that the extra disconnect is gone.
Change-Id: I907e19689ff608ab2608e973875410cf94bb0053
Signed-off-by: Raul E Rangel <rrangel@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/1553572
Commit-Ready: ChromeOS CL Exonerator Bot <chromiumos-cl-exonerator@appspot.gserviceaccount.com>
Reviewed-by: Diana Z <dzigterman@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1603139
Reviewed-by: Edward Hill <ecgh@chromium.org>
Tested-by: Edward Hill <ecgh@chromium.org>
Commit-Queue: Edward Hill <ecgh@chromium.org>
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Per the VESA DisplayPort Alt Mode on USB Type-C spec, IRQ_HPD indicates
that a high to low followed by a low to high transition was detected.
Therefore, we should be checking when IRQ is high and HPD is low is
received as that is an error. This commit fixes that bug where were
comparing our level to the GPU instead of what was shown in the PDO.
BUG=chromium:920877
BRANCH=grunt
TEST=DP still works with dock and DP-only dongles.
Change-Id: If23bcc94951ca8c40efc35098e05ed2b5f3371d2
Signed-off-by: Edward Hill <ecgh@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/1530129
Commit-Ready: ChromeOS CL Exonerator Bot <chromiumos-cl-exonerator@appspot.gserviceaccount.com>
Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
Reviewed-by: Todd Broch <tbroch@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1603128
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When we are configuring a Type-C port for DisplayPort alternate mode, we
should check to see that the selected pin config supports multi-function
mode or not. This commit fixes a bug where we were setting the
SuperSpeed muxes based solely upon the Multi-function Preferred bit in
the DPStatus VDO. Some Type-C video adapters are buggy and set the MF
preferred bit without actually supporting an MF pin configuration.
Therefore, we trust the reported supported pin configurations in the
DiscMode VDO.
BUG=chromium:919756
BRANCH=grunt
TEST=DP still works with dock and DP-only dongles.
Change-Id: I3df2b67f29aaf2c725bba30a45bb902bdc44fcf4
Signed-off-by: Edward Hill <ecgh@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/1530128
Commit-Ready: ChromeOS CL Exonerator Bot <chromiumos-cl-exonerator@appspot.gserviceaccount.com>
Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1419122
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Send MKBP events (for sensor data) over GPIO instead of host event.
BUG=b:123750725
BRANCH=grunt
TEST=MKBP events still received
Change-Id: Ie1b02bbb8df44ade5ec6f1a4ba5dc4c5142e9f39
Signed-off-by: Edward Hill <ecgh@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/1452936
Reviewed-by: Enrico Granata <egranata@chromium.org>
Reviewed-by: Raul E Rangel <rrangel@chromium.org>
(cherry picked from commit 1f883987e9d71223058d7cb8771607977f3688d5)
Reviewed-on: https://chromium-review.googlesource.com/c/1470770
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A smaller sensor FIFO helps improve the behavior of CTS tests
that depend on sensor batching behavior.
BUG=b:123750725
TEST=run CTS tests on kasumi360
BRANCH=grunt
Change-Id: I067ea2eff9fdcd09b2e8819a03fc1cdf77a522a8
Signed-off-by: Enrico Granata <egranata@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/1454861
Commit-Ready: ChromeOS CL Exonerator Bot <chromiumos-cl-exonerator@appspot.gserviceaccount.com>
Reviewed-by: Edward Hill <ecgh@chromium.org>
Reviewed-by: Benjamin Gordon <bmgordon@chromium.org>
(cherry picked from commit e411cb7a70b25455d4f487de78e5dca100de9bf9)
Reviewed-on: https://chromium-review.googlesource.com/c/1456896
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Add LID sensor config in S0 for angle detection.
BUG=b:123099883
BRANCH=none
TEST=make buildall pass, check motion sense data update immediately.
Change-Id: I4cdcd9db54a5bbca5cf1eb452fd5d8a6edb3b6e1
Signed-off-by: David Huang <David.Huang@quantatw.com>
Reviewed-on: https://chromium-review.googlesource.com/c/1412199
Reviewed-by: Edward Hill <ecgh@chromium.org>
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Adjust Grunt baseboard to allow for per-sku support for motion sensors.
Use this to enable motion sensors for SKU 82 (Kasumi360).
Only enable the interrupt if the sensor is present.
BUG=b:119795894
BRANCH=grunt
TEST=Kasumi360 `ectool motionsense lid_angle` shows correct angles.
Change-Id: Icb34359d7ac4cd894776e134c2c1fb7032741f03
Signed-off-by: Edward Hill <ecgh@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/1362634
Reviewed-by: Ryan Zhang <ryan.zhang@quanta.corp-partner.google.com>
Reviewed-by: Jett Rink <jettrink@chromium.org>
Commit-Queue: Ryan Zhang <ryan.zhang@quanta.corp-partner.google.com>
Tested-by: Ryan Zhang <ryan.zhang@quanta.corp-partner.google.com>
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Some versions of some boards keep the port 0 PPC powered on while
the EC hibernates (so Closed Case Debugging keeps working).
Make sure the source FET is off and turn on the sink FET, so that
plugging in AC will wake the EC. This matches the dead-battery
behavior of the powered off PPC.
BUG=b:119850162,b:113654692
BRANCH=grunt
TEST=1) "ectool reboot_ec hibernate", wake on port 0 AC.
2) AP in S0, sink in port 0, EC console: "hibernate", unplug sink,
wake on port 0 AC.
Change-Id: I4dd7ebe5408bbb2d4c92da1a44ea8b4152dbb7da
Signed-off-by: Edward Hill <ecgh@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/1352059
Reviewed-by: Raul E Rangel <rrangel@chromium.org>
Reviewed-by: Jett Rink <jettrink@chromium.org>
(cherry picked from commit a478633db9e11c2300c113c8fb959adc9c894037)
Reviewed-on: https://chromium-review.googlesource.com/c/1351928
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Enable NPCX to deep sleep when idle to save power.
BUG=b:119879261
BRANCH=grunt
TEST=pp3300_ec_a_mw on Careena reduced by 19 in S0 and 14 in S3
> idlestats
Num idle calls that sleep: 136585
Num idle calls that deep-sleep: 9874
Time spent in deep-sleep: 824.368551s
Total time on: 884.911062s
Change-Id: I2cf515dc3ad983ecb1f6108f48bb5a51c5d7044b
Signed-off-by: Edward Hill <ecgh@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/1347014
Reviewed-by: Raul E Rangel <rrangel@chromium.org>
Reviewed-by: Diana Z <dzigterman@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/1349149
Reviewed-by: Martin Roth <martinroth@chromium.org>
Tested-by: Martin Roth <martinroth@chromium.org>
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Making style of tcpc_alert_event method match the style of other ToT
implementations.
BRANCH=grunt
BUG=none
TEST=octopus pd still works.
Change-Id: Id9132380a466b6e9580cff6d014f30e1c11de583
Signed-off-by: Jett Rink <jettrink@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/1283453
Commit-Ready: ChromeOS CL Exonerator Bot <chromiumos-cl-exonerator@appspot.gserviceaccount.com>
Reviewed-by: Edward Hill <ecgh@chromium.org>
Reviewed-by: Diana Z <dzigterman@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/1340494
Tested-by: Edward Hill <ecgh@chromium.org>
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The SN5S330 PPC will pull its /INT pin low until all interrupts are
cleared. Since the interrupt pin is treated as edge-sensitive, its
handler needs to provide level-checking before exiting. Otherwise, if
not all interrupts are cleared before the handler exits, the EC won't
see another edge to call the handler again.
Boards which share the PPC interrupt pin with other sources may choose
to implement their own callback, if they are able to determine which
chip was the source of the interrupt.
BUG=b:118846062
BRANCH=None
TEST=performed several power swaps and unplugs on a pair of Careenas,
verifying that in instances where the handler had to loop around we
correctly cleared the interrupts and the "ectool usbpdpower" output was
normal
Change-Id: Iccbe40976a746d109d67b9a91f8fbd81898f9b3f
Signed-off-by: Diana Z <dzigterman@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/1327123
Reviewed-by: Scott Collyer <scollyer@chromium.org>
Reviewed-by: Edward Hill <ecgh@chromium.org>
Reviewed-by: Jett Rink <jettrink@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/1335679
Reviewed-by: Martin Roth <martinroth@chromium.org>
Tested-by: Martin Roth <martinroth@chromium.org>
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Limit input current to 95% of negotiated limit
BUG=b:118859942
BRANCH=grunt
TEST=build/flash careena, connect adapter then check input current and
check ACProchot# is not asserted.
Change-Id: I256eb93e34c9415516cae698a782674e483a5dca
Signed-off-by: Devin Lu <Devin.Lu@quantatw.com>
Reviewed-on: https://chromium-review.googlesource.com/1149661
Reviewed-by: Edward Hill <ecgh@chromium.org>
Reviewed-by: Jett Rink <jettrink@chromium.org>
(cherry picked from commit ea653811fbf78f46df24a6761538a674b281a8fc)
Reviewed-on: https://chromium-review.googlesource.com/c/1333487
Commit-Queue: Edward Hill <ecgh@chromium.org>
Tested-by: Edward Hill <ecgh@chromium.org>
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Use board version and SKU ID from CBI EEPROM on Delan if the SKU ID
set via resistors + ADC is not valid.
BUG=b:76018320
BRANCH=grunt
TEST=Read CBI values from EEPROM
Change-Id: Ie37336934bd6687e46ad6ae62bc1b2e12355c83c
Signed-off-by: Edward Hill <ecgh@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/1301933
Reviewed-by: Jonathan Brandmeyer <jbrandmeyer@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/1309038
Reviewed-by: Martin Roth <martinroth@chromium.org>
Tested-by: Martin Roth <martinroth@chromium.org>
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Increase length of history buffer for port80 messages from 128 to 256.
This is enough to see all messages when resuming from S3 (which currently
produces 211 messages). Booting from S5 produces 848 messages, but making
the buffer that large seems excessive.
BUG=b:117949636
BRANCH=grunt
TEST=See buffer printed after boot and resume
Change-Id: I18a9e95a0a1a96c6bdab54d9a42d1211cd491e20
Signed-off-by: Edward Hill <ecgh@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/1292362
Reviewed-by: Jonathan Brandmeyer <jbrandmeyer@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/1299897
Reviewed-by: Martin Roth <martinroth@chromium.org>
Tested-by: Martin Roth <martinroth@chromium.org>
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A falling edge on PWR_BTN_L causes the AP to wake back up from S5.
Avoid this by increasing the delay before we assert PWR_BTN_L
to be longer than the time it takes to reach S5.
BUG=b:117676579
BRANCH=grunt
TEST=In S0; powerb 12000; S0->S5->G3
Change-Id: Idbfcb8a8d7dc7069a0f61d4b9e8f337ad60db405
Signed-off-by: Edward Hill <ecgh@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/1294949
Tested-by: Martin Roth <martinroth@chromium.org>
Tested-by: Devin Lu <Devin.Lu@quantatw.com>
Reviewed-by: Martin Roth <martinroth@chromium.org>
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These members of the grunt family do not include any motion sensors.
Remove them entirely, both to save space and to disable some factory
tests.
build/aleena/RW/space_free_flash grew by 12716 bytes: (62400 to 75116)
build/aleena/RW/space_free_ram grew by 9888 bytes: (30272 to 40160)
build/careena/RW/space_free_flash grew by 12864 bytes: (61664 to 74528)
build/careena/RW/space_free_ram grew by 9856 bytes: (30304 to 40160)
build/liara/RW/space_free_flash grew by 12724 bytes: (61364 to 74088)
build/liara/RW/space_free_ram grew by 9856 bytes: (30272 to 40128)
BRANCH=grunt
BUG=b:115649135
TEST=boot Careena. Observe that `ectool motionsense` returns an INVALID
COMMAND error, and that the EC console shows no attempt is made to
communicate with the sensors.
Change-Id: I322978fc80e36b999e77f9e3d54b175c6814fdcf
Signed-off-by: Jonathan Brandmeyer <jbrandmeyer@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/1262099
Reviewed-by: Edward Hill <ecgh@chromium.org>
(cherry picked from commit 634494ec964ac288222e7cd85f83d55a64aca7a1)
Reviewed-on: https://chromium-review.googlesource.com/c/1267218
Reviewed-by: Martin Roth <martinroth@chromium.org>
Tested-by: Martin Roth <martinroth@chromium.org>
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Considerably more work is needed to support the various driver
indirections that Grunt is using. This is a 'liberal' analysis, in the
sense that it is failing to include some driver paths in its stack
consumption analysis.
BRANCH=grunt
BUG=b:116610278
TEST=make BOARD=grunt analyzestack.
Change-Id: I6ff034935a749049b1ce6b544ea627b1772c7a80
Signed-off-by: Jonathan Brandmeyer <jbrandmeyer@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/1262100
Reviewed-by: Edward Hill <ecgh@chromium.org>
Reviewed-by: Jett Rink <jettrink@chromium.org>
(cherry picked from commit 95d9a9315d9bc58a85753c40b7e16a24684c073e)
Reviewed-on: https://chromium-review.googlesource.com/c/1265743
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Reduce PD_POWER_SUPPLY_TURN_OFF_DELAY to 30 milliseconds. Thanks
to PPC VBUS discharge, VBUS drops below 0.8V (vSafe0V) in well
under 10 milliseconds.
Also remove TODO comments for adjusting PD values, since these
all appear correct now.
BUG=b:69683108,b:69683178
BRANCH=grunt
TEST=check VBUS rise and fall on scope
Change-Id: I506851e13850dddda97ae9582a5c0aa7d66882c3
Signed-off-by: Edward Hill <ecgh@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/1259385
Reviewed-by: Jett Rink <jettrink@chromium.org>
(cherry picked from commit 5749693065ab209deee0a66e749302abd337b01c)
Reviewed-on: https://chromium-review.googlesource.com/c/1265416
Reviewed-by: Martin Roth <martinroth@chromium.org>
Tested-by: Martin Roth <martinroth@chromium.org>
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CONFIG_KEYBOARD_REFRESH_ROW3 and CONFIG_KEYBOARD_PWRBTN_ASSERTS_KSI3
were needed to work around a KSI03 bug on Grunt HW. The HW has been
fixed for Careena and later, so move these out of baseboard.
Grunt enter recovery (short power):
[0.045400 KB init state: -- 02 08 -- -- -- -- -- -- -- -- -- --]
Grunt enter recovery (hold power):
[0.045387 KB init state: 08 0a 08 08 08 -- 08 -- 08 08 -- 08 08]
Careena enter recovery (short power):
[0.077781 KB init state: -- 02 -- -- -- -- -- -- -- -- -- -- --]
Careena enter recovery (hold power):
[0.046569 KB init state: -- 02 -- -- -- -- -- -- -- -- -- -- --]
BUG=b:79758966
BRANCH=grunt
TEST=Esc+Refresh+Power gives recovery screen on Careena
Change-Id: I2660385c2f77ff84ac6fb71b8ae6a3569895ec2b
Signed-off-by: Edward Hill <ecgh@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/1257643
Commit-Ready: ChromeOS CL Exonerator Bot <chromiumos-cl-exonerator@appspot.gserviceaccount.com>
Reviewed-by: Jett Rink <jettrink@chromium.org>
(cherry picked from commit 0ab1b5f90f27fc42972adfbb791b9c417a4e4ead)
Reviewed-on: https://chromium-review.googlesource.com/c/1265074
Reviewed-by: Martin Roth <martinroth@chromium.org>
Tested-by: Martin Roth <martinroth@chromium.org>
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The MAX14637 BC 1.2 USB charger detection chip is functionally similar
to the bq24392 and can use the same driver. Rather than have 2 copies
of the same driver, or a generic named driver than can be used for
both chips, rename the existing bq24392 driver to max14637 as that's
the BC 1.2 chip that our current designs are using.
BUG=b:113267982
BRANCH=none
TEST=make -j buildall
Change-Id: I03cfb4918513d756c2a41341001a8162652a29b6
Signed-off-by: Scott Collyer <scollyer@google.com>
Reviewed-on: https://chromium-review.googlesource.com/1250031
Commit-Ready: Scott Collyer <scollyer@chromium.org>
Tested-by: Scott Collyer <scollyer@chromium.org>
Reviewed-by: Edward Hill <ecgh@chromium.org>
Reviewed-by: Jett Rink <jettrink@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/1265315
Reviewed-by: Jonathan Brandmeyer <jbrandmeyer@chromium.org>
Tested-by: Martin Roth <martinroth@chromium.org>
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Disable kbbacklit support for barla.
BUG=b:115882609
BRANCH=grunt
TEST=make buildall -j.
Change-Id: I966938bad94e1c63757a55df750fdbca862b671e
Signed-off-by: Devin Lu <Devin.Lu@quantatw.com>
Reviewed-on: https://chromium-review.googlesource.com/1235475
Reviewed-by: Edward Hill <ecgh@chromium.org>
(cherry picked from commit fac4b5b8552b9c3dbf20eb96fc67b137878aaedc)
Reviewed-on: https://chromium-review.googlesource.com/1242206
Reviewed-by: Martin Roth <martinroth@chromium.org>
Commit-Queue: Martin Roth <martinroth@chromium.org>
Tested-by: Martin Roth <martinroth@chromium.org>
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The body frame motion sensor will not be installed for Careena.
BUG=b:115649135
TEST=observe that the EC does not attempt to initialize any of its
motion sensors in the EC log.
BRANCH=grunt
Signed-off-by: Jonathan Brandmeyer <jbrandmeyer@chromium.org>
Change-Id: I0e7c2e9e39d290c21f20b766da4347a2e2902942
Reviewed-on: https://chromium-review.googlesource.com/1231474
Commit-Ready: Jett Rink <jettrink@chromium.org>
Tested-by: Jonathan Brandmeyer <jbrandmeyer@chromium.org>
Reviewed-by: Edward Hill <ecgh@chromium.org>
Reviewed-by: Jett Rink <jettrink@chromium.org>
(cherry picked from commit efa5d1dac544db64d0df45db31493c0f5d26dc2c)
Reviewed-on: https://chromium-review.googlesource.com/1242199
Reviewed-by: Martin Roth <martinroth@chromium.org>
Commit-Queue: Martin Roth <martinroth@chromium.org>
Tested-by: Martin Roth <martinroth@chromium.org>
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We do not need to set the port_addr variable most places because the
SS-MUX is also the TCPC and the tcpc_config_t information is used
instead.
Remove unused variable setting to avoid confusion.
BRANCH=none
BUG=none
TEST=buildall. phaser USB-C communication (and muxs) still work which is
a nominal case for all of these changes.
Change-Id: I72ee5da251956eb133091974e8dce5ac7f8787c6
Signed-off-by: Jett Rink <jettrink@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/1200064
Commit-Ready: ChromeOS CL Exonerator Bot <chromiumos-cl-exonerator@appspot.gserviceaccount.com>
Reviewed-by: Edward Hill <ecgh@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/1231473
Reviewed-by: Martin Roth <martinroth@chromium.org>
Commit-Queue: Martin Roth <martinroth@chromium.org>
Tested-by: Martin Roth <martinroth@chromium.org>
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Naming of many vector types and matrix types are not clear enough.
For example, we have:
vector_3_t, which is a vector of three int.
vec3_t, which is a vector of three float.
size4_t, which is a vector of four size_t.
mat33_t, which is a 3x3 matrix of float.
matrix_3x3_t, which is a 3x3 matrix of fixed point.
Besides, we have types like int8_t, uint16_t types.
To clearly distinguished types, the CL propose to,
For vector types, naming should be `$type + 'v' + $num + '_t'`:
vector_3_t becomes intv3_t
vec3_t becomes floatv3_t
vector 4 of uint16_t becomes uint16v4_t (which doesn't exist yet)
For matrix types, naming should be `mat$N$N_` + $type + '_t', where $N is the
matrix size:
matrix_3x3_t becomes mat33_fp_t # fp: fixed point
mat33_t becomes mat33_float_t
TEST=make buildall -j
BUG=b:114662791
Change-Id: I51d88d44252184e4b7b3564236833b0b892edc39
Signed-off-by: Yilun Lin <yllin@google.com>
Reviewed-on: https://chromium-review.googlesource.com/1215449
Commit-Ready: Yilun Lin <yllin@chromium.org>
Tested-by: Yilun Lin <yllin@chromium.org>
Reviewed-by: Nicolas Boichat <drinkcat@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/1230991
Reviewed-by: Martin Roth <martinroth@chromium.org>
Commit-Queue: Martin Roth <martinroth@chromium.org>
Tested-by: Martin Roth <martinroth@chromium.org>
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Any buttons except esc, left-shift, and down-arrow are considered as
'other key' and can cancel recovery mode entry if it's pressed at boot.
On some chromebooks (e.g. Grunt, Nami), the refresh key is not scanned
early enough (i.e. before the power button is released). Thus, the
refresh key unintentionally cancels recovery mode entry.
This change makes the EC ignore the refresh key at boot. This is
already done for Grunt using CONFIG_KEYBOARD_IGNORE_REFRESH_BOOT_KEY.
Signed-off-by: Daisuke Nojiri <dnojiri@chromium.org>
BUG=b:114134666
BRANCH=none
TEST=Put Akali in recovery mode without holding power button long.
Change-Id: I57d7cb8fb320a4960125cd96d4d3ae84687a74df
Reviewed-on: https://chromium-review.googlesource.com/1208229
Commit-Ready: Daisuke Nojiri <dnojiri@chromium.org>
Tested-by: Daisuke Nojiri <dnojiri@chromium.org>
Reviewed-by: Randall Spangler <rspangler@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/1230980
Reviewed-by: Martin Roth <martinroth@chromium.org>
Commit-Queue: Martin Roth <martinroth@chromium.org>
Tested-by: Martin Roth <martinroth@chromium.org>
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This converts the compile time option of
CONFIG_USB_PD_TCPM_TCPCI_MUX_ONLY into a runtime option to better
support draggon egg designs and reduce CONFIG complexity in general.
Introduce new mux_read/write to read from tcpc_config_t or mux driver
depending on new flag setting.
Audited all mux drivers for any use of tcpc_read/write and updated to
mux_read/write.
BRANCH=none
BUG=b:110937880
TEST=On Bip with CL stack:
Verified by connecting DP monitor at boot;
Verified plug / unplug of DP cable works;
Change-Id: I968893b886ff0ccc4074beae5ec42973814ae77c
Signed-off-by: Jett Rink <jettrink@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/1200062
Commit-Ready: Gaggery Tsai <gaggery.tsai@intel.corp-partner.google.com>
Reviewed-by: Scott Collyer <scollyer@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/1230979
Reviewed-by: Martin Roth <martinroth@chromium.org>
Commit-Queue: Martin Roth <martinroth@chromium.org>
Tested-by: Martin Roth <martinroth@chromium.org>
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