| Commit message (Collapse) | Author | Age | Files | Lines |
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We would prefer to use CONFIG_CHARGE_RAMP_HW to enable legacy BC1.2
charging but that feature of ISL9241 is broken (b/160287056) so we
have to use CONFIG_CHARGE_RAMP_SW instead.
BUG=b:163864475
BRANCH=zork
TEST=ramp up to 1.5A from legacy charger
Signed-off-by: Edward Hill <ecgh@chromium.org>
Change-Id: Iec0a4b82f42fd388d738362ce9a8de4d31c61054
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2382635
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Initiate the helper functions to parse the SSFC of CBI. The first and
only component in this version is TCPC in the port 1.
BRANCH=octopus
BUG=b:163922535
TEST=EC log of Meep device can output value of SSFC in CBI
Signed-off-by: Marco Chen <marcochen@chromium.org>
Change-Id: Iaee608a8b9791796fff0b31599c8be1bdc07cf3e
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2377058
Reviewed-by: Diana Z <dzigterman@chromium.org>
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Fix a couple of places missed in CL:2366456
BUG=b:161860605
BRANCH=zork
TEST=none
Signed-off-by: Edward Hill <ecgh@chromium.org>
Change-Id: Icb49da01b3575cfd81f57f01efcafea534212d8d
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2380160
Reviewed-by: Peter Marheine <pmarheine@chromium.org>
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On G3->S5, wait for GPIO_EC_FCH_RSMRST_L to be deasserted before
asserting GPIO_EC_FCH_PWR_BTN_L.
BUG=b:164921478
BRANCH=zork
TEST=power button timing
Signed-off-by: Edward Hill <ecgh@chromium.org>
Change-Id: Ib16f8ccf795382a26e70fd505e03c59db4eeaa88
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2378558
Reviewed-by: Furquan Shaikh <furquan@chromium.org>
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Add the charger number as an input for setting OTG output current and
enabling it, both in the charger driver and in
charge_set_output_current_limit(). Also add a clarifying note about the
intent of CHARGER_SOLO.
BRANCH=None
BUG=b:147440290
TEST=make -j buildall
Signed-off-by: Diana Z <dzigterman@chromium.org>
Change-Id: I7656c19a87d8216f5efc72dcffa6d638064d3e2f
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2376469
Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
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This saves 448 bytes of RO flash space. idlestats is unused by the FAFT
tests so it is safe to disable.
BUG=chromium:1122081
BRANCH=none
TEST=make buildall
Signed-off-by: Keith Short <keithshort@chromium.org>
Change-Id: I9f3a8bc73b10ade226e1812c5c39859770270f97
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2378551
Reviewed-by: Prashant Malani <pmalani@chromium.org>
Reviewed-by: Alexandru M Stan <amstan@chromium.org>
Reviewed-by: Jett Rink <jettrink@chromium.org>
Commit-Queue: Prashant Malani <pmalani@chromium.org>
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Now that the SM5803 has support for discharge on AC, move this
configuration into the baseboard.
BRANCH=None
BUG=b:164256610
TEST=on drawlat with a charger in C0, ensure "ectool chargecontrol
discharge" shows battery discharging and "ectool chargecontrol normal"
shows battery charging again. Repeat on C1
Signed-off-by: Diana Z <dzigterman@chromium.org>
Change-Id: Ib058095330481fc4aa2f1016ccec6c77b047d8f5
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2376467
Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
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This patch enables support for TCPMv2 for Intelrvp
BUG=b:142340399
BRANCH=none
TEST=TCPMv2/PD3.0 works properly on tglrvp.
Signed-off-by: Ayushee <ayushee.shah@intel.com>
Change-Id: If15fc23efbcd9716c322ad06bc78a8e16f957d8e
Signed-off-by: ravindr1 <ravindra@intel.com>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2299841
Reviewed-by: Vijay P Hiremath <vijay.p.hiremath@intel.com>
Reviewed-by: Tanu Malhotra <tanu.malhotra@intel.com>
Reviewed-by: Keith Short <keithshort@chromium.org>
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Enable the related CONFIG's.
BRANCH=None
BUG=b:148149387
TEST=Tried the following scenaiors:
(1) Host suspend event -> no AP_SUSPEND assertion -> timeout -> HANG_DETECT
-> wake AP up
(2) Host suspend event -> AP_SUSPEND assertion -> go to S3 -> SUSPEND
hook triggered
(3) Continue (2), AP_SUSPEND deassertion -> go to S0, host resume event
-> RESUME hook triggered
(4) Continue (2), AP_SUSPEND deassertion -> go to S0 -> AP_SUSPEND
assertion -> go to S3
(5) Continue (2), AP_SUSPEND deassertion -> timeout -> HANG_DETECT
-> wake AP up -> RESUME hook triggered
Change-Id: I8101c9fe61946c52e15834413c806a19f3a6df4d
Signed-off-by: Wai-Hong Tam <waihong@google.com>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2321877
Reviewed-by: Ting Shen <phoenixshen@chromium.org>
Reviewed-by: Stephen Boyd <swboyd@chromium.org>
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Separate tcpc_config from volteer baseboard to each
project board.
To meet different configurations on each board.
BUG=b:153705222
BRANCH=none
TEST=make buildall
Change-Id: Iea59518123a542ebe38be195eaf71b4a8f796550
Signed-off-by: Samsp_Liu <Samsp_Liu@compal.corp-partner.google.com>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2342183
Tested-by: SamSP Liu <samsp_liu@compal.corp-partner.google.com>
Commit-Queue: Keith Short <keithshort@chromium.org>
Reviewed-by: Keith Short <keithshort@chromium.org>
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Separate CONFIG_CHARGER_SENSE_RESISTOR and
CONFIG_CHARGER_SENSE_RESISTOR_AC from volteer baseboard
to each project board.
To meet different configurations on each board.
BUG=b:158257062
BRANCH=none
TEST=make buildall
Change-Id: Ib8290bd54d45054b82d7849e84119d419cbc8586
Signed-off-by: Samsp_Liu <Samsp_Liu@compal.corp-partner.google.com>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2346088
Tested-by: SamSP Liu <samsp_liu@compal.corp-partner.google.com>
Reviewed-by: Abe Levkoy <alevkoy@chromium.org>
Commit-Queue: SamSP Liu <samsp_liu@compal.corp-partner.google.com>
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If the BB retimer has a shared NVM we need 40ms delay after releasing
the RESET line to synchronize, load and initialize both the retimers.
On a non-shared NVM we need 20ms delay to load and initialize. In order
to synchronize, instead of 40ms delay this CL uses a MUTEX to lock
the access of another retimer by not releasing the RESET line until the
first retimer completes initialization.
BUG=b:165895649
BRANCH=none
TEST=Tested on volteer(non shared NVM), tglrvpu_ite (shared NVM)
Retimer is able to initialize (DP, USB, TBT, USB4 are detected)
Change-Id: I709377c2e6401faa26871289143d71665ee516d1
Signed-off-by: Vijay Hiremath <vijay.p.hiremath@intel.com>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2368223
Reviewed-by: Keith Short <keithshort@chromium.org>
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BUG=none
BRANCH=none
TEST=none
Signed-off-by: Edward Hill <ecgh@chromium.org>
Change-Id: I9eac47383695156ca0d222eb75f75492065720b7
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2364112
Reviewed-by: Denis Brockus <dbrockus@chromium.org>
Commit-Queue: Denis Brockus <dbrockus@chromium.org>
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Sometimes CONTROL1 was read 0xFF03 for unknown reason when the state
change from S0 to S3, but the second read will get the correct 0x0103.
Retry CONTROL1 read before update learn mode to make sure write the
correct value.
BUG=b:163076059 b:163136699
BRANCH=none
TEST=none
Signed-off-by: Sue Chen <sue.chen@quanta.corp-partner.google.com>
Change-Id: Iec56dab838b0aa362c543cce74d64615faf40bfc
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2362386
Tested-by: Edward Hill <ecgh@chromium.org>
Reviewed-by: Denis Brockus <dbrockus@chromium.org>
Commit-Queue: Edward Hill <ecgh@chromium.org>
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Move the PWM related defines and arrays into the board level, to allow
customization of what PWM channels boards use (if they choose to use the
PWM at all).
BRANCH=None
BUG=None
TEST=make -j buildall
Signed-off-by: Diana Z <dzigterman@chromium.org>
Change-Id: Id417a7be079511c17de9f2e5d03c729467435804
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2358899
Commit-Queue: Aseda Aboagye <aaboagye@chromium.org>
Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
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The RTD2141 MST hub on some daughterboard options requires the EC to drive
its HPD input because HPD comes over USB-PD, but the MST hub then drives
the AP's HPD input. The EC was incorrectly driving nothing, causing DP
outputs on port C1 to not be detected.
Because the MST's HPD input is connected to an IO expander on current
hardware, configure the USB-C and Trembyle-specific HPD twiddling code to
support regular or expander GPIOs. Experience says IO expanders tend to be
too slow for reliable HPD, but this should allow some (possibly flaky) HPD
support until hardware changes are completed to put the output directly on
an EC GPIO.
BUG=b:159051013,b:165622386
TEST=still builds (I have no v3 hardware to test against)
BRANCH=None
Signed-off-by: Peter Marheine <pmarheine@chromium.org>
Change-Id: I9e041ab7c222927a11b8972920b7e978ab30d751
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2366456
Reviewed-by: Edward Hill <ecgh@chromium.org>
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BUG=b:162907613
BRANCH=none
TEST=none
Signed-off-by: Edward Hill <ecgh@chromium.org>
Change-Id: Iddbba7d7955f252cacf666528195bbfc7d9718e6
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2365633
Reviewed-by: Denis Brockus <dbrockus@chromium.org>
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Increases Volteer RO and RW flash spaces by 7088 bytes each. This is the
net gain after including the init_rom layer.
BUG=b:160330682
BRANCH=none
TEST=make buildall
TEST=On volteer run "ectool motionsense" and "ectool motionsense
lid_angle". Verify both RO and RW images.
TEST=Program RO image with predecessor CL:2311268. Program this CL into
AP firmware image and verify EC software sync updates to RW image.
TEST=Verify BMI260 operation with CONFIG_CHIP_INIT_ROM_REGION disabled
using volteer_tcpmv1 board.
Signed-off-by: Keith Short <keithshort@chromium.org>
Change-Id: I6849b6c9e96756266528b39ab5e53268dce2a13c
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2311756
Reviewed-by: Jett Rink <jettrink@chromium.org>
Reviewed-by: caveh jalali <caveh@chromium.org>
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FORCE_PWR GPIO is used for keeping the BB retimer in active state during
f/w updating. On TGLRVP, control to enable the FORCE_PWR GPIO was given
to EC to support the I2C based F/W updating. I2C based f/w updating is
deprecated and the LSx interface is POR hence the FORCE_PWR GPIO control
is given to AP now. Thus, removing the FORCE_PWR GPIO from EC driver.
BUG=b:165214747
BRANCH=none
TEST=make buildall -j
Change-Id: If9bb7199a68c93f704f698552e5594a58bd68f7c
Signed-off-by: Vijay Hiremath <vijay.p.hiremath@intel.com>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2363334
Reviewed-by: Ayushee Shah <ayushee.shah@intel.com>
Reviewed-by: Keith Short <keithshort@chromium.org>
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This CL is derived from CL published on Volteer.
Change-Id: Iff6fa572c5660b67152f9930b9bad9f82ff6c6ee
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2360454
BUG=none
BRANCH=none
TEST='etool apreset' resets the AP
Change-Id: Ie2dd1fcd55dfdc42bd75a8c9b6846bce2f149b98
Signed-off-by: Vijay Hiremath <vijay.p.hiremath@intel.com>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2361103
Reviewed-by: Keith Short <keithshort@chromium.org>
Reviewed-by: Sooraj Govindan <sooraj.govindan@intel.corp-partner.google.com>
Commit-Queue: Keith Short <keithshort@chromium.org>
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Align the CONFIG_USB_PD_TRY_SRC_MIN_BATT_SOC to the value of
BATTERY_LEVEL_CRITICAL, which is 5%.
The BATTERY_LEVEL_CRITICAL is 5% that means EC will send battery-
critical host event when the battery level <= 5%.
CrOS PD policies state that the system doesn't source power to
any external USB devices when AP is shutdown.
So the current CONFIG_USB_PD_TRY_SRC_MIN_BATT_SOC 1% default has
no point. When the battery level is <= 5%, AP should be shutdown
soon and the system should not be a source, so should not enable
Try.SRC.
Also change the comparison from
soc >= CONFIG_USB_PD_TRY_SRC_MIN_BATT_SOC
to
soc > CONFIG_USB_PD_TRY_SRC_MIN_BATT_SOC
as the battery critical check is
soc <= BATTERY_LEVEL_CRITICAL.
BRANCH=None
BUG=b:165057418
TEST=Plugging a PD charger to a board with the battery level very low,
the system boots up (was failed),
Change-Id: If6b11feacd62fd003e13b1756eb5c33d2f9bbce4
Signed-off-by: Wai-Hong Tam <waihong@google.com>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2360543
Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
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For ITE variants of dedede, lower the EEPROM i2c speed to 400 kHz. This
allows more options for EEPROM parts, but still gives a good speed for
flashing the EC.
BRANCH=None
BUG=b:163846709
TEST=on drawlat, flash and verify CBI can still be read from the EC
Signed-off-by: Diana Z <dzigterman@chromium.org>
Change-Id: Id7d8190c80e7ff7b75ac0a25af12e7b137ddaaca
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2360457
Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
Commit-Queue: Aseda Aboagye <aaboagye@chromium.org>
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This command is needed so that the EC can perform an SoC-level cold
reset after the CSE Lite jumps from its RO to its RW image.
BUG=b:162977697
BRANCH=none
TEST=`ectool apreset` works
Signed-off-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
Change-Id: Iff6fa572c5660b67152f9930b9bad9f82ff6c6ee
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2360454
Reviewed-by: Keith Short <keithshort@chromium.org>
Commit-Queue: Keith Short <keithshort@chromium.org>
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For chip it8xxx2 series and it8320dx, we set embedded flash clock
48MHz as default.
BUG=none
BRANCH=none
TEST=build all
Signed-off-by: Ruibin Chang <ruibin.chang@ite.com.tw>
Change-Id: I100d70fbf80430ae98fa14c557886c4a37d8b93a
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2355164
Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
Commit-Queue: Ruibin Chang <Ruibin.Chang@ite.com.tw>
Tested-by: Ruibin Chang <Ruibin.Chang@ite.com.tw>
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BUG=none
BRANCH=none
TEST=Software sync enabled Coreboot selects EC RW at early stage
Change-Id: Ib10a15b8e0b006ea830fe1b07725bf4e8ce4591f
Signed-off-by: Vijay Hiremath <vijay.p.hiremath@intel.com>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2351624
Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org>
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TPMs with old firmware version cannot detect AP initiated reset eg. AP
gets reset when CSE Lite SKU jumps from RO to RW. Enable AP reset
command handler so that AP can request EC to perform the reset. This
will lead to TPM detecting the AP reset.
BUG=b:162386991
BRANCH=None
TEST=Ensure that the EC handles AP reset command. Ensure that the device
boots to OS after the reset.
Change-Id: I1e167af89aaa28c731674ee3650904d702efc8df
Signed-off-by: Karthikeyan Ramasubramanian <kramasub@google.com>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2337430
Reviewed-by: Diana Z <dzigterman@chromium.org>
Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
Tested-by: Karthikeyan Ramasubramanian <kramasub@chromium.org>
Commit-Queue: Karthikeyan Ramasubramanian <kramasub@chromium.org>
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Remove CONFIG_CHARGE_RAMP_HW to disable ISL9241_CONTROL0_INPUT_VTG_REGULATION
since the ISL9241 fails to detect charger unplug with input voltage loop
enabled.
BUG=b:160287056
BRANCH=none
TEST=charging and ac on/off works
Signed-off-by: Edward Hill <ecgh@chromium.org>
Change-Id: Ib0cb366204562ad725b35d2e24a89831dce7b7e7
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2340682
Reviewed-by: Denis Brockus <dbrockus@chromium.org>
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Add the allow list of the host events and MKBP events. Without this
allow list, any event will wake the AP up from suspend, that we don't
want.
The "AC plug/unplug" is new to the CrOS requirements.
BRANCH=None
BUG=b:163375086
TEST=Tested the positive wake sources:
* Press a key on the internal keyboard
* Plug AC
* Unplug AC
* Press the power button
* Switch the lid open
* suspend_stress_test which uses RTC host event
and tested the negative wake sources:
* Press the VolUp/VolDown button
Change-Id: If146aa82b66440160ea670554c0510a49ad00e6e
Signed-off-by: Wai-Hong Tam <waihong@google.com>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2348194
Reviewed-by: Duncan Laurie <dlaurie@google.com>
Reviewed-by: Stephen Boyd <swboyd@chromium.org>
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Change to use CBI board_version for I2C_PORT_CHARGER_V0 instead
of probing I2C.
BUG=b:155214765
BRANCH=none
TEST=boot to OS
Signed-off-by: Edward Hill <ecgh@chromium.org>
Change-Id: Id3e9d874439277af4d1c88acd6ab40a6bbea73ee
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2343742
Reviewed-by: Denis Brockus <dbrockus@chromium.org>
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Separate usb pd power config from volteer baseboard to each
project board.
To meet different configurations on each board.
BUG=b:159282888
BRANCH=none
TEST=halvor test
Change-Id: I5aba9c7c59ababd34e51906365b1ae2a28c256ea
Signed-off-by: Samsp_Liu <Samsp_Liu@compal.corp-partner.google.com>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2312001
Tested-by: SamSP Liu <samsp_liu@compal.corp-partner.google.com>
Reviewed-by: Abe Levkoy <alevkoy@chromium.org>
Commit-Queue: Abe Levkoy <alevkoy@chromium.org>
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IOEX01 USB_C1_POWER_SWITCH_ID check which ppc chip is supported.
0 for NX20P3483UK
1 for AOZ1380DI
IOEX10 USB_C1_PPC_ILIM_3A_EN to set vbus source current limit 3A
BUG=b:159634750
BRANCH=none
TEST=make sure C1 ppc_config setup correctly on AOZ board.
USB_C1_PPC_ILIM_3A_EN change level as plugging device in/out
port 1.
Change-Id: I1211ba39a02b8e42488dc56f110bc736e66ff41d
Signed-off-by: Sue Chen <sue.chen@quanta.corp-partner.google.com>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2253489
Reviewed-by: Edward Hill <ecgh@chromium.org>
Commit-Queue: Edward Hill <ecgh@chromium.org>
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Enabled battfake console command to run battery charger tests
like battery-cut off or hibernate on critical battery.
BUG=none
BRANCH=none
TEST=load onto volteer and use battfake console command to make
sure it works:
> battfake 2
Reporting fake battery level 2%,and DUT battery goes to cutoff state.
> battfake -1
Reporting real battery level
Change-Id: Ia4247e1e7a56fa3b45b143d31738fde0c2c96fa8
Signed-off-by: Madhu M <madhu.m@intel.corp-partner.google.com>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2336533
Reviewed-by: Vijay P Hiremath <vijay.p.hiremath@intel.com>
Reviewed-by: Keith Short <keithshort@chromium.org>
Reviewed-by: Madhusudanarao Amara <madhusudanarao.amara@intel.com>
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Increase the low power mode exit delay on Volteer to 50ms. The ps8815
TCPC in particular needs this extra time to work consistently with
non-PD chargers.
This change also ensures the low power mode exit timer is reset anytime
the TC enters the TC_LOW_POWER_MODE state.
BUG=b:160182500
BRANCH=none
TEST=make buildall
TEST=Insert 15W non-PD charger on Volteer: repeat 10 times
TEST=Insert USB type-A (7.5W advertised) on Volteer: repeat 10 times
Signed-off-by: Keith Short <keithshort@chromium.org>
Change-Id: I40fb4990478292e381421ef977f83b871796c130
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2325265
Tested-by: Eric Herrmann <eherrmann@chromium.org>
Reviewed-by: Abe Levkoy <alevkoy@chromium.org>
Reviewed-by: Denis Brockus <dbrockus@chromium.org>
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The flash layout for kalista boards splits the flash area into 4
segments, used for RO, RW_A, and RW_B images. The
CONFIG_EC_PROTECTED_STORAGE_SIZE and CONFIG_EC_WRITABLE_STORAGE_SIZE
options need to be adjusted to match.
BUG=b:160330682
BRANCH=none
TEST=make buildall
Signed-off-by: Keith Short <keithshort@chromium.org>
Change-Id: Ia087995840dd19250cdbd82de4456e90a9b28685
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2339837
Reviewed-by: Abe Levkoy <alevkoy@chromium.org>
Reviewed-by: Jett Rink <jettrink@chromium.org>
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The `charger_dump` command is currently useful for these boards.
BUG=None
BRANCH=None
TEST=Build drawcia, verify charger_dump command is present.
Signed-off-by: Aseda Aboagye <aaboagye@google.com>
Change-Id: I29cc70113be1c3c3096668c6d5969c4f755f915b
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2339843
Tested-by: Aseda Aboagye <aaboagye@chromium.org>
Auto-Submit: Aseda Aboagye <aaboagye@chromium.org>
Reviewed-by: Diana Z <dzigterman@chromium.org>
Commit-Queue: Diana Z <dzigterman@chromium.org>
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Allow AC prochot threshold to be increased to match PD max current.
BUG=b:162376053 b:162565066
BRANCH=none
TEST=prochot not asserted while battery charges
Signed-off-by: Edward Hill <ecgh@chromium.org>
Change-Id: I11761e8d2d15b52f7552e8d951c6633583ab5ba8
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2334353
Reviewed-by: Denis Brockus <dbrockus@chromium.org>
Tested-by: Michael5 Chen <michael5_chen1@pegatron.corp-partner.google.com>
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Google is working to change its source code to use more inclusive
language. To that end, replace the term "dummy" with inclusive
alternatives.
BUG=b:162781382
BRANCH=None
TEST=make -j buildall
`grep -ir dummy *`
The only results are in "private/nordic_keyboard/sdk8.0.0"
which is not our code.
Signed-off-by: Sam Hurst <shurst@google.com>
Change-Id: I6a42183d998e4db4bb61625f962867fda10722e2
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2335737
Reviewed-by: Tom Hughes <tomhughes@chromium.org>
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This change prepares to separate the sleep failure detection out of
intel_x86, such that other chipset power sequence can reuse the code.
It only touches the naming. No logic changes.
* Rename to CONFIG_POWER_SLEEP_FAILURE_DETECTION
* Modify the function and variable names, to avoid S0ix
* Modify the comment to more neutral
BRANCH=None
BUG=b:162083524
TEST=make buildall -j
Change-Id: I6a61c3b0a63af60913ee89e0ca343085fbd22308
Signed-off-by: Wai-Hong Tam <waihong@google.com>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2321872
Reviewed-by: Eric Yilun Lin <yllin@chromium.org>
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This patch rename thermal sensor name by placement for morphius,
and move board_get_temp from baseboard to variant
BUG=b:162325433
BRANCH=none
TEST=verify that thermal sensor name change in EC console
Signed-off-by: Zick Wei <zick.wei@quanta.corp-partner.google.com>
Change-Id: I46dfe5c8ebef29ed6ee7fdf342cfad9d39fe6ca3
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2325496
Reviewed-by: Edward Hill <ecgh@chromium.org>
Commit-Queue: Edward Hill <ecgh@chromium.org>
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This patch adds FW_CONFIG field for keyboard backlight present.
BUG=none
BRANCH=none
TEST=make buildall -j
Signed-off-by: Devin Lu <Devin.Lu@quantatw.com>
Change-Id: I9072a6f5a64ff922708201a5d7cc687a3d56e300
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2331976
Reviewed-by: Diana Z <dzigterman@chromium.org>
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Define the CONFIG_POWER_TRACK_HOST_SLEEP_STATE, which enable the host to
self-report its sleep state. The handling function is not defined, so it
just saves the state, no further action.
BRANCH=None
BUG=b:148149387
TEST=Without this CL, will show HC 0xa9 error on suspend/resume:
[35.916083 HC 0xa9 err 1]
as the host sleep event (0xa9) is not handled.
With this CL, the HC 0xa9 error doesn't happen.
Change-Id: I68036d9ca611104eaf651b4d4cae15571713ac90
Signed-off-by: Wai-Hong Tam <waihong@google.com>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2321870
Reviewed-by: Alexandru M Stan <amstan@chromium.org>
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This consolidates dedede boards to use a baseboard extpower_is_present()
and also adds the condition to verify that the port is sinking, instead
of providing Vbus. It also converts the RAA489000 boards to use the
cached Vbus presence in pd_snk_is_vbus_provided().
BRANCH=None
BUG=None
TEST=on waddledoo and waddledee, verify "AC on" prints when a charger or
charge-through servo v4 is plugged in, verify no "AC on" prints when a
dongle is plugged in
Signed-off-by: Diana Z <dzigterman@chromium.org>
Change-Id: I5941da789a4e810f6d8cc40cef4d32a5a03c5662
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2317062
Tested-by: Devin Lu <Devin.Lu@quantatw.com>
Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
Commit-Queue: Aseda Aboagye <aaboagye@chromium.org>
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Turning off vbus when we are not sourcing vbus causes
a bad behavior when we are cold booting in a batterless
manner. So made it conditional so we would be able to
run correctly with and without battery
BUG=b:162016100
BRANCH=none
TEST=trembyle cold boot with only AC power
Signed-off-by: Denis Brockus <dbrockus@google.com>
Change-Id: I77ad0487887078d6dd7514fd375558f10737fccb
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2317892
Tested-by: Denis Brockus <dbrockus@chromium.org>
Reviewed-by: Jett Rink <jettrink@chromium.org>
Commit-Queue: Denis Brockus <dbrockus@chromium.org>
Auto-Submit: Denis Brockus <dbrockus@chromium.org>
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After RSMRST sets, we configure a pull-up on PG_PP1020_ST_OD. This
pull-up is lost during GPIO init after a sysjump, so restore it before
the chipset init.
BRANCH=None
BUG=b:159863180
TEST=on waddledee and waddledoo, boot to the OS and run "sysjump rw" and
"sysjump ro" on the EC console
Signed-off-by: Diana Z <dzigterman@chromium.org>
Change-Id: I1b543329de976c5f64dbfbebf8f7576e70e63084
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2314939
Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
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Since the chipset task inits before the ADCs, we'll need to provide
pp3300_a_good by preserving it in the sysjump tags.
BRANCH=None
BUG=b:161887378,b:159863180
TEST=on drawlat, boot to S0 and sysjump back and forth between RO and
RW. Observe that the DUT remains at the ChromeOS login screen the whole
time.
Signed-off-by: Diana Z <dzigterman@chromium.org>
Change-Id: I3086f0bb2cd4b97c988c2365148b75b99954f380
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2314642
Tested-by: Devin Lu <Devin.Lu@quantatw.com>
Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
Commit-Queue: Aseda Aboagye <aaboagye@chromium.org>
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Enables EFS2 for all dedede boards
BRANCH=None
BUG=b:159350276
TEST=on waddledoo and waddledee, see successful EFS2 jump to RW early in
the boot process
Signed-off-by: Diana Z <dzigterman@chromium.org>
Change-Id: Ib2eccb28e0331bee718f8c5aec261d83115ec22e
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2299849
Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
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We should check the stable_current by the timestamp
rather than the inited value or not (i.e.
CHARGE_CURRENT_UNINITIALIZED). This is because
the stable_current might be modified to a previous measured
value to let the PDO selection pick the correct PDO by power
consumed. e.g.
1. Pick 9V PDO, set stable timestamp expired for 5 mins,
rewrite stable_current to CHARGE_CURRENT_UNINITIALIZED
2. At next iteration, if we only check stable_current, we
would try to pick a new PDO again, but however, the timestamp
is not expired yet.
BUG=b:160448099
TEST=ensure kakadu charging won't switch back to 5V immediately
after just picking 9V charging
BRANCH=kukui
Change-Id: I2bfd49a9e8fc5c6d5f4b84eb7da4262d2938f7a6
Signed-off-by: Eric Yilun Lin <yllin@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2309524
Reviewed-by: Ting Shen <phoenixshen@chromium.org>
Commit-Queue: Ting Shen <phoenixshen@chromium.org>
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This command allows printing of all the i2c traffic on a given port and
address, and can be useful when debugging driver issues.
BRANCH=None
BUG=None
TEST=make -j buildall
Signed-off-by: Diana Z <dzigterman@chromium.org>
Change-Id: I73749c8ba664a8df51e4e846a0e8d848099039cb
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2309065
Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
Commit-Queue: Aseda Aboagye <aaboagye@chromium.org>
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We don't want the OS to have access to our battery or anything on our
i2c busses. It's just confuses things.
BUG=b:160784792
TEST=See virtual battery being used
BRANCH=none
Change-Id: Icab307ea945d13c0a25dd8b4cd4ff8765b1bf6a4
Signed-off-by: Douglas Anderson <dianders@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2300460
Reviewed-by: Wai-Hong Tam <waihong@google.com>
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Enable Vivaldi keyboard for all Zork devices now that the related
coreboot support is present.
BUG=b:156200330
BRANCH=none
TEST=enter recovery, enter VT2
Signed-off-by: Edward Hill <ecgh@chromium.org>
Change-Id: Id64a1243aa3845bc61b05f62d888e6b84a8efda9
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2307716
Reviewed-by: Denis Brockus <dbrockus@chromium.org>
Commit-Queue: Denis Brockus <dbrockus@chromium.org>
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