summaryrefslogtreecommitdiff
path: root/baseboard
Commit message (Collapse)AuthorAgeFilesLines
* common: motion_sense: Require CONFIG_MOTION_SENSOR_MAX_COUNTYuval Peress2019-06-052-0/+2
| | | | | | | | | | | | | | | This changes requires all boards to define the maximum number of sensors they support. This will allow us to later create static arrays with the appropriate length. BUG=chromium:966506 BRANCH=None TEST=make buildall Change-Id: I5a2fa8f0fdcaef69065dfd4c2bfea4e3f371e986 Signed-off-by: Yuval Peress <peress@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1637414 Reviewed-by: Jett Rink <jettrink@chromium.org>
* Intelrvp: Adding PECI ifdef in temp_sensor_id enumAyushee2019-05-301-0/+2
| | | | | | | | | | | | | | | | | | | | When PECI is undefined, updating the memory map after initializing the sensors causes an illegal temp_sensor_read and raises an out of bound array index error. Hence, adding PECI ifdef to prevent accessing out of bound index. BUG=b:132061907 BRANCH=None TEST=Able to boot iclrvpy_ite all the way to chrome os Change-Id: I65dd0c3fd8419384e632d24ce137ebde2b9dc5ed Signed-off-by: Ayushee <ayushee.shah@intel.com> Reviewed-on: https://chromium-review.googlesource.com/1631932 Commit-Ready: ChromeOS CL Exonerator Bot <chromiumos-cl-exonerator@appspot.gserviceaccount.com> Tested-by: Ayushee Shah <ayushee.shah@intel.corp-partner.google.com> Legacy-Commit-Queue: Commit Bot <commit-bot@chromium.org> Reviewed-by: Jett Rink <jettrink@chromium.org> Reviewed-by: Vijay P Hiremath <vijay.p.hiremath@intel.com>
* Casta: Increase board_hibernate() wait to avoid hard resetsDiana Z2019-05-221-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | When hibernating with AC plugged in, casta will try negotiating down to 5V. This negotiation may sometimes take longer than the currently allocated sleep, causing the port partner to go into error recovery (re-sending PS_RDY, followed by soft resets, followed by a hard reset). This hard reset will wake the system back up from hibernation. Increasing this sleep to 300 ms appears to give enough time for a GoodCRC to be send to the PS_RDY message from the charger, avoiding the hard reset. Note that hibernating on AC is not a customer or factory requirement, as the typical EC hibernate scenario is when there is no external power and the battery needs to be conserved. BRANCH=octopus BUG=b:130687403 TEST=flashed to casta EVT, ran hibernate key sequence several times with AC plugged in and verified system hibernated Change-Id: Ia40ee63f3cf9a244ba35b4cc700e2b41eea1dde5 Signed-off-by: Diana Z <dzigterman@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/1584768 Tested-by: YongBeum Ha <ybha@samsung.com> Legacy-Commit-Queue: Commit Bot <commit-bot@chromium.org> Reviewed-by: Jett Rink <jettrink@chromium.org> Reviewed-by: YongBeum Ha <ybha@samsung.com>
* octopus: Support keypad function on BobbaSue Chen2019-05-211-0/+5
| | | | | | | | | | | | | | | | | | | | | | | 1. Using CONFIG_KEYBOARD_KEYPAD to choose actual_key_mask w or w/o keypad. 2. Enable keypad function on Bobba. 3. Disable scan KSO13 & 14 and modify actual_key_mask for SKU w/o keypad on Bobba. 4. taking care define of TEST_BUILD to prevent broke build since keyboard_cols from keyboard_scan.c is not in test-list-y yet. BUG=b:131095327 BRANCH=octopus TEST=`make buildall` and `make BOARD=bobba tests` both PASS Signed-off-by: Sue Chen <sue.chen@quanta.corp-partner.google.com> Change-Id: I0e98a8f60bf5022503b4a86ee8a5b2bbba3b3825 Reviewed-on: https://chromium-review.googlesource.com/1610390 Commit-Ready: Marco Chen <marcochen@chromium.org> Commit-Ready: David Huang <David.Huang@quantatw.com> Tested-by: Sue Chen <sue.chen@quanta.corp-partner.google.com> Legacy-Commit-Queue: Commit Bot <commit-bot@chromium.org> Reviewed-by: Marco Chen <marcochen@chromium.org> Reviewed-by: Sue Chen <sue.chen@quanta.corp-partner.google.com>
* Intelrvp: Add baseboard for Intel RVPsDaniel Gonzalez2019-05-2116-0/+1738
| | | | | | | | | | | | | | | | | | | | | | | | | | Intel-RVP supports Chrome EC via an Add In Card called as MECC (Modular Embedded Controller Card). MECC has a standard spec which defines pin routing and purpose of these pins. These MECC pins are same across all the platforms hence we can have a baseboard for Intel-RVPs and reuse the code for RVP board specific codes. Chrome MECC spec is standardized for Icelake and successor RVPs hence this baseboard code is applicable to Icelake and its successors only. BUG=b:132061907 TEST=Using this baseboard implemented board code for ICLRVP, and it can boot all the way to Chrome OS. BRANCH=none Change-Id: I4de891d4720e8cad83888caf9635f61f2ca11b8b Signed-off-by: Daniel Gonzalez <daniel.d.gonzalez@intel.com> Signed-off-by: Vijay Hiremath <vijay.p.hiremath@intel.com> Reviewed-on: https://chromium-review.googlesource.com/1594171 Commit-Ready: Jett Rink <jettrink@chromium.org> Commit-Ready: Vijay P Hiremath <vijay.p.hiremath@intel.com> Tested-by: Vijay P Hiremath <vijay.p.hiremath@intel.com> Legacy-Commit-Queue: Commit Bot <commit-bot@chromium.org> Reviewed-by: Jett Rink <jettrink@chromium.org>
* Zork/Trembyle: initial setupMartin Roth2019-05-215-0/+1321
| | | | | | | | | | | | | | | | | | Create Zork baseboard and Trembyle mainboard based on Grunt. Currently, these are a copy of Grunt with the names and copyright dates updated, and will be modified with Trembyle specific settings later. BUG=b:129697474 TEST=make BOARD=trembyle BRANCH=None Change-Id: Ice2e7943d0c013e81ccc4f84ca98c3c6fe1bf4b1 Signed-off-by: Martin Roth <martinroth@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/1554840 Commit-Ready: ChromeOS CL Exonerator Bot <chromiumos-cl-exonerator@appspot.gserviceaccount.com> Legacy-Commit-Queue: Commit Bot <commit-bot@chromium.org> Reviewed-by: Diana Z <dzigterman@chromium.org> Reviewed-by: Edward Hill <ecgh@chromium.org>
* baseboard: hatch: Limit printf on serial consoleGwendal Grignou2019-05-141-0/+8
| | | | | | | | | | | | | | | | | Once Sensors are enabled, there is a lot of host command traffic. Change chan mask to prevent printf overload. BUG=None BRANCH=master TEST=Less printf on the console. Change-Id: I5462e1220949821034fa4001bb5cd11942d48c70 Signed-off-by: Gwendal Grignou <gwendal@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/1593952 Commit-Ready: ChromeOS CL Exonerator Bot <chromiumos-cl-exonerator@appspot.gserviceaccount.com> Reviewed-by: Enrico Granata <egranata@chromium.org> Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org> Reviewed-by: Scott Collyer <scollyer@chromium.org>
* Revert "octopus: Support keypad function on Bobba"Justin TerAvest2019-05-101-5/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This reverts commit 73312c0f227d0b21d5ffa788caa4579c82c78731. Reason for revert: broke build Original change's description: > octopus: Support keypad function on Bobba > > 1. Using CONFIG_KEYBOARD_KEYPAD to choose actual_key_mask w or w/o keypad. > 2. Enable keypad function on Bobba. > 3. Disable scan KSO13 & 14 and modify actual_key_mask for SKU w/o keypad on > Bobba. > > BUG=b:131095327 > BRANCH=octopus > TEST=make buildall > > Change-Id: I33ea85ec3966b4bba64b2a5aa11f186b5b92c52b > Signed-off-by: Sue Chen <sue.chen@quanta.corp-partner.google.com> > Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1600944 > Reviewed-by: Marco Chen <marcochen@chromium.org> > Reviewed-by: Diana Z <dzigterman@chromium.org> Bug: b:131095327 Change-Id: Ic5228fb5047b6c3a6a05b9e8ce9e47677758c2e2 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1606072 Reviewed-by: Justin TerAvest <teravest@chromium.org> Commit-Queue: Justin TerAvest <teravest@chromium.org> Tested-by: Justin TerAvest <teravest@chromium.org>
* octopus: Support keypad function on BobbaSue Chen2019-05-101-0/+5
| | | | | | | | | | | | | | | | | 1. Using CONFIG_KEYBOARD_KEYPAD to choose actual_key_mask w or w/o keypad. 2. Enable keypad function on Bobba. 3. Disable scan KSO13 & 14 and modify actual_key_mask for SKU w/o keypad on Bobba. BUG=b:131095327 BRANCH=octopus TEST=make buildall Change-Id: I33ea85ec3966b4bba64b2a5aa11f186b5b92c52b Signed-off-by: Sue Chen <sue.chen@quanta.corp-partner.google.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1600944 Reviewed-by: Marco Chen <marcochen@chromium.org> Reviewed-by: Diana Z <dzigterman@chromium.org>
* hatch: Enable CONFIG_CMD_CHARGER_DUMPScott Collyer2019-05-091-0/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This CL enables CONFIG_CMD_CHARGER_DUMP which enables the EC console command 'charger_dump'. BUG=b:130209125 BRANCH=none TEST=manual >charger_dump 2019-04-30 17:47:16 25710 REG 12: e70e 2019-04-30 17:47:16 25710 REG 14: dc0 2019-04-30 17:47:16 25710 REG 15: 2260 2019-04-30 17:47:16 25710 REG 20: 8400 2019-04-30 17:47:16 25710 REG 21: a804 2019-04-30 17:47:16 25710 REG 22: 3b00 2019-04-30 17:47:16 25710 REG 23: b700 2019-04-30 17:47:16 25710 REG 24: 0 2019-04-30 17:47:16 25710 REG 25: 0 2019-04-30 17:47:16 25710 REG 26: 0 2019-04-30 17:47:16 25710 REG 30: 210 2019-04-30 17:47:16 25710 REG 31: 40b7 2019-04-30 17:47:16 25710 REG 32: 30 2019-04-30 17:47:16 25710 REG 33: 265 2019-04-30 17:47:16 25710 REG 34: 8124 2019-04-30 17:47:16 25710 REG 35: 40 2019-04-30 17:47:16 25710 REG 3b: 0 2019-04-30 17:47:16 25710 REG 3c: 0 2019-04-30 17:47:16 25710 REG 3d: 1c0 2019-04-30 17:47:16 25710 REG 3e: 1800 2019-04-30 17:47:16 25710 REG 3f: 3b00 2019-04-30 17:47:16 25710 REG fe: 40 2019-04-30 17:47:16 25710 REG ff: 89 Change-Id: I614f5afd78f2d8a3c4e6e28d0cc186616a3e5540 Signed-off-by: Scott Collyer <scollyer@google.com> Reviewed-on: https://chromium-review.googlesource.com/1580183 Commit-Ready: ChromeOS CL Exonerator Bot <chromiumos-cl-exonerator@appspot.gserviceaccount.com> Tested-by: Scott Collyer <scollyer@chromium.org> Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
* hatch/kohaku: Account for TCPC reset polarity in ALERT handlerScott Collyer2019-05-081-5/+9
| | | | | | | | | | | | | | | | | | | | | | Reset polarity was added to tcpc_config so that the reset function could be common across different boards which have different TCPC selections. This was applied to pd_reset_mcu(), however, that CL did not take into account the reset polarity in the tcpc_get_alert_status function. This CL fixes that oversight. In addition, this CL fixes the name for kohaku's port 0 TCPC reset line to match the schematic. BUG=b:130194031 BRANCH=none TEST=verified on Hatch that both ports 0/1 function correctly. Change-Id: I0d75d3655c799d4c74f4a6fb1805c06c1fe99c06 Signed-off-by: Scott Collyer <scollyer@google.com> Reviewed-on: https://chromium-review.googlesource.com/1582964 Commit-Ready: Scott Collyer <scollyer@chromium.org> Tested-by: Scott Collyer <scollyer@chromium.org> Reviewed-by: Furquan Shaikh <furquan@chromium.org>
* Octopus: Allow power role swap to sink in S0ixDiana Z2019-05-021-4/+9
| | | | | | | | | | | | | | | | | | | | | | | Currently, if a hub is plugged in during S0 and a system is suspended to S0ix, we will reject any requests from that hub to power role swap if it becomes powered (note this is not a concern for S5, when we will disconnect a sinking partner, so on becoming powered the hub would start a new connection). This change allows role swaps if we are currently sourcing a partner who could be providing us power instead. BUG=b:131267739 BRANCH=octopus TEST=plugged in unpowered 3-in-1 dongle to casta in S0, closed the lid to trigger S0ix, plugged in power to the dongle and saw power role swap was accepted Change-Id: I1a25372c681a06681abb28c58b96f73e9416404e Signed-off-by: Diana Z <dzigterman@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/1585121 Reviewed-by: Jett Rink <jettrink@chromium.org> Reviewed-by: Edward Hill <ecgh@chromium.org>
* grunt: Improve safe state when entering DP modeEdward Hill2019-04-241-31/+37
| | | | | | | | | | | | | | | | | | | | | | | | | | When configuring DisplayPort alt mode, follow the spec more closely: Place the USB Type-C pins that are to be re-configured to DisplayPort Configuration into the Safe state before sending the configure command. Then switch the pins to DisplayPort after receiving the ack to the command. For TYPEC_MUX_DOCK, the superspeed signals can remain connected. For TYPEC_MUX_DP, disconnect the superspeed signals in svdm_dp_config, then re-configure the pins to DisplayPort in svdm_dp_post_config. This means we avoid an unnecessary disconnection in the TYPEC_MUX_DOCK case (CL:1553572) but still follow the spec and put the pins in safe state in the TYPEC_MUX_DP case. BUG=b:123310411 BRANCH=grunt TEST=External display works with both DOCK and DP pin modes. Change-Id: I7de990e7dae053d089027cdc62094e5f8cd5ec4b Signed-off-by: Edward Hill <ecgh@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/1575429 Tested-by: Raul E Rangel <rrangel@chromium.org> Reviewed-by: Raul E Rangel <rrangel@chromium.org>
* hatch/kohaku: Account for different bc1.2 chipsScott Collyer2019-04-202-14/+0
| | | | | | | | | | | | | | | | | This CL moves bc1.2 configuration from baseboard.c/.h to the board.c/.h files for hatch and kohaku. BUG=b:130197995 BRANCH=none TEST=make -j BOARD=hatch and make -j BOARD=kohaku both are successful Change-Id: I2aa44d37a7a1d23196a766c95c59737838e9e09f Signed-off-by: Scott Collyer <scollyer@google.com> Reviewed-on: https://chromium-review.googlesource.com/1574788 Commit-Ready: ChromeOS CL Exonerator Bot <chromiumos-cl-exonerator@appspot.gserviceaccount.com> Tested-by: Scott Collyer <scollyer@chromium.org> Reviewed-by: Aseda Aboagye <aaboagye@chromium.org> Reviewed-by: Furquan Shaikh <furquan@chromium.org>
* common: led_onoff_states: move forward baseboard led_state to common codeDevin Lu2019-04-204-318/+1
| | | | | | | | | | | | | | | | | Now we have led_onoff_states instead of led_state of baseboard, to avoid duplicate file so move forward to common code. BUG=b:126460269 BRANCH=none TEST=make buildall -j, make sure led behavior on meep intended as well. Change-Id: I3adf20ebf2efd2f02b1ae101faf1c36f2f5ed454 Signed-off-by: Devin Lu <Devin.Lu@quantatw.com> Reviewed-on: https://chromium-review.googlesource.com/1556869 Commit-Ready: ChromeOS CL Exonerator Bot <chromiumos-cl-exonerator@appspot.gserviceaccount.com> Reviewed-by: Marco Chen <marcochen@chromium.org> Reviewed-by: Paul Fagerburg <pfagerburg@chromium.org> Reviewed-by: Diana Z <dzigterman@chromium.org>
* hatch/kohaku: Move HDMI support to board-specific.Tim Wawrzynczak2019-04-191-3/+0
| | | | | | | | | | | | | | | | Hatch baseboard contained HDMI support, but Kohaku does not have HDMI support, so that code is moved to Hatch board specific code instead. BUG=b:130577280 BRANCH=none TEST=Kled device still works with HDMI; detects when HDMI is plugged in and correctly uses the extra display. Change-Id: Idfcea36068b441c8ad499c1f42f0f0ecf681f978 Signed-off-by: Tim Wawrzynczak <twawrzynczak@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/1574698 Reviewed-by: Scott Collyer <scollyer@chromium.org> Reviewed-by: Paul Fagerburg <pfagerburg@chromium.org>
* hatch/kohaku: Remove Type A USB support for Kohaku.Tim Wawrzynczak2019-04-192-13/+0
| | | | | | | | | | | | | | | | Move USB Type A support from Hatch baseboard to Hatch board because not all Hatch variants support Type A. BUG=b:130577280 BRANCH=none TEST=Kled device still recognizes Type-A USB flash drive. Change-Id: I23b21b069727d57b8fea29de5bbf4e255cf3a3a9 Signed-off-by: Tim Wawrzynczak <twawrzynczak@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/1573019 Commit-Ready: ChromeOS CL Exonerator Bot <chromiumos-cl-exonerator@appspot.gserviceaccount.com> Reviewed-by: Scott Collyer <scollyer@chromium.org> Reviewed-by: Paul Fagerburg <pfagerburg@chromium.org>
* hatch/kohaku: Move TCPC definitions to board from baseboardScott Collyer2019-04-172-59/+31
| | | | | | | | | | | | | | | | | | | | Kohaku uses PS8751 for port 0 TCPC. Therefore, the TCPC config and mux config tables can't be common and must be moved out of baseboard into their respective board.c files. BUG=b:130194031 BRANCH=none TEST=make -j buildall Change-Id: Iea39e60d675a5ea0df346c52e78f5f472768984c Signed-off-by: Scott Collyer <scollyer@google.com> Signed-off-by: Furquan Shaikh <furquan@google.com> Reviewed-on: https://chromium-review.googlesource.com/1551582 Commit-Ready: Furquan Shaikh <furquan@chromium.org> Tested-by: Furquan Shaikh <furquan@chromium.org> Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org> Reviewed-by: Jett Rink <jettrink@chromium.org> Reviewed-by: Paul Fagerburg <pfagerburg@chromium.org>
* tcpm: Refactor tcpc_config to include a flags fieldScott Collyer2019-04-176-15/+26
| | | | | | | | | | | | | | | | | | | | | | | | tcpc_config contained a field for both the alert polarity and open drain/push pull configuration. There is also a possible difference in TCPC reset polarity. Instead of adding yet another field to describe this configuration, it would be better to convert alert polairty, open drain and reset polarity into a single flags field. This CL modifies the tcpc_config struct to use a single flags field and adds defines for what existing flag options can be. BUG=b:130194031 BRANCH=none TEST=make -j buildall Change-Id: Ifb7e7604edb7021fb2d36ee279049eb52fefc99e Signed-off-by: Scott Collyer <scollyer@google.com> Signed-off-by: Furquan Shaikh <furquan@google.com> Reviewed-on: https://chromium-review.googlesource.com/1551581 Commit-Ready: Furquan Shaikh <furquan@chromium.org> Tested-by: Furquan Shaikh <furquan@chromium.org> Reviewed-by: Jett Rink <jettrink@chromium.org> Reviewed-by: Paul Fagerburg <pfagerburg@chromium.org>
* grunt/usb_pd_policy: Don't disconnect the USB lines while negotiating PDRaul E Rangel2019-04-091-2/+12
| | | | | | | | | | | | | | | | | | This policy causes USB 3 to disconnect when doing DP negotiation. If negotiation results in DOCK then the USB 3 lines are reconnected resulting in renegotiating the USB device again. There are other chromebooks already doing the same thing. e.g., oak. BUG=b:123310411 TEST=Tried a test with a monitor and with a USB-C hub with HDMI. Verified that the extra disconnect is gone. Change-Id: I907e19689ff608ab2608e973875410cf94bb0053 Signed-off-by: Raul E Rangel <rrangel@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/1553572 Commit-Ready: ChromeOS CL Exonerator Bot <chromiumos-cl-exonerator@appspot.gserviceaccount.com> Reviewed-by: Diana Z <dzigterman@chromium.org>
* hatch: Enable CONFIG_POWER_S0IX_FAILURE_DETECTIONEvan Green2019-04-031-0/+1
| | | | | | | | | | | | | | | | | | Enable the shiny new S0ix failure detection code that will wake the AP after a specified timeout if the system attempted to go into S0ix but went into a shallower state instead. BUG=b:123716513 BRANCH=None TEST=Test S0ix with a modified EC firmware and kernel changes. Signed-off-by: Evan Green <evgreen@chromium.org> Change-Id: Ia981cdc34a98bcf877dec78067173bf1c0f9e700 Reviewed-on: https://chromium-review.googlesource.com/1509717 Commit-Ready: Evan Green <evgreen@chromium.org> Tested-by: Evan Green <evgreen@chromium.org> Reviewed-by: Furquan Shaikh <furquan@chromium.org>
* bip: Delete boardEvan Green2019-04-021-1/+1
| | | | | | | | | | | | | | | | | | | | | | bip has an it8320bx with 256kB of flash space. After dividing by two and subtracting 0x800, this means the RO section of bip is 126kB. This is very tight. We've already removed a few commands to free up space, but this board hasn't been worked on since summer 2018. Delete it to avoid excessive maintenance burden. BUG=b:129283539 BRANCH=none TEST=make -j buildall CQ-DEPEND=CL:1538819,CL:*1086038 Signed-off-by: Evan Green <evgreen@chromium.org> Change-Id: Iac903397dd653c8e012c8b3956807ba1bacf681e Reviewed-on: https://chromium-review.googlesource.com/1536490 Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org> Reviewed-by: Karthikeyan Ramasubramanian <kramasub@chromium.org> Reviewed-by: Jett Rink <jettrink@chromium.org>
* grunt: Check IRQ and HPD in DPStatus message.Edward Hill2019-03-261-1/+1
| | | | | | | | | | | | | | | | | | | Per the VESA DisplayPort Alt Mode on USB Type-C spec, IRQ_HPD indicates that a high to low followed by a low to high transition was detected. Therefore, we should be checking when IRQ is high and HPD is low is received as that is an error. This commit fixes that bug where were comparing our level to the GPU instead of what was shown in the PDO. BUG=chromium:920877 BRANCH=grunt TEST=DP still works with dock and DP-only dongles. Change-Id: If23bcc94951ca8c40efc35098e05ed2b5f3371d2 Signed-off-by: Edward Hill <ecgh@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/1530129 Commit-Ready: ChromeOS CL Exonerator Bot <chromiumos-cl-exonerator@appspot.gserviceaccount.com> Reviewed-by: Aseda Aboagye <aaboagye@chromium.org> Reviewed-by: Todd Broch <tbroch@chromium.org>
* grunt: Check DP MF-bit against selected pin cfgEdward Hill2019-03-261-2/+12
| | | | | | | | | | | | | | | | | | | | | When we are configuring a Type-C port for DisplayPort alternate mode, we should check to see that the selected pin config supports multi-function mode or not. This commit fixes a bug where we were setting the SuperSpeed muxes based solely upon the Multi-function Preferred bit in the DPStatus VDO. Some Type-C video adapters are buggy and set the MF preferred bit without actually supporting an MF pin configuration. Therefore, we trust the reported supported pin configurations in the DiscMode VDO. BUG=chromium:919756 BRANCH=grunt TEST=DP still works with dock and DP-only dongles. Change-Id: I3df2b67f29aaf2c725bba30a45bb902bdc44fcf4 Signed-off-by: Edward Hill <ecgh@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/1530128 Commit-Ready: ChromeOS CL Exonerator Bot <chromiumos-cl-exonerator@appspot.gserviceaccount.com> Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
* hatch: Enabling tablet modezack_yang2019-03-191-0/+3
| | | | | | | | | | | | | | | | | | | | | | | EC should send an event to host when the mode change BUG=b:125355874 BRANCH=none TEST= On proto boards, rotate your lid sensor until the lid_angle is 270 degree, you will see the log in ec console. [146.851540 tablet mode enabled] [146.851961 event set 0x0000000010000000] And then rotate it back to 90 degree, you will see the log in ec console. [219.552181 tablet mode disabled] [219.552606 event set 0x0000000010000000] Change-Id: Id0f3b5b18fdfd5117fc5feab4472cd2709cb1705 Signed-off-by: zack_yang <zack_yang@compal.corp-partner.google.com> Reviewed-on: https://chromium-review.googlesource.com/1523269 Commit-Ready: Zack Yang <zack_yang@compal.corp-partner.google.com> Tested-by: Furquan Shaikh <furquan@chromium.org> Tested-by: Zack Yang <zack_yang@compal.corp-partner.google.com> Reviewed-by: Furquan Shaikh <furquan@chromium.org> Reviewed-by: Zack Yang <zack_yang@compal.corp-partner.google.com>
* hatch: Enable PP5000_CONTROL for BC1.2 to work in G3Scott Collyer2019-03-161-0/+1
| | | | | | | | | | | | | | | | | | This CL adds the config option CONFIG_POWER_PP5000_CONTROL which enables both power sequencing and bc1.2 detection to request PP5000_A rail to be either on or off. BUG=b:122265772 BRANCH=none TEST=Verfied that bc1.2 detection no longer fails when the AP is in G3. Change-Id: Iff0d33ce302a0f15687248621fb5d1c6c6df9129 Signed-off-by: Scott Collyer <scollyer@google.com> Reviewed-on: https://chromium-review.googlesource.com/1503957 Commit-Ready: Furquan Shaikh <furquan@chromium.org> Tested-by: Scott Collyer <scollyer@chromium.org> Reviewed-by: Aseda Aboagye <aaboagye@chromium.org> Reviewed-by: Furquan Shaikh <furquan@chromium.org>
* hatch: Enable sensors sync via dedicated IRQ pinPhilip Chen2019-03-141-5/+1
| | | | | | | | | | | | | | | | BUG=b:125933998 BRANCH=none TEST=build Change-Id: I4633fc18b259710fd27ecec700d9dc9b5ab462aa Signed-off-by: Philip Chen <philipchen@google.com> Reviewed-on: https://chromium-review.googlesource.com/1510513 Commit-Ready: Philip Chen <philipchen@chromium.org> Commit-Ready: Patrick Georgi <pgeorgi@chromium.org> Tested-by: Furquan Shaikh <furquan@chromium.org> Reviewed-by: Furquan Shaikh <furquan@chromium.org> Reviewed-by: Scott Collyer <scollyer@chromium.org> Reviewed-by: Enrico Granata <egranata@chromium.org>
* hatch: Add CONFIG_DPTFScott Collyer2019-03-131-0/+1
| | | | | | | | | | | | | | | | | | | | | | | This has been enabled on the kernel side now so adding the corresponding EC config option. BUG=b:124316213 BRANCH=none TEST=Manual Was seeing these messages: [93.430899 ACPI write 0x06 = 0x8a (ignored)] [93.431952 ACPI write 0x07 = 0x03 (ignored)] [93.433216 ACPI write 0x05 = 0x02 (ignored)] Verfied these messages are no longer being logged and fan is in RPM mode. Change-Id: I5109cb1a09ac4ffac47f2cd8e934ce6f1682e916 Signed-off-by: Scott Collyer <scollyer@google.com> Reviewed-on: https://chromium-review.googlesource.com/1512136 Commit-Ready: Scott Collyer <scollyer@chromium.org> Tested-by: Scott Collyer <scollyer@chromium.org> Reviewed-by: Furquan Shaikh <furquan@chromium.org>
* hatch: Disable HW_RAMP until bq25710 ICO mode is changedScott Collyer2019-03-131-1/+0
| | | | | | | | | | | | | | | | | | | | | | | | | The charge hw ramp implementation in the bq25710 is implemented by enabling ICO (input current optimizer) mode, waiting for it to complete, then reading optimized current value from the IIN_DPM register. This is not the correct use case for ICO mode. It has certain issues, the most serious of which is that if a battery isn't present or if the battery doesn't have enough charge to power the system, it will cause PPVAR_VSYS to collapse. To avoid the issue mentioned above, disable the hw ramp config until the hw ramp implementation of the bq25710 is reworked. BUG=b:126229130 BRANCH=none TEST=make BOARD=hatch and verifed that ICO mode is not longer activated. Change-Id: I736c21ad269742650cc62939995c4caa77154b6b Signed-off-by: Scott Collyer <scollyer@google.com> Reviewed-on: https://chromium-review.googlesource.com/1512135 Commit-Ready: Scott Collyer <scollyer@chromium.org> Tested-by: Scott Collyer <scollyer@chromium.org> Reviewed-by: Furquan Shaikh <furquan@chromium.org>
* mkbp_event,include/config.h: Clarify MKBP delivery method.Yilun Lin2019-03-071-1/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Now we have two MKBP delivery methods: 1. define CONFIG_MKBP_USE_HOST_EVENT to notify via host event 2. undef CONFIG_MKBP_USE_HOST_EVENT to notify via GPIO interrupt It may become more complicated if new notification methods introduced. e.g.: mt_scp uses IPI, rather than host event and GPIO interrupt. This CL does: 1. add CONFIG_MKBP_USE_GPIO to explicilty declare that MKBP event are sent via GPIO interrupt. 2. CONFIG_MKBP_USE_CUSTOM for boards which have custmized methods. 3. Remove weak attribute in mkbp_set_host_active (which can be done with CONFIG_MKBP_USE_CUSTOM now. 4. Removes mkbp_set_host_active function in board Nocturne. It only deliver MKBP events through GPIO interrupt now. BRANCH=None BUG=b:120808999 TEST=grep -rn "CONFIG_MKBP_USE_GPIO\|EC_INT_L" board/ baseboard/ and see the result is reasonable: 1. EC_INT_L must be 1-to-1 mapped to define CONFIG_MKBP_USE_GPIO in every board, except that meep, yorp, ampton which are defined in baseboard octopus. 2. undef CONFIG_MKBP_USE_GPIO in bip and casta, which use host event, but also have baseboard octopus. Change-Id: I4af6110e4fd3c009968075c3623ef2d91cbd770b Signed-off-by: Yilun Lin <yllin@google.com> Reviewed-on: https://chromium-review.googlesource.com/1490794 Commit-Ready: Jett Rink <jettrink@chromium.org> Tested-by: Yilun Lin <yllin@chromium.org> Reviewed-by: Furquan Shaikh <furquan@chromium.org> Reviewed-by: Jett Rink <jettrink@chromium.org>
* hatch: Remove CONFIG_USB_PD_VBUS_MEASURE_NOT_PRESENTPhilip Chen2019-03-011-1/+0
| | | | | | | | | | | | | | CL:1479877 has enabled bq25710 charger to measure VBUS. BUG=b:124968142 BRANCH=none TEST=build Change-Id: Id08797e6c668acc96a4fc6c7805e1bd01885b0be Signed-off-by: Philip Chen <philipchen@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/1496159 Commit-Ready: ChromeOS CL Exonerator Bot <chromiumos-cl-exonerator@appspot.gserviceaccount.com> Reviewed-by: Scott Collyer <scollyer@chromium.org>
* hatch: Add support for BMA253 lid accel sensor and lid angle detectionScott Collyer2019-02-271-0/+11
| | | | | | | | | | | | | | | | | | | | | This CL adds the config options required for the BMA253 lid accel sensor. It also adds the configuration table, mutex, and rotation matrix. BUG=b:124337208 BRANCH=none TEST=Verified the sensor readings using 'accelinfo on 10000' and the numbers change on the desired axis when the sensor is moved. The signs can't be verified yet because it's not properly mounted on P0. Change-Id: I2943a82a91472d105d97dba76917f40817f5624e Signed-off-by: Scott Collyer <scollyer@google.com> Reviewed-on: https://chromium-review.googlesource.com/1468865 Commit-Ready: Scott Collyer <scollyer@chromium.org> Tested-by: Scott Collyer <scollyer@chromium.org> Tested-by: Zack Yang <zack_yang@compal.corp-partner.google.com> Reviewed-by: Gwendal Grignou <gwendal@chromium.org> Reviewed-by: Furquan Shaikh <furquan@chromium.org>
* hatch: Add support for base accelgyro bmi160 sensorScott Collyer2019-02-271-0/+20
| | | | | | | | | | | | | | | | | | | | | | This CL adds the motion_sensor_t table, config options, gpio interrupt signal, and rotation matrix required for the bmi160 base accel/gyro sensor. BUG=b:124337208 BRANCH=none TEST=Verfied with 'ectool motionsense' that sensor readings are present and that values move in the expected direction as I rotated the unit along it's X and Y axis. Also verified the gyro sensor returns non-zero values when moving the system. Change-Id: I57c323916662a4ee0b9aa3fc00c3a4bf18aaef40 Signed-off-by: Scott Collyer <scollyer@google.com> Reviewed-on: https://chromium-review.googlesource.com/1464393 Commit-Ready: Scott Collyer <scollyer@chromium.org> Tested-by: Scott Collyer <scollyer@chromium.org> Tested-by: Zack Yang <zack_yang@compal.corp-partner.google.com> Reviewed-by: Gwendal Grignou <gwendal@chromium.org> Reviewed-by: Furquan Shaikh <furquan@chromium.org>
* hatch: Enable CONFIG_CPU_PROCHOT_ACTIVE_LOWPhilip Chen2019-02-191-0/+1
| | | | | | | | | | | | | EC_PROCHOT_ODL is active low. BUG=b:123931545 BRANCH=none TEST=boot the board and verify EC doesn't pull EC_PROCHOT_ODL low Change-Id: Ida070a106e29aaf830dc38f76bb4f046c6d1fb49 Signed-off-by: Philip Chen <philipchen@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/1471283 Reviewed-by: Furquan Shaikh <furquan@chromium.org>
* hatch: Enable bc1.2 supportScott Collyer2019-02-192-1/+22
| | | | | | | | | | | | | | | | | | This CL adds the config options and GPIO signals and interrupt handler required for bc1.2 for the pi3usb8201 chip. BUG=b:123995100 BRANCH=none TEST=Verified that bc1.2 detection occurs following connecting a charger and a EC reboot. Verified that the D+/D- switches are closed in both client and host mode as expected. Change-Id: I43ca74f02d2515dc4dfa3dd8dc689d719779e4b5 Signed-off-by: Scott Collyer <scollyer@google.com> Reviewed-on: https://chromium-review.googlesource.com/1459822 Commit-Ready: ChromeOS CL Exonerator Bot <chromiumos-cl-exonerator@appspot.gserviceaccount.com> Tested-by: Scott Collyer <scollyer@chromium.org> Reviewed-by: Furquan Shaikh <furquan@chromium.org>
* Casta: Tune USB mux registersDiana Z2019-02-141-0/+10
| | | | | | | | | | | | | | | | | | Casta is currently having issues with its Rx measurement on port 0. With this change, the mux registers on the PS8751 for port 0 should be tuned every time the TCPC comes out of low power mode. BUG=b:122987819 BRANCH=octopus TEST=builds, loaded onto casta and confirmed register 0xE7 read 0x40 from the ec console Change-Id: Ieb884eeaddc418f97ace69b9db0041d50fe2b5d9 Signed-off-by: Diana Z <dzigterman@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/1430953 Commit-Ready: YongBeum Ha <ybha@samsung.com> Tested-by: YongBeum Ha <ybha@samsung.com> Reviewed-by: Jett Rink <jettrink@chromium.org>
* hatch: Enable S0IX config optionsScott Collyer2019-02-131-3/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | These config options were commented out to remove S0iX for initial board bring up. But, now these should be enabled. BUG=b:124332057 BRANCH=none TEST=Manual Issued the following commands on the AP console to force S0iX: iotools mmio_write32 0xfe001b1c 0xabc0900a echo freeze > /sys/power/state Then verified the EC sees the S0iX state: > powerinfo [100.716103 power state 4 = S0ix, in 0x003e] > powerindebug power in: 0x003e debug mask: 0x0000 bit meanings: 0x0001 0 SLP_S0_DEASSERTED 0x0002 1 SLP_S3_DEASSERTED 0x0004 1 SLP_S4_DEASSERTED 0x0008 1 RSMRST_L_PGOOD 0x0010 1 PP5000_A_PGOOD 0x0020 1 ALL_SYS_PWRGD Change-Id: Ied116e9e1e3c90eba5077ba22f03573d9e51e1c3 Signed-off-by: Scott Collyer <scollyer@google.com> Reviewed-on: https://chromium-review.googlesource.com/1469161 Commit-Ready: Scott Collyer <scollyer@chromium.org> Tested-by: Scott Collyer <scollyer@chromium.org> Tested-by: Furquan Shaikh <furquan@chromium.org> Reviewed-by: Furquan Shaikh <furquan@chromium.org>
* hatch: Define host battery full factor as 100%Philip Chen2019-02-131-0/+2
| | | | | | | | | | | | | BUG=b:123950652 BRANCH=none TEST=EC console shows reasonable battery display pct Change-Id: I1ef72976359f4e187e9a5f46461299b15bbcf40f Signed-off-by: Philip Chen <philipchen@google.com> Reviewed-on: https://chromium-review.googlesource.com/1459819 Commit-Ready: Philip Chen <philipchen@chromium.org> Tested-by: Philip Chen <philipchen@chromium.org> Reviewed-by: Furquan Shaikh <furquan@chromium.org>
* aleena: Enable GPIO-based MKBP event notificationEdward Hill2019-02-121-1/+0
| | | | | | | | | | | | | | Send MKBP events (for sensor data) over GPIO instead of host event. BUG=b:123750725 BRANCH=grunt TEST=MKBP events still received Change-Id: Ie1b02bbb8df44ade5ec6f1a4ba5dc4c5142e9f39 Signed-off-by: Edward Hill <ecgh@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/1452936 Reviewed-by: Enrico Granata <egranata@chromium.org> Reviewed-by: Raul E Rangel <rrangel@chromium.org>
* hatch: Add support for MST (multi stream transport) enableScott Collyer2019-02-123-0/+34
| | | | | | | | | | | | | | | | | | | | | The MST chip for Hatch needs to be enabled when HPD signal from either the Port 1 TCPC or HDMI port is high. This CL adds support to enable the MST chip based on this criteria. For the Port 1 type C port, the HPD signal level is derived from the USB PD policy level where the HPD update driver method is called. BRANCH=none BUG=b:123894908 TEST=Used external HP Z27n monitor and verifed the display is extended as expected when it's connected to either port 1 type C port or the HDMI connector. Change-Id: I1c46534bc7f32221f9e379dd9c74d5618c8f57e1 Signed-off-by: Scott Collyer <scollyer@google.com> Reviewed-on: https://chromium-review.googlesource.com/1406496 Commit-Ready: ChromeOS CL Exonerator Bot <chromiumos-cl-exonerator@appspot.gserviceaccount.com> Tested-by: Scott Collyer <scollyer@chromium.org> Reviewed-by: Furquan Shaikh <furquan@chromium.org>
* grunt: Reduce the sensor FIFO sizeEnrico Granata2019-02-061-1/+1
| | | | | | | | | | | | | | | | A smaller sensor FIFO helps improve the behavior of CTS tests that depend on sensor batching behavior. BUG=b:123750725 TEST=run CTS tests on kasumi360 BRANCH=grunt Change-Id: I067ea2eff9fdcd09b2e8819a03fc1cdf77a522a8 Signed-off-by: Enrico Granata <egranata@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/1454861 Commit-Ready: ChromeOS CL Exonerator Bot <chromiumos-cl-exonerator@appspot.gserviceaccount.com> Reviewed-by: Edward Hill <ecgh@chromium.org> Reviewed-by: Benjamin Gordon <bmgordon@chromium.org>
* hatch: Support CBIPhilip Chen2019-02-061-0/+3
| | | | | | | | | | | | | | | | BUG=b:123738227 BRANCH=none TEST=manually program CBI through 'ectool cbi set' command, and then confirm the CBI info in flash dump (through cbi command in ec console) Change-Id: I616ed2872835ae111336a7342ca906b3fcbbacfd Signed-off-by: Philip Chen <philipchen@google.com> Reviewed-on: https://chromium-review.googlesource.com/1453318 Commit-Ready: ChromeOS CL Exonerator Bot <chromiumos-cl-exonerator@appspot.gserviceaccount.com> Tested-by: Philip Chen <philipchen@chromium.org> Reviewed-by: Scott Collyer <scollyer@chromium.org> Reviewed-by: Furquan Shaikh <furquan@chromium.org>
* hatch: Add support for PSL wake sourcesScott Collyer2019-01-312-0/+12
| | | | | | | | | | | | | | | | | | | | This CL adds the alternate function defines for the 4 PSL wake source pins, populates the wake pins table, and enables the config option for PSL mode. BRANCH=none BUG=b:123343366 TEST=Use EC console command to force hiberate and verified EC wakes from hibernate via power button, EC reset, connecting AC power, and opening of lid switch. Change-Id: I6d5ad282f53e9090aafd4164510741d7cfe7907a Signed-off-by: Scott Collyer <scollyer@google.com> Reviewed-on: https://chromium-review.googlesource.com/1435971 Commit-Ready: Scott Collyer <scollyer@chromium.org> Tested-by: Scott Collyer <scollyer@chromium.org> Reviewed-by: Aseda Aboagye <aaboagye@chromium.org> Reviewed-by: Furquan Shaikh <furquan@chromium.org>
* hatch: Add support for fan and temperature sensorsScott Collyer2019-01-301-0/+1
| | | | | | | | | | | | | BRANCH=none BUG=b:122251649 TEST=make buildall Change-Id: Ib831eecb7e6df270a266f723e2fc5040b741e72f Signed-off-by: Scott Collyer <scollyer@google.com> Reviewed-on: https://chromium-review.googlesource.com/1387592 Commit-Ready: Scott Collyer <scollyer@chromium.org> Tested-by: Scott Collyer <scollyer@chromium.org> Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
* hatch: Add support for keyboard backlightScott Collyer2019-01-302-0/+5
| | | | | | | | | | | | | | | | This CL adds board specific config options, functions and GPIO signal required for keyboard backlight support. BRANCH=none BUG=b:122251649 TEST=make buildall Change-Id: Ib60a7c861d2a85939592556437bd6202e6815947 Signed-off-by: Scott Collyer <scollyer@google.com> Reviewed-on: https://chromium-review.googlesource.com/1387590 Commit-Ready: Scott Collyer <scollyer@chromium.org> Tested-by: Scott Collyer <scollyer@chromium.org> Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
* hatch: Add support for keyboard scanScott Collyer2019-01-302-0/+30
| | | | | | | | | | | | | | | | | | This CL adds config options and GPIO alternate function definitions required for adding keyboard scan functionality. BRANCH=none BUG=b:122251649 TEST=make buildall Change-Id: I9511f936e12d25276fa2685afbf7edaa6330d2cf Signed-off-by: Scott Collyer <scollyer@google.com> Reviewed-on: https://chromium-review.googlesource.com/1387589 Commit-Ready: Scott Collyer <scollyer@chromium.org> Tested-by: Scott Collyer <scollyer@chromium.org> Reviewed-by: Aseda Aboagye <aaboagye@chromium.org> Reviewed-by: Zack Yang <zack_yang@compal.corp-partner.google.com> Reviewed-by: Vijay P Hiremath <vijay.p.hiremath@intel.com>
* hatch: Add smart control for USB-A portsScott Collyer2019-01-302-1/+12
| | | | | | | | | | | | | | | | | There are 2 USB-A ports, but 5V power is controlled by the same signal for both of them. This CL adds support for 5V control for these ports. BRANCH=none BUG=b:122251649 TEST=make buildall Change-Id: I21328688ec653d91f9e37d2c441a3b5f816206f3 Signed-off-by: Scott Collyer <scollyer@google.com> Reviewed-on: https://chromium-review.googlesource.com/1387588 Commit-Ready: Scott Collyer <scollyer@chromium.org> Tested-by: Scott Collyer <scollyer@chromium.org> Reviewed-by: Aseda Aboagye <aaboagye@chromium.org> Reviewed-by: Vijay P Hiremath <vijay.p.hiremath@intel.com>
* hatch: Add vboot config options to baseboard.hScott Collyer2019-01-291-0/+5
| | | | | | | | | | | | | | BRANCH=none BUG=b:122251649 TEST=make buildall Change-Id: Iec06940c92fd430c7759c2e4ec25b7bc86344aa1 Signed-off-by: Scott Collyer <scollyer@google.com> Reviewed-on: https://chromium-review.googlesource.com/1387587 Commit-Ready: Scott Collyer <scollyer@chromium.org> Tested-by: Scott Collyer <scollyer@chromium.org> Reviewed-by: Aseda Aboagye <aaboagye@chromium.org> Reviewed-by: Vijay P Hiremath <vijay.p.hiremath@intel.com>
* hatch: Add support for 2 color LEDScott Collyer2019-01-293-0/+203
| | | | | | | | | | | | | | | | | | | This CL adds board specific files/functions required to support the battery LED. Similar to Coral or Octopus, the LEDs are controlled by GPIO on/off instead of PWM. BRANCH=none BUG=b:122251649 TEST=make buildall. Verfied charging LED turns when external power is connected. Change-Id: Ic16d4192aaeba6e765e97743ded772d52ca47111 Signed-off-by: Scott Collyer <scollyer@google.com> Reviewed-on: https://chromium-review.googlesource.com/1387586 Commit-Ready: Scott Collyer <scollyer@chromium.org> Tested-by: Scott Collyer <scollyer@chromium.org> Reviewed-by: Aseda Aboagye <aaboagye@chromium.org> Reviewed-by: Zack Yang <zack_yang@compal.corp-partner.google.com>
* hatch: Add support for charging and USB type CScott Collyer2019-01-296-0/+746
| | | | | | | | | | | | | | | | | This CL adds board specific files and functions required for both battery/charging and Type C support. BRANCH=none BUG=b:122251649 TEST=make buildall, tested both port 0/1 operation at factory. Battery can be charged via both ports. Change-Id: Ia01eabe109e3df780ec053831a71a16a41047f01 Signed-off-by: Scott Collyer <scollyer@google.com> Reviewed-on: https://chromium-review.googlesource.com/1387585 Commit-Ready: Scott Collyer <scollyer@chromium.org> Tested-by: Scott Collyer <scollyer@chromium.org> Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
View Lorry Controller Status