| Commit message (Collapse) | Author | Age | Files | Lines |
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The Type-C ports on Trogdor doesn't support UFP, like ADB
mode. So make the ports DFP only. When the data role change
to UFP, it disconnects the USB mux.
BRANCH=None
BUG=b:143616352
TEST=Checked the USB mux disconnected when switching to UFP.
Change-Id: I968f1fc7b8c15d34f635275911a013f28dc92359
Signed-off-by: Wai-Hong Tam <waihong@google.com>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2464233
Reviewed-by: Alexandru M Stan <amstan@chromium.org>
Commit-Queue: Alexandru M Stan <amstan@chromium.org>
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Increase console output buffer since we have the RAM available.
It helps console message drop/corruption.
BRANCH=None
BUG=None
TEST=Enabled i2ctrace which dumps lots of messages.
Change-Id: Icd98d429ec80cdae1d8970624a1c4c385ef73184
Signed-off-by: Wai-Hong Tam <waihong@google.com>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2464232
Reviewed-by: Alexandru M Stan <amstan@chromium.org>
Commit-Queue: Alexandru M Stan <amstan@chromium.org>
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This patch enables the console command 'chargen'.
BUG=b:158477297
BRANCH=trogdor
TEST=buildall
Signed-off-by: Namyoon Woo <namyoon@chromium.org>
Change-Id: I0bffc5ee489b1a3984ea4c59894dda770303fb92
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2463596
Reviewed-by: Wai-Hong Tam <waihong@google.com>
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The VCC is the power source of EC's GPM0~6, will connect to 1.8v or
3.3v depended on platform design.
This change was made to ensure voltage level setting of GPM0~6 matches
the corresponded VCC level. So we can enable internal pull-up no matter
VCC is connected to 1.8v or 3.3v
BUG=b:168783892
BRANCH=none
TEST=- buildall.
- The level setting is correct on these boards:
asurada, drawcia, and reef_it8320
Change-Id: I4eae368e569987381a0437494262d588436bb011
Signed-off-by: Dino Li <Dino.Li@ite.com.tw>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2397931
Reviewed-by: Eric Yilun Lin <yllin@chromium.org>
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We disabled the PSL mode hibernate. We uses another GPIO to control
switches, which were originally controlled by PSL_OUT. Add this GPIO,
named HIBERNATE_L, such that the non-PSL mode hibernate can retrofit
the original design.
BRANCH=None
BUG=b:169797080
TEST=Triggered EC hibernate and checked the HIBERNATE_L GPIO asserted.
Change-Id: I69c0d0296f701f3027adfd4d27fa51bdae0844a5
Signed-off-by: Wai-Hong Tam <waihong@google.com>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2446662
Reviewed-by: Alexandru M Stan <amstan@chromium.org>
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The RTC stops counting under PSL mode. The Trogdor design relies on
EC to give the RTC counter. Disable the PSL mode hibernate and use
the traditional non-PSL mode way, i.e. power down all RAM blocks
except the last one.
BRANCH=None
BUG=b:169595541
TEST=Tested on Lazor; triggered hibernate, and waked it up using:
* power button press
* lid open
* servo toggling EC_RST_ODL
* AC plug (doesn't work, need to investigate why)
TEST=Verified RTC still counting in hibernate:
2020-10-07 14:35:53 [244.922648 power state 9 = S5->G3, in 0x0005]
2020-10-07 14:35:53 RTC: 0x5f7e34b9 (1602106553.00 s)
2020-10-07 14:35:53 [244.923417 power state 0 = G3, in 0x0005]
2020-10-07 14:35:53 [244.926855 SDC Safe]
2020-10-07 14:35:53 [244.927138 Hibernate due to G3 idle]
2020-10-07 14:36:20
2020-10-07 14:36:20
2020-10-07 14:36:20 --- UART initialized after reboot ---
2020-10-07 14:36:20 [Image: RO, lazor_v2.0.5690-d95436fd6 ...]
2020-10-07 14:36:20 [Reset cause: hibernate wake-pin]
2020-10-07 14:36:20
...
2020-10-07 14:36:23 > rtc
2020-10-07 14:36:25 RTC: 0x5f7e34d9 (1602106585.00 s)
First RTC diff from the wall clock: 6553-53 = 6500
Second RTC diff from the wall clock: 6585-(60+25) = 6500
TEST=Verified RTC wake up from hibernate:
2020-10-07 14:59:25 > hibernate 10
2020-10-07 14:59:27 Hibernating for 10.000000 s
2020-10-07 14:59:37
2020-10-07 14:59:37
2020-10-07 14:59:37 --- UART initialized after reboot ---
Change-Id: I23f6a65115d5722cf183948fad81dc16d3a6af47
Signed-off-by: Wai-Hong Tam <waihong@google.com>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2447049
Reviewed-by: Alexandru M Stan <amstan@chromium.org>
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Move board specific GPIO definitions and TCPC configuration
from baseboard to JSL/TGL boards to accommodate changes in
MECC spec 0.9 vs 1.0.
BRANCH=None
BUG=b:169551130
TEST=make buildall -j
Signed-off-by: pandeyan <anshuman.pandey@intel.com>
Change-Id: I53a0545674f22e6cba05f777a4095909c231cfd2
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2435174
Commit-Queue: Poornima Tom <poornima.tom@intel.com>
Tested-by: Poornima Tom <poornima.tom@intel.com>
Reviewed-by: Keith Short <keithshort@chromium.org>
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BRANCH=none
BUG=b:169551130
TEST=make buildall -j
Signed-off-by: Sooraj Govindan <sooraj.govindan@intel.com>
Change-Id: Ieabae7bb8e4d0645ad480dd16026e5d8414362b8
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2435173
Commit-Queue: Poornima Tom <poornima.tom@intel.com>
Tested-by: Poornima Tom <poornima.tom@intel.com>
Reviewed-by: Vijay P Hiremath <vijay.p.hiremath@intel.com>
Reviewed-by: Keith Short <keithshort@chromium.org>
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Since each variant may have different thermal sensor placement.
Move thermal params and configs from baseboard to variant.
BUG=b:170143672
BRANCH=none
TEST=make -j BOARD=eldrid
TEST=make buildall
Signed-off-by: Scott Chao <scott_chao@wistron.corp-partner.google.com>
Change-Id: Ie12f4cecad5f93c491e51a5fadfe856829f5b2e3
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2449510
Reviewed-by: Keith Short <keithshort@chromium.org>
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Change the name of atomic_clear to atomic_clear_bits to make to name more
clear - the function clears only selected bits, but the name may suggest
that it clears the whole variable.
It is done as a part of porting to Zephyr, where atomic_clear zeros the
variable.
BUG=b:169151160
BRANCH=none
TEST=buildall
Signed-off-by: Dawid Niedzwiecki <dn@semihalf.com>
Change-Id: I7b0b47959c6c54af40f61bca8d9baebaa0375970
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2428943
Reviewed-by: Jett Rink <jettrink@chromium.org>
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1. Two more ADC channels are added to NPCX9.
2. Remove the three de-assertion threshold detectors in the ADC module because
this function is not very useful from the application point of view.
3. Add three more threshold event detectors (from 3 to 6.)
BRANCH=none
BUG=b:165777478
TEST=pass "make buildall"
TEST=Read all ADC channels by the console command 'ADC'.
Signed-off-by: Wealian Liao <whliao@nuvoton.corp-partner.google.com>
Change-Id: I64cc9caf8be7e7546e161931ed42d0ea4dda4b47
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2434603
Tested-by: CH Lin <chlin56@nuvoton.com>
Reviewed-by: caveh jalali <caveh@chromium.org>
Commit-Queue: CH Lin <chlin56@nuvoton.com>
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Enable CONFIG_CHARGE_RAMP_SW because hardware based charge ramping
doesn't work on the ISL9241.
BUG=b:169350714, b:168960587
BRANCH=none
TEST=make buildall
TEST=Connect 1.5A CDP device to Volteer and verify charge ramp from 0.5A
to 1.5A over about 7 seconds.
Signed-off-by: Keith Short <keithshort@chromium.org>
Change-Id: I81e8a3913bd776d0d3fda6d294fdeabbde5df62a
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2438912
Reviewed-by: Abe Levkoy <alevkoy@chromium.org>
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The ISL9241 sometimes incorrectly reports 0 for unknown
reason, causing ramp to stop at 0.5A. Workaround this by ignoring 0.
This partly defeats the point of ramping, but will still catch
VBUS below 4.5V and above 0V.
BUG=b:168569046
BRANCH=zork
TEST=EC reboot with no battery and 65W charger, ramp to 3.25A @ 20V
Signed-off-by: Edward Hill <ecgh@chromium.org>
Change-Id: I2c08cc548b1fd67507865e7339e8168b0e53e628
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2438934
Reviewed-by: Denis Brockus <dbrockus@chromium.org>
Commit-Queue: Denis Brockus <dbrockus@chromium.org>
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Allow dedede boards to boot with only a 15W charger present.
BRANCH=None
BUG=b:166003337,b:168730307
TEST=on waddledoo and waddledee, confirm board can boot to S0 and remain
there with a 15W charger in C0 or in C1 and no battery
Signed-off-by: Diana Z <dzigterman@chromium.org>
Change-Id: I24f8f2f13bb2b2ba92ba6e2b87db569bd023e5c7
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2438670
Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
Commit-Queue: Aseda Aboagye <aaboagye@chromium.org>
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We will move to an API compatible with Zephyr's API. See the bug for
complete rationale and plan.
BUG=b:169151160
BRANCH=none
TEST=buildall
Signed-off-by: Jack Rosenthal <jrosenth@chromium.org>
Change-Id: Id611f663446abf00b24298a669f2ae47fef7f632
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2427507
Tested-by: Dawid Niedźwiecki <dn@semihalf.com>
Reviewed-by: Tom Hughes <tomhughes@chromium.org>
Reviewed-by: Jett Rink <jettrink@chromium.org>
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CL:2321689 already sent SKUID to EC. This patch enable AP set SKUID
to EC to distinguish platform factor.
BUG=b:161767717
BRANCH=firmware-kukui-12573.B
TEST=make buildall -j and boots to Burnet
Signed-off-by: Devin Lu <Devin.Lu@quantatw.com>
Change-Id: I5f92c293a26c0612b3a61bf009961217e17e8f3d
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2386691
Reviewed-by: Ting Shen <phoenixshen@chromium.org>
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Disable PD log and enable GPIO short name to save ~800 bytes for RO.
BUG=none
BRANCH=none
TEST=make buildall
Signed-off-by: Devin Lu <Devin.Lu@quantatw.com>
Change-Id: I326199411a3728b0ff6f5dc9531ad054245b31b5
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2432226
Reviewed-by: Ting Shen <phoenixshen@chromium.org>
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This reverts commit 61d40d6eaa88437d48e06fba9b773f7eb99f6ecc.
Revert the workaround since CL:2393404 solved the problem.
BUG=b:163076059
BRANCH=zork
TEST=none
Change-Id: I0397141b5b4e15736172474cb073842e18c3a71d
Signed-off-by: Edward Hill <ecgh@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2437194
Reviewed-by: Denis Brockus <dbrockus@chromium.org>
Commit-Queue: Denis Brockus <dbrockus@chromium.org>
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Remove motion sense (gyro + accel) drivers, since HW has none.
BUG=b:166183179
BRANCH=zork
TEST=none
Signed-off-by: Edward Hill <ecgh@chromium.org>
Change-Id: I954bf491dd7cecf8a76d28b02ea100a0decb12d6
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2437191
Reviewed-by: Denis Brockus <dbrockus@chromium.org>
Commit-Queue: Denis Brockus <dbrockus@chromium.org>
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This CL adds config options and tables required to pull in i2c support
for honeybuns. In addition, config options for CBI were added to
facilitate i2c testing.
BUG=b:148493929
BRANCH=None
TEST=ran i2cscan on quiche
> i2cscan
Scanning 0 usbc.................
0x18.
0x19.
0x1a.
0x1b.
0x1c.
0x1d.
0x1e.
0x1f.
0x20.
0x21.
0x22.
0x23.
0x24.
0x25.
0x26.
0x27...........................
0x42..............................
0x60.......................
Scanning 1 usb_mst.
0x08.
0x09.
0x0a.
0x0b.
0x0c.
0x0d.
0x0e.
0x0f.
0x10.
0x11.
0x12.
0x13.
0x14.
0x15.
0x16.
0x17..........................................
0x41................................
0x61.........
0x6a.............
Scanning 2 eeprom.........................................
0x30................................
0x50.......................................
Signed-off-by: Scott Collyer <scollyer@google.com>
Change-Id: Ib1b8b795a2a07a5b1cbe167b17c3f70a8d9703b2
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2213943
Commit-Queue: Scott Collyer <scollyer@chromium.org>
Tested-by: Scott Collyer <scollyer@chromium.org>
Reviewed-by: Diana Z <dzigterman@chromium.org>
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This CL adds the configs required to enable EC console.
BUG=b:148493929
BRANCH=None
TEST=verfied ec console works on quiche
> help
Known commands:
chan gpioget md sysinfo
crash gpioset panicinfo sysjump
flashinfo help reboot syslock
flashwp hibernate rw taskinfo
gettime history shmem timerinfo
HELP LIST = more info; HELP CMD = help on CMD.
Signed-off-by: Scott Collyer <scollyer@google.com>
Change-Id: Ie78965483a1c70368e4375e63ddf33a423bb7776
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2399622
Commit-Queue: Scott Collyer <scollyer@chromium.org>
Tested-by: Scott Collyer <scollyer@chromium.org>
Reviewed-by: Diana Z <dzigterman@chromium.org>
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This CL adds a function in baseboard that will sequence through a list
of gpio controlled power rails and chip resets. The table includes a
delay prior to executing the next entry. The table is intended to be
in board.c as the rails and delays can very much be board specific.
BUG=b:167430750
BRANCH=None
TEST=Verified that power rails come up and status LED is on.
Signed-off-by: Scott Collyer <scollyer@google.com>
Change-Id: I830dee9eb28d4648d274d8cbc49b6972cd70dba5
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2213837
Tested-by: Scott Collyer <scollyer@chromium.org>
Reviewed-by: Diana Z <dzigterman@chromium.org>
Commit-Queue: Scott Collyer <scollyer@chromium.org>
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This reverts commit 6ed9b65ae38977118f0d5f02d6f5c61da23c5f24.
Reason for revert: Historically, Octopus variants used the baseboard
VID and PID.
Original change's description:
> volteer: Move USB PID to board files
>
> Add TODOs to update variants boards.
>
> BUG=none
> TEST=make buildall
> BRANCH=none
>
> Signed-off-by: Abe Levkoy <alevkoy@chromium.org>
> Change-Id: If0d8d0dd544c06114f355dcf281b2841a8397aee
> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2417348
> Reviewed-by: Keith Short <keithshort@chromium.org>
BUG=b:168826898,b:168827570,b:168827133,b:168827128,b:168827420
BUG=b:168827418,b:168826886,b:168826868,b:168827029,b:168826914
Change-Id: I5b9b1cee25e34a4b922fd604b49deabc9591b4e8
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2431687
Tested-by: Abe Levkoy <alevkoy@chromium.org>
Reviewed-by: YH Lin <yueherngl@chromium.org>
Reviewed-by: Keith Short <keithshort@chromium.org>
Commit-Queue: Abe Levkoy <alevkoy@chromium.org>
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For boards which are using the SM charger chips, they will have a Psys
offset register to generate the OCPC Psys output.
BRANCH=None
BUG=b:168783892
TEST=make -j buildall
Signed-off-by: Diana Z <dzigterman@chromium.org>
Change-Id: Ib963ed11f73a76dfeffa11d5ab4a81ccbbd71102
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2435746
Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
Commit-Queue: Aseda Aboagye <aaboagye@chromium.org>
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Some dedede batteries have a charge request of (0,0) when the
battery is completely depleted. Enable this config option to help
revive those batteries.
BUG=None
BRANCH=None
TEST=Build and flash drawcia, drain battery until it's dead, plug in a
charger on C1 and verify that the battery can be revived.
Signed-off-by: Aseda Aboagye <aaboagye@google.com>
Change-Id: I9206120a0c36813cbcd5618fe595faf57741ac47
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2431696
Tested-by: Aseda Aboagye <aaboagye@chromium.org>
Commit-Queue: Aseda Aboagye <aaboagye@chromium.org>
Reviewed-by: Diana Z <dzigterman@chromium.org>
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Need this config to save the reset flags across double EC reset on the
first power-on.
On power-on, H1 releases the EC from reset but then quickly asserts and
releases the reset a second time. This means the EC sees 2 resets:
(1) power-on reset, (2) reset-pin reset. This config will
allow the second reset to be treated as a power-on.
BRANCH=None
BUG=b:169188750
TEST=Tested on a Trogdor board that the first power-on has the
"power-on" reset flag.
> --- UART initialized after reboot ---
> [Image: RO, pompom_v2.0.5526+3b3e20008 2020-09-23 12:00:19 ...]
> [Reset cause: power-on]
Change-Id: I2cccb94d8fac938b4c70984f1a4e4c49b97a8b7b
Signed-off-by: Wai-Hong Tam <waihong@google.com>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2427102
Reviewed-by: Stephen Boyd <swboyd@chromium.org>
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CONFIG_CHARGE_RAMP_SW is designed to stop ramping if we are not
using enough current (so we are actually testing that the supplier
can give the current we ramp to). But this is checked using
charge_is_consuming_full_input_current(), which only tests for battery
charge between 2% and 95%. This fails to accurately reflect desire
for input current, because the low battery might want to charge
faster, and the AP might want extra power even with full battery.
For zork, change charge_is_consuming_full_input_current() to always
return true. This means we will always ramp. If we are not using the
full input current, and the supplier cannot deliver it when we do,
then we will detect the voltage drop and re-ramp, which seems fine.
BUG=b:168569046
BRANCH=zork
TEST=ramp with full battery
Signed-off-by: Edward Hill <ecgh@chromium.org>
Change-Id: Ic7c9b93bdd3856c9b05bd3a13e8c2a78aa883755
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2426950
Reviewed-by: Denis Brockus <dbrockus@chromium.org>
Commit-Queue: Denis Brockus <dbrockus@chromium.org>
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Add a global variable board_usbc1_retimer_inhpd that boards can
set to IOEX_USB_C1_HPD_IN_DB or GPIO_USB_C1_HPD_IN_DB_V1 depending
on board version, that is then used by board_ps8802/ps881_mux_set
to enable/disable IN_HPD on the DB retimer.
BUG=b:168884674
BRANCH=zork
TEST=morphius dali + picasso USB-C1 display works
Signed-off-by: Edward Hill <ecgh@chromium.org>
Change-Id: Ifca733ce05a72cc095463b2b9365857232784d34
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2426959
Reviewed-by: Denis Brockus <dbrockus@chromium.org>
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Disable Vivaldi keyboard for all Zork devices since Vivaldi
currently does not allow for side volume buttons to be distinguished
from keyboard volume F9/F10 keys. This is necessary so that Chrome
can ignore F9/F10 in tablet mode, but side volume buttons still work.
BUG=b:164207227
BRANCH=zork
TEST=side buttons + F9/F10 in clamshell + tablet modes
Signed-off-by: Edward Hill <ecgh@chromium.org>
Change-Id: Ia3d9fa89e54e637e7cf61ac318e7cfe928923ab1
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2426120
Reviewed-by: Denis Brockus <dbrockus@chromium.org>
Commit-Queue: Denis Brockus <dbrockus@chromium.org>
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This change increased console output buffer to avoid
losing output message since we have the memory space
available (17832 bytes in RAM still available on drawcia).
BUG=none
BRANCH=none
TEST=more console message is visible on drawcia after ec reset.
Signed-off-by: Dino Li <Dino.Li@ite.com.tw>
Change-Id: I660f0114bc2c569b74d35bdbbd63e5819979555b
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2423647
Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
Commit-Queue: Aseda Aboagye <aaboagye@chromium.org>
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Protect adapter provide overcurrent.
And follow OEM charger policy to set 90% input current limit when S0.
BUG=b:169025944
BRANCH=none
TEST=make -j BOARD=eldrid
TEST=make buildall
Signed-off-by: Scott Chao <scott_chao@wistron.corp-partner.google.com>
Change-Id: Idc5aa532aaf5f4c7db45d9db2e1ce66032611a53
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2413810
Reviewed-by: Abe Levkoy <alevkoy@chromium.org>
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This CL move HDMI retimer(pi3hdx1204) setting to variant.
BUG=none
BRANCH=zork
TEST=make buildall
Signed-off-by: Zick Wei <zick.wei@quanta.corp-partner.google.com>
Change-Id: I5b50058c44ccb9fd5d9403939d5f4ea9a9670b7c
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2421391
Reviewed-by: Edward Hill <ecgh@chromium.org>
Commit-Queue: Edward Hill <ecgh@chromium.org>
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In order to support the keyboard backlight and numeric pad
switching, we need to encode the keyboard backlight and
numeric pad feature to the fw_config.
BUG=b:166707536
BRANCH=None
TEST=flash the ec.bin to the DUT and checked the keyboard function.
Change-Id: I2f85377acd85a0dae635d7bf4fe36c47ce01e9d7
Signed-off-by: Zhuohao Lee <zhuohao@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2397933
Reviewed-by: Jett Rink <jettrink@chromium.org>
Reviewed-by: Keith Short <keithshort@chromium.org>
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To reflect the number we measured, set the min operating power to 10W.
BRANCH=None
BUG=b:152647632
TEST=Using Pompom without battery,
* checked AP auto-boot when plugged a PD charger (>10W);
* checked AP not auto-boot when plugged a SuzyQ (7.5W).
Change-Id: I5f4c2a4befb5f231d8f62acf15e103c155c4b956
Signed-off-by: Wai-Hong Tam <waihong@google.com>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2417003
Reviewed-by: Matthias Kaehlcke <mka@chromium.org>
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Eldrid's battery need to apply charging voltage input>3V
and aleast 2 sec to let C/D FET will turn on.
So add board_battery_is_initialized to check battery initialization.
And try to provide pre-charge current to battery
when battery have no response.
BUG=b:165780074
BRANCH=none
TEST=make -j BOARD=eldrid
TEST=make buildall
Signed-off-by: Scott Chao <scott_chao@wistron.corp-partner.google.com>
Change-Id: I4265538b5a789b76a85d21a1459d19142a86106e
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2409712
Reviewed-by: Keith Short <keithshort@chromium.org>
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Add TODOs to update variants boards.
BUG=none
TEST=make buildall
BRANCH=none
Signed-off-by: Abe Levkoy <alevkoy@chromium.org>
Change-Id: If0d8d0dd544c06114f355dcf281b2841a8397aee
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2417348
Reviewed-by: Keith Short <keithshort@chromium.org>
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Adjust EC config settings that control how much battery charge and
AC power is required to allow AP to boot, to align with how much
power the HW actually needs.
EC will boot AP to depthcharge if: (BAT >= 4%) || (AC >= 50W)
CONFIG_CHARGER_LIMIT_* is not set, so there is no additional restriction
on Depthcharge to boot OS.
BUG=b:162938720
BRANCH=zork
TEST=boot with:
- various battery and AC levels,
- plugged/unplugged battery,
- locked/unlocked EC,
- swsync GBB disabled/enabled
Signed-off-by: Edward Hill <ecgh@chromium.org>
Change-Id: I78aa84b8b0b18429d1301085ab878c62a4afd687
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2415629
Reviewed-by: Furquan Shaikh <furquan@chromium.org>
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Move the I2C config to the board level such that they can have different
configs.
Also add the extra I2C bus for WLC on Coachz. The device on this I2C bus
supports fast-mode plus, 1Mbit/s.
BRANCH=None
BUG=b:167884598
TEST=Built all Trogdor variants.
Change-Id: Ibcb0e110e1b2c67f8ba843c2dc08efabeb5fe9ba
Signed-off-by: Wai-Hong Tam <waihong@google.com>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2412821
Reviewed-by: Stephen Boyd <swboyd@chromium.org>
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Rename the GPIOs to reflect the netnames.
Add the GPIOs for the hall sensors, not implemented yet.
Add the GPIOs for the base detection, not implemented yet.
Add the GPIOs and I2C bus for the stylus, not implemented yet.
BRANCH=None
BUG=b:167884598
TEST=Built the Coachz image.
Change-Id: If30e00d8ede0b6ca2e9a4f9efe474c22a8a16933
Signed-off-by: Wai-Hong Tam <waihong@google.com>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2411507
Reviewed-by: Bob Moragues <moragues@chromium.org>
Reviewed-by: Stephen Boyd <swboyd@chromium.org>
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Coachz doesn't has an internal keyboard.
Move the CONFIG from baseboard to board, as the keyboard backlight
is not a common feature.
BRANCH=None
BUG=b:167884598
TEST=Built the Coachz image.
Change-Id: Idd5937da9ad6a3ab1be277e537bbd2e70e2b1d9a
Signed-off-by: Wai-Hong Tam <waihong@google.com>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2410855
Reviewed-by: Stephen Boyd <swboyd@chromium.org>
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We switched to use the TCPC to detect the VBUS, instead of the
BC1.2, from CL:2086092. But the BC1.2 VBUS detection GPIOs are
still used. Remove these references.
BRANCH=None
BUG=b:150682632, b:167884598
TEST=Built the affected Trogdor boards.
Change-Id: I66d59b16cd93b1dbf460a56a9bc97268d571f6d1
Signed-off-by: Wai-Hong Tam <waihong@google.com>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2410851
Reviewed-by: Stephen Boyd <swboyd@chromium.org>
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Move some GPIO aliases from baseboard to board such that they can be
customized to use different names.
BRANCH=None
BUG=b:167884598
TEST=Built the affect Trogdor boards.
Change-Id: Id8d68d9b03d43010a81565f7625b8033aab14594
Signed-off-by: Wai-Hong Tam <waihong@google.com>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2410850
Reviewed-by: Stephen Boyd <swboyd@chromium.org>
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This patch add FW_CONFIG field for Keyboard Type Support
BUG=none
BRANCH=none
TEST=none
Signed-off-by: Leo-Tsai <leocx_tsai@compal.corp-partner.google.com>
Change-Id: Idb9a352f40abab791e3162470efe8fe242027af5
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2402461
Reviewed-by: Henry Sun <henrysun@google.com>
Reviewed-by: YH Lin <yueherngl@chromium.org>
Reviewed-by: Diana Z <dzigterman@chromium.org>
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Octopus already supported SSFC with CL:2377058. This patch extends
SSFC field of CBI for PPC.
BRANCH=firmware-octopus-11297.B
BUG=none
TEST=EC log of Meep device can output value of SSFC in CBI.
Signed-off-by: Devin Lu <Devin.Lu@quantatw.com>
Change-Id: I1d0815a29673d535e53fdb7efe6b756999bc9f3a
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2396096
Reviewed-by: Marco Chen <marcochen@chromium.org>
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Add support for replacing the TUSB422 with the RT1715. Since they are
pin-to-pin compatible and currently only used with a rework, make the
decision of which to use at runtime. The logic is to check if the RT1715
is both on the I2C bus and the vendor ID matches. If either fail, default
to the TUSB422 address and driver.
BUG=b:162617664
TEST=make buildall
TEST=check both TUSB422 functionality and RT1715 functionality
BRANCH=none
Change-Id: I8306f086bf030ddd7238532b1f12aa259cb72422
Signed-off-by: Eric Herrmann <eherrmann@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2343734
Reviewed-by: Keith Short <keithshort@chromium.org>
Reviewed-by: Abe Levkoy <alevkoy@chromium.org>
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Disabling pull-ups on the C0 and C1 interrupt lines before z-state
prevents EN_PP3300_G_L from being pulled down.
BRANCH=None
BUG=b:153684907
TEST=on waddledee, verify EN_PP3300_G_L is no longer pulled down as
z-state is entered
Signed-off-by: Diana Z <dzigterman@chromium.org>
Change-Id: Ia5614bf32fe1a77255d990bc610fe2f09cf502c4
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2391214
Tested-by: Divagar Mohandass <divagar.mohandass@intel.com>
Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
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To enable PD Firmware update, enable PD control command handler.
BUG=b:159832325
BRANCH=None
TEST=Build and ensure that the PD control command is enabled.
Change-Id: I3bd12e29b65575bca08fede9544dff409ba38004
Signed-off-by: Karthikeyan Ramasubramanian <kramasub@google.com>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2382552
Tested-by: Karthikeyan Ramasubramanian <kramasub@chromium.org>
Reviewed-by: Diana Z <dzigterman@chromium.org>
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This patch removes configurations (I2C, GPIO, TASK and
Interrupt...) about TCPC port1 for pompom.
BUG=b:167476139
BRANCH=none
TEST=power on after flashing FW and it works normal.
Signed-off-by: AlvinCC_Hsu <alvincc_hsu@compal.corp-partner.google.com>
Change-Id: I1275c1ef7e7d3e65d695dace834a9bcbb4e66dcc
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2391022
Reviewed-by: Wai-Hong Tam <waihong@google.com>
Commit-Queue: Wai-Hong Tam <waihong@google.com>
Tested-by: Wai-Hong Tam <waihong@google.com>
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uint32_t comes from stdint.h.
BUG=none
TEST=make buildall
BRANCH=none
Signed-off-by: Abe Levkoy <alevkoy@chromium.org>
Change-Id: I44ae7c9bf5011a67f34967554da67ad5f7e7c89b
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2390995
Reviewed-by: Keith Short <keithshort@chromium.org>
Commit-Queue: Keith Short <keithshort@chromium.org>
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Enable runtime control of the PD debug level on intelrvp boards. This
change reduces intelrvp flash space by 1404 bytes.
BUG=none
BRANCH=none
TEST=make buildall
TEST=Manually run pd dump 3 and ensure more pd protocol logs
Signed-off-by: Madhu M <madhu.m@intel.corp-partner.google.com>
Change-Id: I03dddaf9aca8d44236fc015643d14bc18c690380
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2387127
Reviewed-by: Vijay P Hiremath <vijay.p.hiremath@intel.com>
Reviewed-by: Keith Short <keithshort@chromium.org>
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