| Commit message (Collapse) | Author | Age | Files | Lines |
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
| |
The allocation for keeby's USB PID never actually landed, so it
was taken by another project. A new allocation has been made,
and this commit updates the USB PID in the EC to match.
BUG=None
BRANCH=firmware-keeby-14119.B
TEST=`make -j BOARD=lalala`
Signed-off-by: Aseda Aboagye <aaboagye@google.com>
Change-Id: Ie9e05de3fd2488c6f19b607e1323e9d193bb6753
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3163308
Tested-by: Aseda Aboagye <aaboagye@chromium.org>
Auto-Submit: Aseda Aboagye <aaboagye@chromium.org>
Reviewed-by: Diana Z <dzigterman@chromium.org>
Commit-Queue: Diana Z <dzigterman@chromium.org>
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
| |
Add led control from puff.
BUG=b:197471359
BRANCH=none
TEST=make buildall -j succeeded.
Signed-off-by: David Huang <david.huang@quanta.corp-partner.google.com>
Change-Id: Iab7d9c207d72c18658c3345c4467b20a23e48b5f
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3139714
Reviewed-by: Boris Mittelberg <bmbm@google.com>
Reviewed-by: Zhuohao Lee <zhuohao@chromium.org>
Commit-Queue: Boris Mittelberg <bmbm@google.com>
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
| |
1) remove board_overcurrent_event since CL:2532676 added a default empty
implementation
2) remove GPIO_EN_KB_BL control since it's already handled in
keyboard_backlight.c
3) remove unused header includes
4) remove unused it5205 sbu handler
BUG=none
TEST=make
BRANCH=main
Signed-off-by: Ting Shen <phoenixshen@google.com>
Change-Id: I0231ba6c6bf16fa0fc1bf52fd77815271e79dcbb
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3160456
Tested-by: Ting Shen <phoenixshen@chromium.org>
Auto-Submit: Ting Shen <phoenixshen@chromium.org>
Reviewed-by: Rong Chang <rongchang@chromium.org>
Commit-Queue: Rong Chang <rongchang@chromium.org>
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
| |
This CL moves RT1718S gpio control from board file to common driver
codebase, and implements the set flag and get/set level functions.
Note that this CL does not fully implement IOEX interface because TCPC
has different init process than usual ioexpanders.
BUG=none
TEST=1) pass faft_pd
2) manually test pd source/sink/frs on port 1
BRANCH=main
Signed-off-by: Ting Shen <phoenixshen@google.com>
Change-Id: If2a0bca2b13ad4748eea54b4c8004da7dc6fc6a5
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3159643
Reviewed-by: Rong Chang <rongchang@chromium.org>
Commit-Queue: Ting Shen <phoenixshen@chromium.org>
Tested-by: Ting Shen <phoenixshen@chromium.org>
|
|
|
|
|
|
|
|
|
|
|
|
|
|
| |
Enable CONFIG_DEBUG_ASSERT_BRIEF in RO to free flash space.
Brief asserts print only the file name and the line number.
BUG=None
TEST=Build all
BRANCH=None
Change-Id: I65334ad2c50e4c70f25af7dbbe03302d7d541bc7
Signed-off-by: Rob Barnes <robbarnes@google.com>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3157760
Reviewed-by: Keith Short <keithshort@chromium.org>
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
| |
When the system is powered by 5V/3A adapter from C1 port, the long
PPVAR_VBUS_IN trace will cause large IR drop with high input current
and PPVAR_VBUS_IN voltage will hit ISL9238C input voltage limit,
then ISL9238C will decrease the sink current to make PPVAR_VBUS_IN valid.
See b:198707662 comment#9 for more detail.
BUG=b:198707662
TEST=check the register value of 0x4B
BRANCH=main
Signed-off-by: Ting Shen <phoenixshen@google.com>
Change-Id: I148e8943b295a73d27a9bc381309d074b053fb85
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3153621
Reviewed-by: Rong Chang <rongchang@chromium.org>
Commit-Queue: Ting Shen <phoenixshen@chromium.org>
Tested-by: Ting Shen <phoenixshen@chromium.org>
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
| |
Move the hibernate routine from baseboard.c to separate hibernate.c
files.
BUG=b:198305804
BRANCH=none
TEST=make BOARD=asurada -j
The interrupt of GPIO_AC_PRESENT can wake up CPU
in hibernate mode.
Signed-off-by: Tim Lin <tim2.lin@ite.corp-partner.google.com>
Change-Id: I0aea0b812f535c907ac8963fc1f09206dfef5956
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3146773
Reviewed-by: Denis Brockus <dbrockus@chromium.org>
Reviewed-by: Keith Short <keithshort@chromium.org>
Commit-Queue: Keith Short <keithshort@chromium.org>
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
| |
ectool battery command returns the battery information correctly
but returns an ioctl error as EC_CMD_BATTERY_GET_STATIC do not
support version 1. Changes enable the command version 1.
BRANCH=none
BUG=b:197836974
TEST=Verified ectool battery command on brya.
Change-Id: I2b2c4068bce1b5150d089ba08596c1191c189c2b
Signed-off-by: Deepti Deshatty <deepti.deshatty@intel.corp-partner.google.com>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3120611
Reviewed-by: Boris Mittelberg <bmbm@google.com>
Reviewed-by: Vijay Hiremath <vijay.p.hiremath@intel.com>
Commit-Queue: Boris Mittelberg <bmbm@google.com>
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
| |
MECC1.1 is defined for ADL+ platforms. To simplify the the BOM
stuffing options and also to remove dependency on H1 by MECC vendors,
H1 is added on RVP as AIC.
BUG=b:197659347
BRANCH=none
TEST=make buildall -j
Signed-off-by: Vijay Hiremath <vijay.p.hiremath@intel.com>
Change-Id: I5c3b4b2b2a116ec8dc5a7448c71a6b8654a78bba
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3114218
Reviewed-by: Keith Short <keithshort@chromium.org>
Reviewed-by: Li Feng <li1.feng@intel.com>
Commit-Queue: Keith Short <keithshort@chromium.org>
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
| |
This patch move thermal sensor and setting to variant,
let variant have their own setting.
BUG=none
BRANCH=none
TEST=make BOARD=dewatt, make BOARD=guybrush,
make BOARD=nipperkin
Signed-off-by: Zick Wei <zick.wei@quanta.corp-partner.google.com>
Change-Id: Ibf37a0a45d1a728abc5ed88dde230f0561698bbc
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3132547
Reviewed-by: Devin Lu <Devin.Lu@quantatw.com>
Reviewed-by: Rob Barnes <robbarnes@google.com>
Commit-Queue: Rob Barnes <robbarnes@google.com>
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
| |
Move charger config from baseboard to board.
Change Kano charger to isl9241.
BUG=none
BRANCH=brya
TEST=make buildall -j succeeded.
Signed-off-by: David Huang <david.huang@quanta.corp-partner.google.com>
Change-Id: Ia97424bbcf0654127e21c47d6834ad6c2c6163ee
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3132556
Reviewed-by: Boris Mittelberg <bmbm@google.com>
Commit-Queue: Boris Mittelberg <bmbm@google.com>
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
| |
Add BB retimer emulator on i2c bus. Emulator properties can be defined
using device tree or runtime emulator API. Emulator checks if RO
registers and reserved bits are accessed correctly. API allows to set
custom read/write i2c messagess handlers to emulate complex behaviour.
BUG=b:184856919
BRANCH=none
TEST=none
Signed-off-by: Tomasz Michalec <tm@semihalf.com>
Change-Id: I4b641a90e6fb55e89aaee388c0ac04ab7bf367ba
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3110085
Commit-Queue: Jeremy Bettis <jbettis@chromium.org>
Reviewed-by: Jeremy Bettis <jbettis@chromium.org>
Reviewed-by: Yuval Peress <peress@chromium.org>
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
| |
This CL fixes the config options used to ignore the hardware write
protection signal to the CBI EEPROM. Honeybuns is only using this to
store the user MF prefence bit. The config option that had been used
to flip the polarity of WP_L (the default write protect signal) has
been removed.
BRANCH=quiche
BUG=b:164157329
TEST=Verfied that MF preference bit is stored in CBI.
Signed-off-by: Scott Collyer <scollyer@google.com>
Change-Id: I4f5cbe4b20dd2347e71429dadaf9f0c103b222de
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3139097
Tested-by: Scott Collyer <scollyer@chromium.org>
Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
Commit-Queue: Scott Collyer <scollyer@chromium.org>
|
|
|
|
|
|
|
|
|
|
|
|
|
|
| |
Disable CONFIG_CMD_MFALLOW and CONFIG_CMD_TYPEC commands to free up
RO flash space on kukui boards.
BUG=None
TEST=Build all
BRANCH=None
Change-Id: I1d60355b4d1c60c848a3373ce7eadf74a1a73056
Signed-off-by: Rob Barnes <robbarnes@google.com>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3136037
Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org>
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
| |
The line RETURN_ERROR(rt1718s_gpio_ctrl(...)) caused EC not able to turn
on sink path on C0 when daughter board absent.
To make C0 workable under this situation, ignore the error and print
some error message instead like other boards do.
BUG=b:198114418
BRANCH=none
TEST=device charging when daughter board not connected
Signed-off-by: Ting Shen <phoenixshen@google.com>
Change-Id: I09941310370a60be6145e38395a4922df52c2b9c
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3135516
Tested-by: Ting Shen <phoenixshen@chromium.org>
Auto-Submit: Ting Shen <phoenixshen@chromium.org>
Reviewed-by: Eric Yilun Lin <yllin@google.com>
Commit-Queue: Eric Yilun Lin <yllin@google.com>
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
| |
Move test point and led gpio
from base_gpio.inc to variant.
BUG=none
BRANCH=none
TEST=make BOARD=guybrush, make BOARD=nipperkin,
make BOARD=dewatt all pass.
Signed-off-by: Zick Wei <zick.wei@quanta.corp-partner.google.com>
Change-Id: Ic6ef1d74e1e751cbc39c2d63cd782c70f85d0644
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3122696
Reviewed-by: Devin Lu <Devin.Lu@quantatw.com>
Reviewed-by: Rob Barnes <robbarnes@google.com>
Reviewed-by: Diana Z <dzigterman@chromium.org>
Commit-Queue: Rob Barnes <robbarnes@google.com>
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
| |
As a followup to CL:3104290, give the TCPCI TRANSMIT and
RX_BUF_FRAME_TYPE types more consistent names. Most of them can be used
for receiving, not just transmitting. Fix lint errors thus revealed.
BUG=b:155476419
TEST=make buildall
BRANCH=none
Signed-off-by: Abe Levkoy <alevkoy@chromium.org>
Change-Id: I399ec479eacc18622fc4d3f55f8bdabf4560fcff
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3125995
Reviewed-by: Keith Short <keithshort@chromium.org>
|
|
|
|
|
|
|
|
|
|
|
|
|
|
| |
Since we have definitions for HPD IRQ and level in the mux flags, extend
this to the HPD update function in the usb_mux structure as well.
BRANCH=None
BUG=b:172222942
TEST=make -j buildall
Signed-off-by: Diana Z <dzigterman@chromium.org>
Change-Id: I19c3a65fc821a341338d73fabd7876339b37fe7d
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3095437
Reviewed-by: Keith Short <keithshort@chromium.org>
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
| |
For ADC_VBUS only for C0 VBUS voltage, C1 VBUS voltage should
be read from rt1718s internal VBUS ADC.
BUG=b:196001868
BRANCH=none
TEST=show correct C1 vbus voltage on tomato
Signed-off-by: Sue Chen <sue.chen@quanta.corp-partner.google.com>
Change-Id: I6c90386e083a480ffaeacd7739d4ddebe0bd8e1e
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3114326
Commit-Queue: Ting Shen <phoenixshen@chromium.org>
Reviewed-by: Ting Shen <phoenixshen@chromium.org>
|
|
|
|
|
|
|
|
|
|
|
|
|
|
| |
This removes the use of adc_chip.h where adc.h is also used. In this
case, adc_chip.h is redundant.
BRANCH=none
BUG=b:181271666
TEST=buildall passes
Change-Id: Id7baf9aef949447a4d47934242f9bae97c971262
Signed-off-by: Caveh Jalali <caveh@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3120317
Reviewed-by: Keith Short <keithshort@chromium.org>
|
|
|
|
|
|
|
|
|
|
|
|
|
|
| |
This updates a few board files that were including adc_chip.h instead of
adc.h. adc_chip.h should not be included explicitly in most cases.
BRANCH=none
BUG=b:181271666
TEST=buildall passes
Change-Id: I42f8b5b2129ebe18a96d089f0355b581cba1b274
Signed-off-by: Caveh Jalali <caveh@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3120316
Reviewed-by: Keith Short <keithshort@chromium.org>
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
| |
This CL fixes a logic error where CBI FW_CONFIG field was being
checked. In addition, the CBI config option to bypass the write
protection check was added as the CBI is only being used to store the
dock_mf preference and doesn't need to be write protected.
BUG=b:164157329
BRANCH=quiche
TEST=Verified on Gingerbread that the status LED color matches with
the dock's MF preference. In addition, verified that following a power
cycle, the MF preference is read properly from the CBI.
Signed-off-by: Scott Collyer <scollyer@google.com>
Change-Id: Ie3d5b8d4af73b1d09b3f58f1a990b7c77cb4a6fe
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3116666
Tested-by: Scott Collyer <scollyer@chromium.org>
Reviewed-by: Diana Z <dzigterman@chromium.org>
Commit-Queue: Scott Collyer <scollyer@chromium.org>
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
| |
This CL adds an override function for usb_ufp_check_usb3_enable() so
that USB3.1 mode gets enabled by default when attaching as a SNK/UFP
in a type-c only connection.
BUG=b:195042155
BRANCH=quiche
TEST=Verfied that when I connect USBC only source on gingerbread that
the TUSB1064 usb mux gets configured to enable USB3.1 mode.
Signed-off-by: Scott Collyer <scollyer@google.com>
Change-Id: Ib1a12f1c221133d50dcbacb02bb3376ff11fc833
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3120065
Commit-Queue: Scott Collyer <scollyer@chromium.org>
Tested-by: Scott Collyer <scollyer@chromium.org>
Reviewed-by: Diana Z <dzigterman@chromium.org>
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
| |
Both retimers for guybrush will power off in G3, so flag them as such.
This is only functionally relevant to the ANX retimer, since it starts
up in USB mode by default, but is true for both.
BRANCH=None
BUG=b:195045790
TEST=on guybrush, power down to G3 and then power back up and ensure
retimer is turned off
Signed-off-by: Diana Z <dzigterman@chromium.org>
Change-Id: Ia23051ba65b232179cd3b7b3d7c1710487dcd5d2
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3095019
Reviewed-by: Rob Barnes <robbarnes@google.com>
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
| |
Enable AMD STT driver. The AMD STT driver will read the SOC and ambient
temperature sensors every second and send the result to the SOC via SB
RMI on the i2c bus.
BUG=b:176994331
TEST=stt debug
BRANCH=None
Signed-off-by: Rob Barnes <robbarnes@google.com>
Change-Id: I45157acf172dcce00c24971be70c5ec609d460dd
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3082326
Commit-Queue: Diana Z <dzigterman@chromium.org>
Reviewed-by: Diana Z <dzigterman@chromium.org>
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
| |
TMP112 supports .0625 degrees of resolution. Retain this resolution and
support reading the temp in degrees millikelvin.
BUG=b:176994331
TEST=Build and run on guybrush
BRANCH=None
Change-Id: I2802016b1edb08678953238e7f01acdd320c37cf
Signed-off-by: Rob Barnes <robbarnes@google.com>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3001391
Commit-Queue: Diana Z <dzigterman@chromium.org>
Reviewed-by: Diana Z <dzigterman@chromium.org>
|
|
|
|
|
|
|
|
|
|
|
|
|
| |
BUG=b:190348051
TEST=Verify FRS workable
BRANCH=none
Signed-off-by: Ting Shen <phoenixshen@google.com>
Change-Id: Ie612cb2e5448db4432772f32e2f84ea6a471d4b6
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3084323
Commit-Queue: Ting Shen <phoenixshen@chromium.org>
Tested-by: Ting Shen <phoenixshen@chromium.org>
Reviewed-by: Eric Yilun Lin <yllin@google.com>
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
| |
There are 3 usb typec ports in the brask. The
configuration listed below:
Port 0: TCPC NCT3808-1, TCPPC SYV682B, Burnside Bridge retimer.
Port 1: TCPC RT1716, TCPPC SYV682B, Kandou KB8002.
Port 2: TCPC NCT3808-2, TCPPC SYV682B, Burnside Bridge retimer.
In order to support the above configuration, this patch modifies:
1. use syv682v instead of using nv20p3483.
2. use rt1716 instead of using ps8815.
3. use kb800x retimer.
4. remove the fw_config because we don't need it to switch the
different DBs.
BUG=b:191637086
BRANCH=None
TEST=make BOARD=brask
Change-Id: Ie09aef9dc7cc7a532b34d86ea022127099f7735e
Signed-off-by: Zhuohao Lee <zhuohao@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3115807
Reviewed-by: caveh jalali <caveh@chromium.org>
Reviewed-by: Boris Mittelberg <bmbm@google.com>
|
|
|
|
|
|
|
|
|
|
|
|
|
|
| |
This patch adds the barrel jack support.
BUG=b:191637086
BRANCH=None
TEST=make BOARD=brask
Change-Id: Iea2df9c6a478b45cfc4a56e11f1aeb6d6b2adba2
Signed-off-by: Zhuohao Lee <zhuohao@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3114501
Reviewed-by: caveh jalali <caveh@chromium.org>
Reviewed-by: Boris Mittelberg <bmbm@google.com>
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
| |
There is a dedicated recovery button for the brask.
This patch adds the CONFIG_DEDICATED_RECOVERY_BUTTON and
CONFIG_DEDICATED_RECOVERY_BUTTON_2 to enable it.
Besides, the CONFIG_EMULATED_SYSRQ and CONFIG_MKBP_INPUT_DEVICES
are added to let the EC pass the button state to the AP
BUG=b:191637086
BRANCH=None
TEST=make BOARD=brask
Change-Id: Ic6ea693bbbc0bcd0d502d2636636bc38e080b1e9
Signed-off-by: Zhuohao Lee <zhuohao@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3114500
Reviewed-by: Boris Mittelberg <bmbm@google.com>
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
| |
This patch removes the configuration for the battery, charger,
fan control, board id, keyboard, keyboard backlight, sensor,
hibernate and led.
In order to make the build pass, the CONFIG_ADC,
CONFIG_POWER_BUTTON_IGNORE_LID and CONFIG_POWER_BUTTON_INIT_IDLE
are added to the board.h/baseboard.h. In additional, the
function board_set_active_charge_port() and board_set_charge_limit()
are added to the board.c to avoid build error.
BUG=b:191637086
BRANCH=None
TEST=make BOARD=brask
Change-Id: I15c01820dbd2f58f5722c87de51ebf425ffca13a
Signed-off-by: Zhuohao Lee <zhuohao@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3114497
Reviewed-by: Boris Mittelberg <bmbm@google.com>
Reviewed-by: caveh jalali <caveh@chromium.org>
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
| |
The baseboard/brask and board/brask are copied from the
brya. Two difference are make:
1. change BASEBOARD to brask in the build.mk to point
to the brask.
2. move the generated-gpio.inc to the gpio.inc
BUG=b:191637086
BRANCH=None
TEST=Build passed with:
1.make BOARD=brask
2.make buildall
Change-Id: I57439cffa770b3e838f372f60ed1670ac0b435d8
Signed-off-by: Zhuohao Lee <zhuohao@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3115806
Reviewed-by: Boris Mittelberg <bmbm@google.com>
Reviewed-by: caveh jalali <caveh@chromium.org>
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
| |
Switching config option to route buttons and switches over MKBP
instead of 8042 driver
BRANCH=main
BUG=b:170966461
TEST=manual tested on Brya: volume keys and tablet mode
Cq-Depend: chromium:3097939
Signed-off-by: Boris Mittelberg <bmbm@google.com>
Change-Id: Ifc45a040565dcd248de0d1cabe853550cc10bf38
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3098574
Reviewed-by: caveh jalali <caveh@chromium.org>
Reviewed-by: Rob Barnes <robbarnes@google.com>
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
| |
Enable the PSL mode for EC hibernate and define the PMU module.
After EC enters hibernate, the PSL_OUT is off and the PPC chip is
powered off. So the PPC chip can be woken up from the dead battery
mode when the external AC is plugged.
BRANCH=None
BUG=b:193583152, b:196405396
TEST=Entered EC hibernate, plugging AC can wake EC up.
Change-Id: I976d7fa7b7dfa57ee8e79501d5973710ef2192e7
Signed-off-by: Wai-Hong Tam <waihong@google.com>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3115436
Reviewed-by: Stephen Boyd <swboyd@chromium.org>
Reviewed-by: Keith Short <keithshort@chromium.org>
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
| |
Support RPM based Fan Control Algorithm via RPM-PWM hardware block
BUG=none
BRANCH=none
TEST=Tested on ADL RVP and MCHP1727 MECC system via UART console
faninfo, fanduty and fanset
1: Verify fan RPM from 3000 to 9000;
2: Verify 2-pole fan expected tach output (100Hz~300Hz) per RPM setting;
3: Verify expected PWM duty (3%~100%) per PWM duty setting;
4: Limit: can not reach 10000 RPM since RPM reaches 9000 in max as
PWM duty is set as 100%;
Signed-off-by: martin yan <martin.yan@microchip.corp-partner.google.com>
Change-Id: Ib41a06a734821c9f70a45e25e2020c6492c61563
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3100926
Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org>
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
| |
Add skuid 0xbe(190), 0xbf(191) for treeya360 new audio codec sku.
BRANCH=grunt
BUG=b:185972050
TEST=make buildall -j
Signed-off-by: arthur.lin <arthur.lin@lcfc.corp-partner.google.com>
Change-Id: I8d9fb10af1d4ec5abb146561172180c23d327226
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3088958
Reviewed-by: Paul Fagerburg <pfagerburg@chromium.org>
Reviewed-by: Edward Hill <ecgh@chromium.org>
Reviewed-by: Yu-Hsuan Hsu <yuhsuan@chromium.org>
Commit-Queue: Yu-Hsuan Hsu <yuhsuan@chromium.org>
|
|
|
|
|
|
|
|
|
|
|
|
|
| |
BRANCH=none
BUG=b:184793035
BUG=b:196756955
TEST=make BOARD=cherry_scp
Change-Id: I3b026ae0a14b9317cbfff1aa5838e5c3c7811420
Signed-off-by: Tinghan Shen <tinghan.shen@mediatek.com>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3062704
Reviewed-by: Tzung-Bi Shih <tzungbi@chromium.org>
Commit-Queue: Tzung-Bi Shih <tzungbi@chromium.org>
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
| |
Switching config option to route buttons and switches over MKBP
instead of 8042 driver
BRANCH=main,dedede
BUG=b:170966461
TEST=manual tested on Madoo
Cq-Depend: chromium:3094530
Signed-off-by: Boris Mittelberg <bmbm@google.com>
Change-Id: I5c82ee09a64b1971e63547220ca20c1226cb5ba3
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3069163
Reviewed-by: Karthikeyan Ramasubramanian <kramasub@chromium.org>
Reviewed-by: Furquan Shaikh <furquan@chromium.org>
Tested-by: Nick Vaccaro <nvaccaro@google.com>
Commit-Queue: Paul Fagerburg <pfagerburg@chromium.org>
|
|
|
|
|
|
|
|
|
|
|
| |
BUG=b:195406641
BRANCH=none
TEST=ADLRVP type-C ports can enter low power mode
Change-Id: I0b457758ba67328c139c85dce977603e305715d0
Signed-off-by: Vijay Hiremath <vijay.p.hiremath@intel.com>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3088162
Reviewed-by: caveh jalali <caveh@chromium.org>
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
| |
Currently, only the virtual mux driver uses the mux ACK feature, but the
actual wait for the host command ACK is a part of the usb_mux general
code. Generalize this mux ACK wait so it's available if needed in the
future for more muxes.
Additionally, moving this wait out of the mux set will allow us to lock
the muxes intelligently between tasks, without keeping the muxes locked
during the inactive ACK wait.
BRANCH=None
BUG=b:172222942,b:186777984
TEST=tast typec.Mode*.manual on voxel
Signed-off-by: Diana Z <dzigterman@chromium.org>
Change-Id: I61a043425a482cc6f3170548c888d91ec20c2a82
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3078411
Reviewed-by: Keith Short <keithshort@chromium.org>
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
| |
Split after-reset time for NCT3807 and NCT3808, since the after-reset
time is not the same.
From the datasheet (section 4.4.2 Reset Timing) as following:
* | Min | Max |
* ----------------------+-------+-------+
* NCT3807 (single port) | x | 1.5ms |
* ----------------------+-------+-------+
* NCT3808 (dual port) | x | 3ms |
* ----------------------+-------+-------+
Currently the after-reset time for NCT3807 is zero. Change to 2ms to
fit specification as well.
BUG=none
BRANCH=none
TEST=On Redrix. Initial success with NCT3807.
TEST=On Dirinboz. Initial success with NCT3807.
TEST=make buildall.
Signed-off-by: Devin Lu <Devin.Lu@quantatw.com>
Change-Id: I1f47f57c0d8955946b1c2522e1a1736739217f41
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3068492
Reviewed-by: caveh jalali <caveh@chromium.org>
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
| |
Motion sensor are only supported in guybrush convertible designs.
Parade retimer is currently used by guybrush reference and OEM board.
ANX flags are only required in guybrush reference board.
BUG=b:194031783
BRANCH=None
TEST=make BOARD=nipperkin
make BOARD=guybrush
Signed-off-by: Bhanu Prakash Maiya <bhanumaiya@google.com>
Change-Id: Ia84f8396510ad833d033bb6743e22bbbdc4d5204
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3088587
Reviewed-by: Diana Z <dzigterman@chromium.org>
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
| |
Add a newline to the debug message to make it easier to read.
BUG=none
TEST=none
BRANCH=main
Signed-off-by: Ting Shen <phoenixshen@google.com>
Change-Id: Ice108ca54cc4247c1d76c9f29c1392f15a4de5b2
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3087982
Tested-by: Ting Shen <phoenixshen@chromium.org>
Auto-Submit: Ting Shen <phoenixshen@chromium.org>
Reviewed-by: Eric Yilun Lin <yllin@google.com>
Commit-Queue: Eric Yilun Lin <yllin@google.com>
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
| |
samus: AUE in M91, M92 pushed to stable already
samus_pd: samus pd chip
dragonegg: canceled
cheza: canceled
flapjack_scp: flapjack was canceled
atlas_ish: atlas shipped, but ish project canceled
sklrvp,glkrvp: these are pretty old intel reference boards and the
portage overlays were already deleted ... assume nobody needs the
EC firmware anymore either
BUG=none
BRANCH=none
TEST=buildall
Signed-off-by: Jack Rosenthal <jrosenth@chromium.org>
Change-Id: I794867ac82f37ffa2267e2e59ac02bc381688c57
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3069716
Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org>
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
| |
Each board defines its own callback lid_angle_peripheral_enable().
The implementation is very similar. Create a common implementation
and reduce the duplicated code.
This CL removes the board callbacks which are identifical to the
common callback. If it is slightly different, keep it and add
the __override tag.
The check of TEST_BUILD is unnecessary as the board callback is not
linked in the test build.
BRANCH=None
BUG=b:194922043
TEST=Build all the images.
Change-Id: I73d381730f35b80eff69399cdfc5fb54f839aee0
Signed-off-by: Wai-Hong Tam <waihong@google.com>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3069175
Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
| |
For mt8192 and mt8195 can use the same vdec.c/venc.c, change build
config to support different platforms.
BRANCH=none
BUG=b:184793035
TEST=make BOARD=cherry_scp
Signed-off-by: Yunfei Dong <yunfei.dong@mediatek.org>
Change-Id: Id096d4ddd80caf4dcf39b7a8a747baf386b1b9c1
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2913490
Reviewed-by: Tzung-Bi Shih <tzungbi@chromium.org>
Reviewed-by: Yunfei Dong <yunfei.dong@mediatek.corp-partner.google.com>
Tested-by: Yunfei Dong <yunfei.dong@mediatek.corp-partner.google.com>
Commit-Queue: Tzung-Bi Shih <tzungbi@chromium.org>
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
| |
Decoder hardware need to use privilege mode to read/write
register.
BRANCH=none
BUG=b:184793035
TEST=make BOARD=cherry_scp
Signed-off-by: Yunfei Dong <yunfei.dong@mediatek.org>
Change-Id: Ifaa1fd5a05f6a19aa7a520461122b75c73a60c9f
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2913481
Reviewed-by: Tzung-Bi Shih <tzungbi@chromium.org>
Reviewed-by: Yunfei Dong <yunfei.dong@mediatek.corp-partner.google.com>
Tested-by: Yunfei Dong <yunfei.dong@mediatek.corp-partner.google.com>
Commit-Queue: Tzung-Bi Shih <tzungbi@chromium.org>
|
|
|
|
|
|
|
|
|
|
|
|
|
|
| |
Update SPI host interface config option for inclusive language.
BUG=b:163885307
BRANCH=none
TEST=compare_build.sh
Signed-off-by: Keith Short <keithshort@chromium.org>
Change-Id: I808d5960fa3e746626465bedc626a95e0f0aaa3f
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3066271
Commit-Queue: Paul Fagerburg <pfagerburg@chromium.org>
Reviewed-by: Paul Fagerburg <pfagerburg@chromium.org>
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
| |
With `CONFIG_EEPROM_CBI_WP`, the EC will set the the CBI EEPROM WP
according to `system_is_locked`. The system lock status is also cached.
In order to prevent requiring an EC reboot after setting the software
write protect status, this commit will set the CBI EEPROM WP status when
the SW WP is asserted along with the HW WP. This is the same criteria
that `system_is_locked` would use when deciding if the system is locked.
BUG=b:181769483
BRANCH=None
TEST=Build and flash a reworked lalala, enable HW WP, enable SW WP via
`flashrom -p ec --wp-enable` and verify that EC_CBI_WP is asserted
immediately without requiring an EC reboot.
Signed-off-by: Aseda Aboagye <aaboagye@google.com>
Change-Id: I987a5b7652134be11c82855aab9ed4eb1442b57c
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3058077
Tested-by: Aseda Aboagye <aaboagye@chromium.org>
Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org>
Commit-Queue: Aseda Aboagye <aaboagye@chromium.org>
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
| |
Use SSFC bits 6-7 to choose which secondary MUX is used.
BUG=b:192523667
BRANCH=zork
TEST=After setting SSFC to 0x80 on the DUT with PS8818,
the typec on DB works fine.
Signed-off-by: Sue Chen <sue.chen@quanta.corp-partner.google.com>
Change-Id: I8a66098d1e9b947acfb26b78f0cec7f835bf4c40
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3000894
Reviewed-by: Edward Hill <ecgh@chromium.org>
Commit-Queue: Edward Hill <ecgh@chromium.org>
|