delta/coreboot/chrome-ec.git - review.coreboot.org: chrome-ec.git

	Commit message (Collapse)	Author	Age	Files	Lines
*	mchp: Move I2C_CONTROLLER_COUNT and I2C_PORT_COUNT to chip	martin yan	2021-06-30	1	-7/+0
\| \| \| \| \| \| \| \| \| \| \| \| \| \| \| \| \| \|	Move I2C_CONTROLLER_COUNT and I2C_PORT_COUNT to registers-mec172x.h and registers-mec152x.h from board.h, both are chip specific BRANCH=none BUG=none TEST=Tested adlrvpp_mchp1727 and sklrvp_mchp1723 adlrvpp_mchp1521 and sklrvp_mchp Signed-off-by: martin yan <martin.yan@microchip.corp-partner.google.com> Change-Id: Icd91e9877e0053c83c1a73d10470ffefedd90a01 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2982390 Reviewed-by: Vijay Hiremath <vijay.p.hiremath@intel.com> Reviewed-by: Aseda Aboagye <aaboagye@chromium.org> Commit-Queue: Aseda Aboagye <aaboagye@chromium.org>
*	adlrvpp_mchp1521: Add code for ADL-P-DDR4 RVP using Microchip EC	Poornima Tom	2021-05-20	6	-0/+604
	ADL-P-DDR4 RVP has on board Microchip EC-MEC1521. This code enables RVP powering ON using this on board EC, instead of Mica EC. As this onboard EC doesn't have internal flash memory, EC binary of 512KB size generated is flashed to external SPI Flash1(32MB size) available on RVP over SPI using servo.This image from flash1 is then bootloaded by MEC1521, when powered ON. BUG=b:186669325 BRANCH=none TEST=ADL-P-DDR4 board with Microchip 1521 EC booted to S0. Signed-off-by: Poornima Tom <poornima.tom@intel.com> Change-Id: I39f937f60e2f79b0d2de195621084e3276e36bf2 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2755363 Tested-by: Vijay Hiremath <vijay.p.hiremath@intel.com> Reviewed-by: caveh jalali <caveh@chromium.org>