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* ps8xxx: Set RP during LPM enter if TCPC acts as mux onlyPatryk Duda2021-01-281-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Some boards (eg. ampton) uses TCPC/MUX chips (eg. PS8751) as muxers only. In this case CC lines are simply not connected. Nevertheless setting CC lines to approptiate value can decrease power consumption. This patch implements custom PS8xxx MUX driver which is responsible for setting RP on both CC lines on Low Power Mode enter when this TCPC is used as muxer only (USB_MUX_FLAG_NOT_TCPC flag is set). Due to flash size constraints, this driver is only available when appropriate config is defined. Unfortunately, RP can't be set once during initialization because after switching mux appropriately there is no connection. To work properly RD should be set on both CC lines. Changing RD -> RP after switching mux doesn't work (breaks connection), even with some delay before switching to RP again. Moreover, when PS8751 is in standby mode, first I2C transaction always fails. Documentation suggests that device could be woken up by performing I2C read from PS8XXX_REG_I2C_DEBUGGING_ENABLE register. For more information about purpose of this change please refer to b:113830171#comment18 and further. BUG=b:151155658 BRANCH=none TEST=Flash EC ToT on Ampton. Check if power consumption is lower. Don't connect devices to tested USB-C port. Issue 'i2cxfer r 2 0xB 0x1A' 2 times within 2 seconds and check if it returns 0x05 (DRP disabled, RP default, CC1, CC2 set to RP). Repeat above with command 'i2cxfer r 4 0xB 0x1A'. NOTE: PS8751 goes to Low Power Mode automatically after 2 seconds when RP is set that is why we need to read register 2 times, first to wake up device, second to read value. TEST=Connect device to USB-C port, check in dmesg that device is recognised as SuperSpeed device. Repeat this test 10 times. Check also different rotation. Change-Id: Ie1bac6caa9912c024c87792536d7a35863fa96a0 Signed-off-by: Patryk Duda <pdk@semihalf.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2614618 Reviewed-by: Wai-Hong Tam <waihong@google.com> Commit-Queue: Wai-Hong Tam <waihong@google.com>
* ampton: Check return value in board specific mux initPatryk Duda2021-01-271-2/+3
| | | | | | | | | | | | | | | | | This patch adds checking if I2C writes to PS8751 muxer succeded. There are many reasons causing fail during mux_write(), one of them is that device is in standby mode. With this CL, problems will be reported to developer. BUG=b:151155658 BRANCH=none TEST=make -j buildall Signed-off-by: Patryk Duda <pdk@semihalf.com> Change-Id: Ide342ed8c713e58d91880d41a584c56866f95fec Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2633982 Reviewed-by: Aseda Aboagye <aaboagye@chromium.org> Reviewed-by: Diana Z <dzigterman@chromium.org>
* Move tcpic.h header into include/driverSimon Glass2021-01-071-1/+1
| | | | | | | | | | | | | | | | | | This header cannot currently be accessed by Zephyr since it is in a driver directory, not an include directory. This header has quite a bit of public stuff in it, so it seems reasonable to consider everything public. Move the header file and update all users. BUG=b:175434113 BRANCH=none TEST=make buildall -j30 build volteer on zephyr Signed-off-by: Simon Glass <sjg@chromium.org> Change-Id: Ibba37f47a06783fafb5095f853f2a68d92b6df87 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2607745
* ampton: change sku id 3,4 for g-sensor BMA253 in the lidJames_Chao2020-04-301-11/+40
| | | | | | | | | | | | | | | | | The sku id 3,4 have never been manufactured. We use those id to identify the sensor type in the lid. BUG=b:153934973,b:154297511 BRANCH=octopus TEST=Check the sensor work correctly. Change-Id: Idf0b37fb0113e97a4927810cfaf9fbd1eb7a13a9 Signed-off-by: James_Chao <james_chao@asus.corp-partner.google.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2172563 Reviewed-by: Marco Chen <marcochen@chromium.org> Reviewed-by: Li-jen Chen <lijen@google.com> Commit-Queue: Li-jen Chen <lijen@google.com> Commit-Queue: Henry Sun <henrysun@google.com>
* driver: Replace BMI160 to BMI in board configChing-Kang Yen2020-04-231-6/+6
| | | | | | | | | | | | | | | | | Replace some macro of BMI160 to BMI version for common function of BMI series. Make board config include the accelgyro_bmi_common.h instead of accel_gyro_bmi160.h. BRANCH=None BUG=b:146144827 TEST=make buildall -j Change-Id: I043ff8a92f15295ead3fa5c1e292319e2b4fa21a Signed-off-by: Ching-Kang Yen <chingkang@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2156525 Reviewed-by: Gwendal Grignou <gwendal@chromium.org>
* Revert "Ampton: Set the PS8751 to source mode before enter low power mode"Matthew Blecker2020-03-071-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This reverts commit 4ca73139635261ee1273fbe1767dcf06886d2208. Reason for revert: Breaks CCD with AP off https://issuetracker.google.com/150822168 Will work on a solution to address the original CL need, i.e. applying Rp in LPM. Follow the above bug. Some merge conflict happens. Resolved. Also change the usb_mux driver of Trogdor, as ps8xxx_usb_mux_driver is removed. Original change's description: > Ampton: Set the PS8751 to source mode before enter low power mode > > BUG=b:113830171 > BRANCH=octopus > TEST=check the power consumption is lower > > Change-Id: I527cdc5d1e4dd5de137ab0927e66c171696758ce > Signed-off-by: James_Chao <james_chao@asus.corp-partner.google.com> > Reviewed-on: https://chromium-review.googlesource.com/1426306 > Commit-Ready: James Chao <james_chao@asus.corp-partner.google.com> > Tested-by: James Chao <james_chao@asus.corp-partner.google.com> > Reviewed-by: Jett Rink <jettrink@chromium.org> BRANCH=None BUG=b:113830171,150822168 TEST=Build Trogdor, verified CCD with AP off working. Change-Id: I58c26e8466b70e035a1c396cfcba6a46da4bccc9 Signed-off-by: Wai-Hong Tam <waihong@google.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2091519 Reviewed-by: Aseda Aboagye <aaboagye@chromium.org> Reviewed-by: Jett Rink <jettrink@chromium.org> Reviewed-by: Matthew Blecker <matthewb@chromium.org>
* usb_mux: retimer: mux as chained mux and retimerDenis Brockus2020-02-281-9/+11
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This makes retimers appear as generic muxes. By allowing a chain of muxes they can be stacked up to the new configurations that zork requires and will continue to work as they did before on configurations that only have a single mux. The code used to have two different arrays, 1) muxes and 2) retimers. On one of the zork configurations the processor MUX stopped being the primary mux and the retimer took its place. In a different configuration of that same platform it left the primary and secondary alone but the mux_set FLIP operation had to be ignored. Since the same interfaces needed to be available for both it stopped making sense to have two different structures and two different methods of handling them. This consolodates the two into one. The platforms that do not have retimers, this change will not make any difference. For platforms like zork, it will remove the retimers and make them chained muxes. So testing on trembyle makes sense to verify, BUG=b:147593660 BRANCH=none TEST=verify USB still works on trembyle Change-Id: I286cf1e302f9bd3dd7e81098ec08514a2a009fe3 Signed-off-by: Denis Brockus <dbrockus@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2066794 Commit-Queue: Jett Rink <jettrink@chromium.org> Reviewed-by: Edward Hill <ecgh@chromium.org> Reviewed-by: Jett Rink <jettrink@chromium.org>
* Temp sensor: Remove action_delay_sec fieldDiana Z2020-02-141-6/+3
| | | | | | | | | | | | | | The action_delay_sec field hasn't actually been referenced by any code since 2013. Removing the corresponding struct field. BUG=None BRANCH=None TEST=builds Change-Id: Ia7334c26b85d0161ff61bb51fbdda61bb921595a Signed-off-by: Diana Z <dzigterman@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2054945 Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
* board: Set Accelerometer range to 4gGwendal Grignou2019-12-171-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Required by Android CDD - Section 7.3.1 - Paragraph C.1.4 Modified mechanically with: for i in $(grep -lr "\.default_range" board); do sed -i '/.default_range =/s#\(.*\.default_range = \).* /\ \* g.*#\14, /* g, to meet CDD 7.3.1/C-1-4 reqs */#' $i done Manually reworked to only change the accelerometer that matters to android: The lid accelerometer or the base accelerometer if the base also hosts the gyroscope. This is only for future EC, no need to land the change on branches: mems_setup will take care to set accelerometer ranges at 4g on startup. BUG=b:144004449 BRANCH=none TEST=compile Change-Id: If8c14b2e928c9c70c0ce51451adcfcd674a9e73b Signed-off-by: Gwendal Grignou <gwendal@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1957375 Reviewed-by: Justin TerAvest <teravest@chromium.org> Reviewed-by: Alexandru M Stan <amstan@chromium.org>
* board: Set min/max frequency attributesGwendal Grignou2019-12-091-0/+2
| | | | | | | | | | | | | | | On some boards, min_/max_frequency attributes were not set, esp. for kx022 acceleometers. BUG=b:145799480 BRANCH=octopus,coral TEST=compile Change-Id: I6d32926541505f02f183539ca3ad9f70c1ae7a6b Signed-off-by: Gwendal Grignou <gwendal@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1957374 Reviewed-by: Justin TerAvest <teravest@chromium.org> Tested-by: Justin TerAvest <teravest@chromium.org>
* Rename CONFIG_USB_PD_PORT_COUNT as CONFIG_USB_PD_PORT_MAX_COUNTKarthikeyan Ramasubramanian2019-11-011-1/+1
| | | | | | | | | | | | | | | | | Certain SKUs of certain boards have lesser number of USB PD ports than defined by CONFIG_USB_PD_PORT_COUNT. Hence rename CONFIG_USB_PD_PORT_COUNT as CONFIG_USB_PD_PORT_MAX_COUNT. BUG=b:140816510, b:143196487 BRANCH=octopus TEST=make -j buildall; Boot to ChromeOS Change-Id: I7c33b27150730a1a3b5813b7b4a72fd24ab73c6a Signed-off-by: Karthikeyan Ramasubramanian <kramasub@google.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1879337 Tested-by: Karthikeyan Ramasubramanian <kramasub@chromium.org> Reviewed-by: Jett Rink <jettrink@chromium.org> Commit-Queue: Jett Rink <jettrink@chromium.org>
* tablet_mode: Renaming for GMR sensorPhilip Chen2019-09-191-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | GMR sensors can be used to (1) detect clamshell/tablet mode (2) detect lid open/closed But hall sensors can only do (2). Therefore the naming related to "hall sensor" for tablet mode application is incorrect. This patch performs the following renaming to better reflect the reality: config: CONFIG_HALL_SENSOR -> CONFIG_GMR_TABLET_MODE CONFIG_HALL_SENSOR_CUSTOM -> CONFIG_GMR_TABLET_MODE_CUSTOM CONFIG_DPTF_MOTION_LID_NO_HALL_SENSOR -> CONFIG_DPTF_MOTION_LID_NO_GMR_SENSOR GPIO: HALL_SENSOR_GPIO_L -> GMR_TABLET_MODE_GPIO_L functions: hall_sensor_disable() -> gmr_tablet_switch_disable() hall_sensor_isr() -> gmr_tablet_switch_isr() hall_sensor_int() -> gmr_tablet_switch_init() variable: hall_sensor_at_360 -> gmr_sensor_at_360 BUG=b:139378190 BRANCH=none TEST=make buildall Change-Id: I28393d056ddd128d8ffafc16a1f9fefee5455ccc Signed-off-by: Philip Chen <philipchen@google.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1757275 Reviewed-by: Furquan Shaikh <furquan@chromium.org> Reviewed-by: Aseda Aboagye <aaboagye@chromium.org> Commit-Queue: Philip Chen <philipchen@chromium.org> Tested-by: Philip Chen <philipchen@chromium.org>
* Remove __7b, __8b and __7bfDenis Brockus2019-07-201-5/+5
| | | | | | | | | | | | | | | | | | | The extentions were added to make the compiler perform most of the verification that the conversion was being done correctly to remove 8bit addressing as the standard I2C/SPI address type. Now that the compiler has verified the code, the extra extentions are being removed BUG=chromium:971296 BRANCH=none TEST=make buildall -j TEST=verify sensor functionality on arcada_ish Change-Id: I36894f8bb9daefb5b31b5e91577708f6f9af2a4f Signed-off-by: Denis Brockus <dbrockus@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1704792 Reviewed-by: Jack Rosenthal <jrosenth@chromium.org>
* Use 7bit I2C/SPI slave addresses in ECDenis Brockus2019-07-191-5/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Opt for 7bit slave addresses in EC code. If 8bit is expected by a driver, make it local and show this in the naming. Use __7b, __7bf and __8b as name extensions for i2c/spi addresses used in the EC codebase. __7b indicates a 7bit address by itself. __7bf indicates a 7bit address with optional flags attached. __8b indicates a 8bit address by itself. Allow space for 10bit addresses, even though this is not currently being used by any of our attached devices. These extensions are for verification purposes only and will be removed in the last pass of this ticket. I want to make sure the variable names reflect the type to help eliminate future 7/8/7-flags confusion. BUG=chromium:971296 BRANCH=none TEST=make buildall -j Change-Id: I2fc3d1b52ce76184492b2aaff3060f486ca45f45 Signed-off-by: Denis Brockus <dbrockus@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1699893 Reviewed-by: Jack Rosenthal <jrosenth@chromium.org>
* cleanup: Segregate USB MUX related drivers in usb_mux folderVijay Hiremath2019-07-171-1/+1
| | | | | | | | | | | BUG=none BRANCH=none TEST=make buildall -j Change-Id: If44a363d1288cbfabe5c6545e550f2b8fc623227 Signed-off-by: Vijay Hiremath <vijay.p.hiremath@intel.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1700793 Reviewed-by: Jett Rink <jettrink@chromium.org>
* ampton: tune the dp mux to improve external monitor compatibilityJames_Chao2019-05-071-0/+16
| | | | | | | | | | | | | | | | | | When the ampton connected to external monitor Viewsonic VX2880, it can't display normally. We need to tune the mux: 1. modulate DP equalization setting : 12.8dB > 3.6dB 2. modulate Vswing: 15% BUG=b:131113883 BRANCH=octopus TEST=Check the monitor VX2880 can display normally. Change-Id: Id8d32b41b4fdde4799a54e0081b5ddadf3534fba Reviewed-on: https://chromium-review.googlesource.com/1575886 Commit-Ready: Diana Z <dzigterman@chromium.org> Tested-by: Justin TerAvest <teravest@chromium.org> Reviewed-by: Justin TerAvest <teravest@chromium.org> Reviewed-by: Jett Rink <jettrink@chromium.org>
* Ampton: tune the gyro axis and directionJames_Chao2019-02-271-1/+7
| | | | | | | | | | | | BUG=b:126135808 BRANCH=octopus TEST=run the CTS verifier, check the axis and direction is correct Change-Id: I2b6e598e07a5245b452aff8f46c425b72f30b841 Signed-off-by: James_Chao <james_chao@asus.corp-partner.google.com> Reviewed-on: https://chromium-review.googlesource.com/c/1490833 Reviewed-by: Justin TerAvest <teravest@chromium.org> Commit-Queue: ChromeOS CL Exonerator Bot <chromiumos-cl-exonerator@appspot.gserviceaccount.com>
* Ampton: correct thermistor reading functionDiana Z2019-02-131-8/+1
| | | | | | | | | | | | | | | | | | | The charger thermistor on ampton is tied to the PP3300_A rail, rather than the PP6000_LDO_OUT rail which bip used. As such, the charger reading does not depend on AC being present, but does depend on the A rail being enabled. BUG=None BRANCH=octopus TEST=loaded onto apel and confirmed "ectool temps all" now returns charger temperature with AC unplugged, in G3 "temps" will show the ambient and charger sensors as not powered Change-Id: I2ae03899fba8a436e34452bbc644f5e872afd408 Signed-off-by: Diana Z <dzigterman@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/1457076 Reviewed-by: Furquan Shaikh <furquan@chromium.org> Reviewed-by: Jett Rink <jettrink@chromium.org>
* Ampton: Set the PS8751 to source mode before enter low power modeJames_Chao2019-01-251-2/+2
| | | | | | | | | | | | | BUG=b:113830171 BRANCH=octopus TEST=check the power consumption is lower Change-Id: I527cdc5d1e4dd5de137ab0927e66c171696758ce Signed-off-by: James_Chao <james_chao@asus.corp-partner.google.com> Reviewed-on: https://chromium-review.googlesource.com/1426306 Commit-Ready: James Chao <james_chao@asus.corp-partner.google.com> Tested-by: James Chao <james_chao@asus.corp-partner.google.com> Reviewed-by: Jett Rink <jettrink@chromium.org>
* Ampton: tune motion sensorsJames_Chao2019-01-231-1/+7
| | | | | | | | | | | | | | BUG=b:118756407 BRANCH=octopus TEST=On Ampton EVT, Check the x,y,z direction is correct. Change-Id: Ia84d5db0723d8b24e7725333f35d466b7438598b Signed-off-by: James_Chao <james_chao@asus.corp-partner.google.com> Reviewed-on: https://chromium-review.googlesource.com/1425138 Commit-Ready: James Chao <james_chao@asus.corp-partner.google.com> Tested-by: James Chao <james_chao@asus.corp-partner.google.com> Reviewed-by: Jett Rink <jettrink@chromium.org> Reviewed-by: Justin TerAvest <teravest@chromium.org>
* USB PD: PPC: Add overcurrent handling.Aseda Aboagye2019-01-171-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The Type-C Power Path Controllers provide overcurrent protection. This commit adds support into the USB PD task for overcurrent events while we are in source role. The USB PD 3.0 spec recommends that ports issue a hard reset when an overcurrent condition occurs on a port. Additionally, we'll allow a source port to overcurrent 3 times before latching off VBUS from the port entirely. The source path will be re-enabled after ~1s after each overcurrent event. BUG=b:69935262,b:114680657 BRANCH=None TEST=Boot to ChromeOS in grabbiter. No overcurrent events reported when the sink is drawing <= 3.20 A. Overcurrent events are reported when the sink is drawing > 3.25 A. After 3 reports, the port is latched off and power delivery is stopped. The port is re-enabled only after the sink is disconnected. Also when the sink is drawing current at 3.24 A, there is one report of overcurrent. The port gets disabled in response to that event. But the port is re-enabled after 1 second since overcurrent event is reported only once. After the port is re-enabled, the sink is able to draw the set current. When the overcurrent event is reported, I can see in the kernel logs that the overcurrent condition is detected by the kernel. EC Logs: [3391.984462 C1: PPC detected Vbus overcurrent!] [3391.984953 C1: overcurrent!] [3392.044935 C1: PPC detected Vbus overcurrent!] [3392.045425 C1: overcurrent!] [3392.061404 C1: PPC detected Vbus overcurrent!] [3392.061894 C1: overcurrent!] [3392.062142 C1: OC event limit reached! Source path disabled until physical disconnect.] [3392.077226 C1: PPC detected Vbus overcurrent!] [3392.077532 C1: overcurrent!] [3392.077891 C1: OC event limit reached! Source path disabled until physical disconnect.] [3392.092660 C1: PPC detected Vbus overcurrent!] [3392.092966 C1: overcurrent!] [3392.093213 C1: OC event limit reached! Source path disabled until physical disconnect.] Kernel Logs: [ 3356.560456] usb usb2-port1: over-current condition [ 3356.768434] usb usb2-port2: over-current condition [ 3356.976446] usb usb2-port4: over-current condition [ 3357.184441] usb usb2-port5: over-current condition [ 3357.392445] usb usb2-port6: over-current condition Change-Id: Ib070f261e98264cd88725ebce7d10e0798267e3b Signed-off-by: Aseda Aboagye <aaboagye@google.com> Signed-off-by: Karthikeyan Ramasubramanian <kramasub@google.com> Reviewed-on: https://chromium-review.googlesource.com/c/1286300 Tested-by: Aseda Aboagye <aaboagye@chromium.org> Reviewed-by: Jett Rink <jettrink@chromium.org> Commit-Queue: Jett Rink <jettrink@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/807633 Commit-Ready: Karthikeyan Ramasubramanian <kramasub@chromium.org> Tested-by: Karthikeyan Ramasubramanian <kramasub@chromium.org> Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
* Ampton: Implement the functions about ar cameraJames_Chao2018-12-051-0/+26
| | | | | | | | | | | | | | BUG=b:119926441 BRAHCN=octopus TEST=build success Change-Id: I7ba0632c49836ba957c40d66ed4dfc5cf905c8c6 Signed-off-by: James_Chao <james_chao@asus.corp-partner.google.com> Reviewed-on: https://chromium-review.googlesource.com/1349158 Commit-Ready: James Chao <james_chao@asus.corp-partner.google.com> Tested-by: James Chao <james_chao@asus.corp-partner.google.com> Reviewed-by: Marco Chen <marcochen@chromium.org> Reviewed-by: Jett Rink <jettrink@chromium.org>
* Ampton: change the port0 mux to PS8751James_Chao2018-12-031-0/+38
| | | | | | | | | | | | | | | | | Due to the DP measurement eye-diagram and pre-emphasize fail, we change the mux to PS8751 on the type-c port in mainboard. BUG=b:118728290,b:119840612 BRANCH=octopus TEST=FAFT pass and check the mux function working on EVT. Change-Id: I1817686f09f6aa9a557907b279ab61c889335d9e Signed-off-by: James_Chao <james_chao@asus.corp-partner.google.com> Reviewed-on: https://chromium-review.googlesource.com/1343642 Commit-Ready: James Chao <james_chao@asus.corp-partner.google.com> Tested-by: James Chao <james_chao@asus.corp-partner.google.com> Reviewed-by: Jett Rink <jettrink@chromium.org> Reviewed-by: Diana Z <dzigterman@chromium.org>
* tablet_mode: Introduce hall sensor specific handlingFurquan Shaikh2018-11-291-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This change performs the following renaming: 1. CONFIG_TABLET_SWITCH -> CONFIG_HALL_SENSOR Indicates if a device has hall sensor 2. TABLET_MODE_GPIO_L -> HALL_SENSOR_GPIO_L Provides the interrupt line from hall sensor to EC. 3. tablet_mode_isr -> hall_sensor_isr Interrupt routine that gets control on hall sensor interrupt. 4. tablet_mode_init -> hall_sensor_init Init routine for initializing hall sensor interrupt. 5. tablet_switch_disable -> hall_sensor_disable Disable hall sensor interrupt and tablet mode sub-system. This is done to separate hall sensor interrupt from tablet mode handling. It is another step towards aligning tablet mode detection on EC with Chrome. Hall sensor interrupt occurs when the lid is in 360-degree flipped mode. If tablet mode is not already triggered by lid motion driver, then hall_sensor_isr will set tablet mode and take necessary actions to disable input peripherals. CQ-DEPEND=CL:1351518 BUG=b:120050761 BRANCH=octopus TEST=make -j buildall Change-Id: I5841f6875d538a624cb888bc048f252397ab457c Signed-off-by: Furquan Shaikh <furquan@google.com> Reviewed-on: https://chromium-review.googlesource.com/1350469 Commit-Ready: Furquan Shaikh <furquan@chromium.org> Tested-by: Furquan Shaikh <furquan@chromium.org> Reviewed-by: Aaron Durbin <adurbin@chromium.org> Reviewed-by: Jett Rink <jettrink@chromium.org>
* Ampton: Correct accel sensor base reference dependent on sensor locationJames_Chao2018-11-211-8/+6
| | | | | | | | | | | | | | BUG=b:118756407 BRANCH=none TEST=accelinfo on Change-Id: I3e9f1791a12e5cb63572b1d50435b4e7a42b7ccd Signed-off-by: James_Chao <james_chao@asus.corp-partner.google.com> Reviewed-on: https://chromium-review.googlesource.com/1343641 Commit-Ready: James Chao <james_chao@asus.corp-partner.google.com> Tested-by: James Chao <james_chao@asus.corp-partner.google.com> Reviewed-by: James Chao <james_chao@asus.corp-partner.google.com> Reviewed-by: Diana Z <dzigterman@chromium.org>
* Ampton: enable the interrupt for GPIO_BASE_SIXAXIS_INT_LJames_Chao2018-11-191-0/+6
| | | | | | | | | | | | | | | BUG=none BRANCH=none TEST=accelinfo on Change-Id: I04764b0ce3f963f12f7977b08c89a375c2319d00 Signed-off-by: James_Chao <james_chao@asus.corp-partner.google.com> Reviewed-on: https://chromium-review.googlesource.com/1335292 Commit-Ready: James Chao <james_chao@asus.corp-partner.google.com> Tested-by: James Chao <james_chao@asus.corp-partner.google.com> Reviewed-by: James Chao <james_chao@asus.corp-partner.google.com> Reviewed-by: Marco Chen <marcochen@chromium.org> Reviewed-by: Jett Rink <jettrink@chromium.org>
* Ampton: add sku id for convertible skuJames_Chao2018-11-151-2/+3
| | | | | | | | | | | | | | | | According to b:112290350, the convertible sku is 1,2,3,4 BUG=b:112290350 BRANCH=none TEST=build Change-Id: I2de55eb070741f3a0058fd390f897a863562f762 Signed-off-by: James_Chao <james_chao@asus.corp-partner.google.com> Reviewed-on: https://chromium-review.googlesource.com/1335290 Commit-Ready: James Chao <james_chao@asus.corp-partner.google.com> Tested-by: James Chao <james_chao@asus.corp-partner.google.com> Reviewed-by: James Chao <james_chao@asus.corp-partner.google.com> Reviewed-by: Jett Rink <jettrink@chromium.org>
* SN5S330: treat interrupts as level-sensitiveDiana Z2018-11-131-0/+8
| | | | | | | | | | | | | | | | | | | | | | | | | | The SN5S330 PPC will pull its /INT pin low until all interrupts are cleared. Since the interrupt pin is treated as edge-sensitive, its handler needs to provide level-checking before exiting. Otherwise, if not all interrupts are cleared before the handler exits, the EC won't see another edge to call the handler again. Boards which share the PPC interrupt pin with other sources may choose to implement their own callback, if they are able to determine which chip was the source of the interrupt. BUG=b:118846062 BRANCH=None TEST=performed several power swaps and unplugs on a pair of Careenas, verifying that in instances where the handler had to loop around we correctly cleared the interrupts and the "ectool usbpdpower" output was normal Change-Id: Iccbe40976a746d109d67b9a91f8fbd81898f9b3f Signed-off-by: Diana Z <dzigterman@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/1327123 Reviewed-by: Scott Collyer <scollyer@chromium.org> Reviewed-by: Edward Hill <ecgh@chromium.org> Reviewed-by: Jett Rink <jettrink@chromium.org>
* Ampton: add initial motion sensor codeDiana Z2018-10-311-3/+144
| | | | | | | | | | | | | | | | Adds initial motion sensor code for ampton and apel, based on the code for similar boards. Sensors will only be present on ampton SKUs (currently numbered 1 and 2). BRANCH=None BUG=b:115501243 TEST=builds Change-Id: I61de2ec824df27b2944dd291c0e3bdbdae13a04b Signed-off-by: Diana Z <dzigterman@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/1310094 Reviewed-by: Furquan Shaikh <furquan@chromium.org> Reviewed-by: Justin TerAvest <teravest@chromium.org>
* bc12: rename bq24392 driver to max14637Scott Collyer2018-10-021-1/+0
| | | | | | | | | | | | | | | | | | | | The MAX14637 BC 1.2 USB charger detection chip is functionally similar to the bq24392 and can use the same driver. Rather than have 2 copies of the same driver, or a generic named driver than can be used for both chips, rename the existing bq24392 driver to max14637 as that's the BC 1.2 chip that our current designs are using. BUG=b:113267982 BRANCH=none TEST=make -j buildall Change-Id: I03cfb4918513d756c2a41341001a8162652a29b6 Signed-off-by: Scott Collyer <scollyer@google.com> Reviewed-on: https://chromium-review.googlesource.com/1250031 Commit-Ready: Scott Collyer <scollyer@chromium.org> Tested-by: Scott Collyer <scollyer@chromium.org> Reviewed-by: Edward Hill <ecgh@chromium.org> Reviewed-by: Jett Rink <jettrink@chromium.org>
* Ampton: create initial EC imageDiana Z2018-09-141-0/+122
This image is based on bip from current ToT and the most recent ampton schematics. Bugs have been created and put into TODO statements for the future work needed on this EC image. BRANCH=None BUG=b:111498206 TEST=builds Change-Id: Idff972b9ce5231524dd4865a87953ebcd5310c62 Signed-off-by: Diana Z <dzigterman@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/1225350 Reviewed-by: Justin TerAvest <teravest@chromium.org>
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