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* adc: Remove adc_chip.h where adc.h is usedCaveh Jalali2021-08-271-1/+0
| | | | | | | | | | | | | | This removes the use of adc_chip.h where adc.h is also used. In this case, adc_chip.h is redundant. BRANCH=none BUG=b:181271666 TEST=buildall passes Change-Id: Id7baf9aef949447a4d47934242f9bae97c971262 Signed-off-by: Caveh Jalali <caveh@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3120317 Reviewed-by: Keith Short <keithshort@chromium.org>
* lid_angle: Create a common callback for lid angle changesWai-Hong Tam2021-08-051-3/+1
| | | | | | | | | | | | | | | | | | | | | | Each board defines its own callback lid_angle_peripheral_enable(). The implementation is very similar. Create a common implementation and reduce the duplicated code. This CL removes the board callbacks which are identifical to the common callback. If it is slightly different, keep it and add the __override tag. The check of TEST_BUILD is unnecessary as the board callback is not linked in the test build. BRANCH=None BUG=b:194922043 TEST=Build all the images. Change-Id: I73d381730f35b80eff69399cdfc5fb54f839aee0 Signed-off-by: Wai-Hong Tam <waihong@google.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3069175 Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
* LED On/Off: Make battery LED optionalDiana Z2021-04-221-4/+5
| | | | | | | | | | | | | | | Currently, all boards using the LED On/Off module have battery LEDs. However, if we'd like to expand support to Chromeboxes then the battery LED must become optional. BRANCH=None BUG=b:185508707 TEST=make -j buildall Signed-off-by: Diana Z <dzigterman@chromium.org> Change-Id: Ieae098829ebe6c8b103f23d5abdbf70e7bcbdf2d Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2832692 Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
* thermisor: move header to include dirDawid Niedzwiecki2021-04-221-1/+1
| | | | | | | | | | | | | | | | Move the "thermistor.h" header to the include/driver/temp_sensor directory. It is used by the Zephyr shim, so the change is useful to include the header. BUG=b:180403276 BRANCH=none TEST=make buildall Signed-off-by: Dawid Niedzwiecki <dn@semihalf.com> Change-Id: I0e83df97e50a3b324440b65ddb900ddf135f2439 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2843323 Reviewed-by: Keith Short <keithshort@chromium.org> Commit-Queue: Keith Short <keithshort@chromium.org>
* genvif: Use VIF overrides by defaultAbe Levkoy2021-03-301-0/+3
| | | | | | | | | | | | | | Use board-specific override files when generating VIFs for boards. BUG=b:172276715 TEST=make buildall BRANCH=none Signed-off-by: Abe Levkoy <alevkoy@chromium.org> Change-Id: I197365018ceb8197c22d631cebf4cbce1c0119f7 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2785506 Reviewed-by: Denis Brockus <dbrockus@chromium.org> Commit-Queue: Denis Brockus <dbrockus@chromium.org>
* Use generic voltage reduce function instead of provided by boardPatryk Duda2021-03-292-34/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch switches implementation of input voltage reduction to generic one. It removes reduce_input_voltage_when_full() function from board code and defines CONFIG_BATT_FULL_CHIPSET_OFF_INPUT_LIMIT_MV with appropriate voltage. Affected boards: - Ampton - Asurada - Cherry - Dratini - Jinlon - Liara - Nocturne BUG=b:182546058 BRANCH=none TEST=Compile firmware for affected boards. TEST=Flash EC ToT on one of affected boards. Charge battery to full. Shutdown board and check if voltage is reduced. Power on board, check if previous voltage is restored. Signed-off-by: Patryk Duda <pdk@semihalf.com> Change-Id: I8f285e75c11f84f4711d5e6a4008174b6fb639cf Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2773219 Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org>
* ampton: Change input voltage only when conditions changedPatryk Duda2021-03-091-4/+15
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Ampton reduces input voltage to 5 volts when battery is full and chipset is in one of suspend states. When this condition is not true, calling 'reduce_input_voltage_when_full()' always removes the limit by setting maximum voltage to PD_MAX_VOLTAGE_MV. When battery is charging, this function is called every SOC change. As a result any voltage limit is removed on SOC change which effectively breaks firmware_PDVbusRequest test. This patch changes behaviour of this function to restore previous voltage limit when 5 volts limit is no longer needed (chipset is running or battery is charging) BUG=b:161775827 BRANCH=none TEST=Run firmware_PDVbusRequest test on Ampton when battery is not full, test should pass. TEST=Charge battery to 100%. Set 9 volts limit using 'pd 0 dev 9' when chipset is running. Shutdown AP and check if VBUS drops to 5 volts. Wake up board, check if 9 volts limit is restored. Signed-off-by: Patryk Duda <pdk@semihalf.com> Change-Id: I4a7b1db53b89845e63cbb6a1a4927a2d8e4f0a26 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2739680 Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
* ps8xxx: Set RP during LPM enter if TCPC acts as mux onlyPatryk Duda2021-01-281-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Some boards (eg. ampton) uses TCPC/MUX chips (eg. PS8751) as muxers only. In this case CC lines are simply not connected. Nevertheless setting CC lines to approptiate value can decrease power consumption. This patch implements custom PS8xxx MUX driver which is responsible for setting RP on both CC lines on Low Power Mode enter when this TCPC is used as muxer only (USB_MUX_FLAG_NOT_TCPC flag is set). Due to flash size constraints, this driver is only available when appropriate config is defined. Unfortunately, RP can't be set once during initialization because after switching mux appropriately there is no connection. To work properly RD should be set on both CC lines. Changing RD -> RP after switching mux doesn't work (breaks connection), even with some delay before switching to RP again. Moreover, when PS8751 is in standby mode, first I2C transaction always fails. Documentation suggests that device could be woken up by performing I2C read from PS8XXX_REG_I2C_DEBUGGING_ENABLE register. For more information about purpose of this change please refer to b:113830171#comment18 and further. BUG=b:151155658 BRANCH=none TEST=Flash EC ToT on Ampton. Check if power consumption is lower. Don't connect devices to tested USB-C port. Issue 'i2cxfer r 2 0xB 0x1A' 2 times within 2 seconds and check if it returns 0x05 (DRP disabled, RP default, CC1, CC2 set to RP). Repeat above with command 'i2cxfer r 4 0xB 0x1A'. NOTE: PS8751 goes to Low Power Mode automatically after 2 seconds when RP is set that is why we need to read register 2 times, first to wake up device, second to read value. TEST=Connect device to USB-C port, check in dmesg that device is recognised as SuperSpeed device. Repeat this test 10 times. Check also different rotation. Change-Id: Ie1bac6caa9912c024c87792536d7a35863fa96a0 Signed-off-by: Patryk Duda <pdk@semihalf.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2614618 Reviewed-by: Wai-Hong Tam <waihong@google.com> Commit-Queue: Wai-Hong Tam <waihong@google.com>
* ampton: Check return value in board specific mux initPatryk Duda2021-01-271-2/+3
| | | | | | | | | | | | | | | | | This patch adds checking if I2C writes to PS8751 muxer succeded. There are many reasons causing fail during mux_write(), one of them is that device is in standby mode. With this CL, problems will be reported to developer. BUG=b:151155658 BRANCH=none TEST=make -j buildall Signed-off-by: Patryk Duda <pdk@semihalf.com> Change-Id: Ide342ed8c713e58d91880d41a584c56866f95fec Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2633982 Reviewed-by: Aseda Aboagye <aaboagye@chromium.org> Reviewed-by: Diana Z <dzigterman@chromium.org>
* Move tcpic.h header into include/driverSimon Glass2021-01-071-1/+1
| | | | | | | | | | | | | | | | | | This header cannot currently be accessed by Zephyr since it is in a driver directory, not an include directory. This header has quite a bit of public stuff in it, so it seems reasonable to consider everything public. Move the header file and update all users. BUG=b:175434113 BRANCH=none TEST=make buildall -j30 build volteer on zephyr Signed-off-by: Simon Glass <sjg@chromium.org> Change-Id: Ibba37f47a06783fafb5095f853f2a68d92b6df87 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2607745
* ampton: increase tasks stackDino Li2020-08-201-3/+3
| | | | | | | | | | | | | | Increased stack size for these tasks: CHIPSET, PD_C0, and PD_C1 BUG=none BRANCH=none TEST=No panic of stack overflow on ampton. Signed-off-by: Dino Li <Dino.Li@ite.com.tw> Change-Id: Ibb40661f2e4abbd1dd0ac9a99ace271ea87c4b6e Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2362380 Reviewed-by: Diana Z <dzigterman@chromium.org>
* PD: Remove unnecessary PDCMD taskDiana Z2020-05-201-1/+0
| | | | | | | | | | | | | | | | | | | The PDCMD task is only pulling interrupts from the TCPCs on most boards, which is unnecessary since the PD_INT tasks handle this job now. Remove it from any boards using the PD_INT command which are not using the older CONFIG_HOSTCMD_PD functionality (ex. samus, oak). Located boards using: find -name "ec.tasklist" | xargs grep -l PD_INT | xargs grep PDCMD BRANCH=None BUG=b:154959596 TEST=make -j buildall Signed-off-by: Diana Z <dzigterman@chromium.org> Change-Id: I29be8ab1d7a2616603fb55236aed4329ed8654f5 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2208221 Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
* ampton: change sku id 3,4 for g-sensor BMA253 in the lidJames_Chao2020-04-303-12/+43
| | | | | | | | | | | | | | | | | The sku id 3,4 have never been manufactured. We use those id to identify the sensor type in the lid. BUG=b:153934973,b:154297511 BRANCH=octopus TEST=Check the sensor work correctly. Change-Id: Idf0b37fb0113e97a4927810cfaf9fbd1eb7a13a9 Signed-off-by: James_Chao <james_chao@asus.corp-partner.google.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2172563 Reviewed-by: Marco Chen <marcochen@chromium.org> Reviewed-by: Li-jen Chen <lijen@google.com> Commit-Queue: Li-jen Chen <lijen@google.com> Commit-Queue: Henry Sun <henrysun@google.com>
* driver: Replace BMI160 to BMI in board configChing-Kang Yen2020-04-231-6/+6
| | | | | | | | | | | | | | | | | Replace some macro of BMI160 to BMI version for common function of BMI series. Make board config include the accelgyro_bmi_common.h instead of accel_gyro_bmi160.h. BRANCH=None BUG=b:146144827 TEST=make buildall -j Change-Id: I043ff8a92f15295ead3fa5c1e292319e2b4fa21a Signed-off-by: Ching-Kang Yen <chingkang@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2156525 Reviewed-by: Gwendal Grignou <gwendal@chromium.org>
* Revert "Ampton: Set the PS8751 to source mode before enter low power mode"Matthew Blecker2020-03-071-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This reverts commit 4ca73139635261ee1273fbe1767dcf06886d2208. Reason for revert: Breaks CCD with AP off https://issuetracker.google.com/150822168 Will work on a solution to address the original CL need, i.e. applying Rp in LPM. Follow the above bug. Some merge conflict happens. Resolved. Also change the usb_mux driver of Trogdor, as ps8xxx_usb_mux_driver is removed. Original change's description: > Ampton: Set the PS8751 to source mode before enter low power mode > > BUG=b:113830171 > BRANCH=octopus > TEST=check the power consumption is lower > > Change-Id: I527cdc5d1e4dd5de137ab0927e66c171696758ce > Signed-off-by: James_Chao <james_chao@asus.corp-partner.google.com> > Reviewed-on: https://chromium-review.googlesource.com/1426306 > Commit-Ready: James Chao <james_chao@asus.corp-partner.google.com> > Tested-by: James Chao <james_chao@asus.corp-partner.google.com> > Reviewed-by: Jett Rink <jettrink@chromium.org> BRANCH=None BUG=b:113830171,150822168 TEST=Build Trogdor, verified CCD with AP off working. Change-Id: I58c26e8466b70e035a1c396cfcba6a46da4bccc9 Signed-off-by: Wai-Hong Tam <waihong@google.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2091519 Reviewed-by: Aseda Aboagye <aaboagye@chromium.org> Reviewed-by: Jett Rink <jettrink@chromium.org> Reviewed-by: Matthew Blecker <matthewb@chromium.org>
* usb_mux: retimer: mux as chained mux and retimerDenis Brockus2020-02-282-9/+13
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This makes retimers appear as generic muxes. By allowing a chain of muxes they can be stacked up to the new configurations that zork requires and will continue to work as they did before on configurations that only have a single mux. The code used to have two different arrays, 1) muxes and 2) retimers. On one of the zork configurations the processor MUX stopped being the primary mux and the retimer took its place. In a different configuration of that same platform it left the primary and secondary alone but the mux_set FLIP operation had to be ignored. Since the same interfaces needed to be available for both it stopped making sense to have two different structures and two different methods of handling them. This consolodates the two into one. The platforms that do not have retimers, this change will not make any difference. For platforms like zork, it will remove the retimers and make them chained muxes. So testing on trembyle makes sense to verify, BUG=b:147593660 BRANCH=none TEST=verify USB still works on trembyle Change-Id: I286cf1e302f9bd3dd7e81098ec08514a2a009fe3 Signed-off-by: Denis Brockus <dbrockus@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2066794 Commit-Queue: Jett Rink <jettrink@chromium.org> Reviewed-by: Edward Hill <ecgh@chromium.org> Reviewed-by: Jett Rink <jettrink@chromium.org>
* Temp sensor: Remove action_delay_sec fieldDiana Z2020-02-141-6/+3
| | | | | | | | | | | | | | The action_delay_sec field hasn't actually been referenced by any code since 2013. Removing the corresponding struct field. BUG=None BRANCH=None TEST=builds Change-Id: Ia7334c26b85d0161ff61bb51fbdda61bb921595a Signed-off-by: Diana Z <dzigterman@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2054945 Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
* board: Set Accelerometer range to 4gGwendal Grignou2019-12-171-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Required by Android CDD - Section 7.3.1 - Paragraph C.1.4 Modified mechanically with: for i in $(grep -lr "\.default_range" board); do sed -i '/.default_range =/s#\(.*\.default_range = \).* /\ \* g.*#\14, /* g, to meet CDD 7.3.1/C-1-4 reqs */#' $i done Manually reworked to only change the accelerometer that matters to android: The lid accelerometer or the base accelerometer if the base also hosts the gyroscope. This is only for future EC, no need to land the change on branches: mems_setup will take care to set accelerometer ranges at 4g on startup. BUG=b:144004449 BRANCH=none TEST=compile Change-Id: If8c14b2e928c9c70c0ce51451adcfcd674a9e73b Signed-off-by: Gwendal Grignou <gwendal@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1957375 Reviewed-by: Justin TerAvest <teravest@chromium.org> Reviewed-by: Alexandru M Stan <amstan@chromium.org>
* board: Set min/max frequency attributesGwendal Grignou2019-12-091-0/+2
| | | | | | | | | | | | | | | On some boards, min_/max_frequency attributes were not set, esp. for kx022 acceleometers. BUG=b:145799480 BRANCH=octopus,coral TEST=compile Change-Id: I6d32926541505f02f183539ca3ad9f70c1ae7a6b Signed-off-by: Gwendal Grignou <gwendal@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1957374 Reviewed-by: Justin TerAvest <teravest@chromium.org> Tested-by: Justin TerAvest <teravest@chromium.org>
* Rename CONFIG_USB_PD_PORT_COUNT as CONFIG_USB_PD_PORT_MAX_COUNTKarthikeyan Ramasubramanian2019-11-012-2/+2
| | | | | | | | | | | | | | | | | Certain SKUs of certain boards have lesser number of USB PD ports than defined by CONFIG_USB_PD_PORT_COUNT. Hence rename CONFIG_USB_PD_PORT_COUNT as CONFIG_USB_PD_PORT_MAX_COUNT. BUG=b:140816510, b:143196487 BRANCH=octopus TEST=make -j buildall; Boot to ChromeOS Change-Id: I7c33b27150730a1a3b5813b7b4a72fd24ab73c6a Signed-off-by: Karthikeyan Ramasubramanian <kramasub@google.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1879337 Tested-by: Karthikeyan Ramasubramanian <kramasub@chromium.org> Reviewed-by: Jett Rink <jettrink@chromium.org> Commit-Queue: Jett Rink <jettrink@chromium.org>
* tablet_mode: Renaming for GMR sensorPhilip Chen2019-09-192-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | GMR sensors can be used to (1) detect clamshell/tablet mode (2) detect lid open/closed But hall sensors can only do (2). Therefore the naming related to "hall sensor" for tablet mode application is incorrect. This patch performs the following renaming to better reflect the reality: config: CONFIG_HALL_SENSOR -> CONFIG_GMR_TABLET_MODE CONFIG_HALL_SENSOR_CUSTOM -> CONFIG_GMR_TABLET_MODE_CUSTOM CONFIG_DPTF_MOTION_LID_NO_HALL_SENSOR -> CONFIG_DPTF_MOTION_LID_NO_GMR_SENSOR GPIO: HALL_SENSOR_GPIO_L -> GMR_TABLET_MODE_GPIO_L functions: hall_sensor_disable() -> gmr_tablet_switch_disable() hall_sensor_isr() -> gmr_tablet_switch_isr() hall_sensor_int() -> gmr_tablet_switch_init() variable: hall_sensor_at_360 -> gmr_sensor_at_360 BUG=b:139378190 BRANCH=none TEST=make buildall Change-Id: I28393d056ddd128d8ffafc16a1f9fefee5455ccc Signed-off-by: Philip Chen <philipchen@google.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1757275 Reviewed-by: Furquan Shaikh <furquan@chromium.org> Reviewed-by: Aseda Aboagye <aaboagye@chromium.org> Commit-Queue: Philip Chen <philipchen@chromium.org> Tested-by: Philip Chen <philipchen@chromium.org>
* Remove __7b, __8b and __7bfDenis Brockus2019-07-201-5/+5
| | | | | | | | | | | | | | | | | | | The extentions were added to make the compiler perform most of the verification that the conversion was being done correctly to remove 8bit addressing as the standard I2C/SPI address type. Now that the compiler has verified the code, the extra extentions are being removed BUG=chromium:971296 BRANCH=none TEST=make buildall -j TEST=verify sensor functionality on arcada_ish Change-Id: I36894f8bb9daefb5b31b5e91577708f6f9af2a4f Signed-off-by: Denis Brockus <dbrockus@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1704792 Reviewed-by: Jack Rosenthal <jrosenth@chromium.org>
* Use 7bit I2C/SPI slave addresses in ECDenis Brockus2019-07-191-5/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Opt for 7bit slave addresses in EC code. If 8bit is expected by a driver, make it local and show this in the naming. Use __7b, __7bf and __8b as name extensions for i2c/spi addresses used in the EC codebase. __7b indicates a 7bit address by itself. __7bf indicates a 7bit address with optional flags attached. __8b indicates a 8bit address by itself. Allow space for 10bit addresses, even though this is not currently being used by any of our attached devices. These extensions are for verification purposes only and will be removed in the last pass of this ticket. I want to make sure the variable names reflect the type to help eliminate future 7/8/7-flags confusion. BUG=chromium:971296 BRANCH=none TEST=make buildall -j Change-Id: I2fc3d1b52ce76184492b2aaff3060f486ca45f45 Signed-off-by: Denis Brockus <dbrockus@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1699893 Reviewed-by: Jack Rosenthal <jrosenth@chromium.org>
* cleanup: Segregate USB MUX related drivers in usb_mux folderVijay Hiremath2019-07-171-1/+1
| | | | | | | | | | | BUG=none BRANCH=none TEST=make buildall -j Change-Id: If44a363d1288cbfabe5c6545e550f2b8fc623227 Signed-off-by: Vijay Hiremath <vijay.p.hiremath@intel.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1700793 Reviewed-by: Jett Rink <jettrink@chromium.org>
* ampton: tune the dp mux to improve external monitor compatibilityJames_Chao2019-05-071-0/+16
| | | | | | | | | | | | | | | | | | When the ampton connected to external monitor Viewsonic VX2880, it can't display normally. We need to tune the mux: 1. modulate DP equalization setting : 12.8dB > 3.6dB 2. modulate Vswing: 15% BUG=b:131113883 BRANCH=octopus TEST=Check the monitor VX2880 can display normally. Change-Id: Id8d32b41b4fdde4799a54e0081b5ddadf3534fba Reviewed-on: https://chromium-review.googlesource.com/1575886 Commit-Ready: Diana Z <dzigterman@chromium.org> Tested-by: Justin TerAvest <teravest@chromium.org> Reviewed-by: Justin TerAvest <teravest@chromium.org> Reviewed-by: Jett Rink <jettrink@chromium.org>
* common: led_onoff_states: move forward baseboard led_state to common codeDevin Lu2019-04-201-1/+1
| | | | | | | | | | | | | | | | | Now we have led_onoff_states instead of led_state of baseboard, to avoid duplicate file so move forward to common code. BUG=b:126460269 BRANCH=none TEST=make buildall -j, make sure led behavior on meep intended as well. Change-Id: I3adf20ebf2efd2f02b1ae101faf1c36f2f5ed454 Signed-off-by: Devin Lu <Devin.Lu@quantatw.com> Reviewed-on: https://chromium-review.googlesource.com/1556869 Commit-Ready: ChromeOS CL Exonerator Bot <chromiumos-cl-exonerator@appspot.gserviceaccount.com> Reviewed-by: Marco Chen <marcochen@chromium.org> Reviewed-by: Paul Fagerburg <pfagerburg@chromium.org> Reviewed-by: Diana Z <dzigterman@chromium.org>
* ec.tasklist: Consolidate duplicate commentsDaisuke Nojiri2019-04-081-14/+1
| | | | | | | | | | | | | | | | | | | | | | | It's simply a bad idea to describe a macro in multiple locations. It'll make it hard to change. It'll be difficult to keep all locations in sync. This patch replaces the comment duplicated in all ec.tasklist with a pointer to the CONFIG_TASK_LIST definition. The macro will be described in a single place (just like all/most other macros). Signed-off-by: Daisuke Nojiri <dnojiri@chromium.org> BUG=none BRANCH=none TEST=buildall Change-Id: Id658b9d68e742e4334c692b804d9c98c8de21313 Reviewed-on: https://chromium-review.googlesource.com/1551579 Commit-Ready: ChromeOS CL Exonerator Bot <chromiumos-cl-exonerator@appspot.gserviceaccount.com> Tested-by: Daisuke Nojiri <dnojiri@chromium.org> Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org> Reviewed-by: Jett Rink <jettrink@chromium.org>
* common: bit change 1 << constants with BIT(constants)Gwendal Grignou2019-03-261-1/+1
| | | | | | | | | | | | | | | | | Mechanical replacement of bit operation where operand is a constant. More bit operation exist, but prone to errors. Reveal a bug in npcx: chip/npcx/system-npcx7.c:114:54: error: conversion from 'long unsigned int' to 'uint8_t' {aka 'volatile unsigned char'} changes value from '16777215' to '255' [-Werror=overflow] BUG=None BRANCH=None TEST=None Change-Id: I006614026143fa180702ac0d1cc2ceb1b3c6eeb0 Signed-off-by: Gwendal Grignou <gwendal@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/1518660 Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org>
* motion: Define macros for custom eventsGwendal Grignou2019-03-201-2/+4
| | | | | | | | | | | | | | Define macros to define custom events used by sensor interrupt handlers. Remove CONFIG_ for activity events. BUG=none BRANCH=none TEST=compile, sensors work on eve. Change-Id: I08ef6ed2a004466ebc5f7650d6952a150b9de713 Signed-off-by: Gwendal Grignou <gwendal@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/1272189 Reviewed-by: Jett Rink <jettrink@chromium.org>
* Ampton: Correct HPD GPIOsDiana Z2019-03-011-2/+2
| | | | | | | | | | | | | | | | | | Since ampton is using parade as its USB mux on both ports, both HPD lines are inputs. This misconfiguration didn't cause any issues with the EC driving the GPIOs high because they were set as open drain, but does make it impossible to read the HPD level with "gpioget". BRANCH=octopus BUG=None TEST=on apel, verified that gpioget now returns correct level for HPD pins when displays are plugged and unplugged Change-Id: I0ef628cf7ea68884f97a080ba825d780f7feee41 Signed-off-by: Diana Z <dzigterman@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/1492853 Commit-Ready: ChromeOS CL Exonerator Bot <chromiumos-cl-exonerator@appspot.gserviceaccount.com> Reviewed-by: Jett Rink <jettrink@chromium.org>
* ampton: cleanup: Put all sensor defines togetherGwendal Grignou2019-02-281-9/+9
| | | | | | | | | | | | | | BUG=none BRANCH=octopus TEST=compile, verify that .config is the same before and after the patch. Change-Id: I414e6835927f0062bc2785c645458aa5a485c9e5 Signed-off-by: Gwendal Grignou <gwendal@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/1387922 Commit-Ready: ChromeOS CL Exonerator Bot <chromiumos-cl-exonerator@appspot.gserviceaccount.com> Reviewed-by: Furquan Shaikh <furquan@chromium.org> Reviewed-by: Jett Rink <jettrink@chromium.org>
* Ampton: tune the gyro axis and directionJames_Chao2019-02-271-1/+7
| | | | | | | | | | | | BUG=b:126135808 BRANCH=octopus TEST=run the CTS verifier, check the axis and direction is correct Change-Id: I2b6e598e07a5245b452aff8f46c425b72f30b841 Signed-off-by: James_Chao <james_chao@asus.corp-partner.google.com> Reviewed-on: https://chromium-review.googlesource.com/c/1490833 Reviewed-by: Justin TerAvest <teravest@chromium.org> Commit-Queue: ChromeOS CL Exonerator Bot <chromiumos-cl-exonerator@appspot.gserviceaccount.com>
* Ampton: correct thermistor reading functionDiana Z2019-02-132-8/+2
| | | | | | | | | | | | | | | | | | | The charger thermistor on ampton is tied to the PP3300_A rail, rather than the PP6000_LDO_OUT rail which bip used. As such, the charger reading does not depend on AC being present, but does depend on the A rail being enabled. BUG=None BRANCH=octopus TEST=loaded onto apel and confirmed "ectool temps all" now returns charger temperature with AC unplugged, in G3 "temps" will show the ambient and charger sensors as not powered Change-Id: I2ae03899fba8a436e34452bbc644f5e872afd408 Signed-off-by: Diana Z <dzigterman@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/1457076 Reviewed-by: Furquan Shaikh <furquan@chromium.org> Reviewed-by: Jett Rink <jettrink@chromium.org>
* Ampton: Set the PS8751 to source mode before enter low power modeJames_Chao2019-01-251-2/+2
| | | | | | | | | | | | | BUG=b:113830171 BRANCH=octopus TEST=check the power consumption is lower Change-Id: I527cdc5d1e4dd5de137ab0927e66c171696758ce Signed-off-by: James_Chao <james_chao@asus.corp-partner.google.com> Reviewed-on: https://chromium-review.googlesource.com/1426306 Commit-Ready: James Chao <james_chao@asus.corp-partner.google.com> Tested-by: James Chao <james_chao@asus.corp-partner.google.com> Reviewed-by: Jett Rink <jettrink@chromium.org>
* Ampton: tune motion sensorsJames_Chao2019-01-231-1/+7
| | | | | | | | | | | | | | BUG=b:118756407 BRANCH=octopus TEST=On Ampton EVT, Check the x,y,z direction is correct. Change-Id: Ia84d5db0723d8b24e7725333f35d466b7438598b Signed-off-by: James_Chao <james_chao@asus.corp-partner.google.com> Reviewed-on: https://chromium-review.googlesource.com/1425138 Commit-Ready: James Chao <james_chao@asus.corp-partner.google.com> Tested-by: James Chao <james_chao@asus.corp-partner.google.com> Reviewed-by: Jett Rink <jettrink@chromium.org> Reviewed-by: Justin TerAvest <teravest@chromium.org>
* Ampton: add battery configuration for C424James_Chao2019-01-182-0/+28
| | | | | | | | | | | | | | BUG=none BRANCH=octopus TEST=build Change-Id: Ib97e5a0184c9d8f636655713f0ee3bac4d973ebc Signed-off-by: James_Chao <james_chao@asus.corp-partner.google.com> Reviewed-on: https://chromium-review.googlesource.com/1401886 Commit-Ready: James Chao <james_chao@asus.corp-partner.google.com> Tested-by: James Chao <james_chao@asus.corp-partner.google.com> Reviewed-by: James Chao <james_chao@asus.corp-partner.google.com> Reviewed-by: Jett Rink <jettrink@chromium.org>
* apel: lower input voltage to 5V when battery fullJett Rink2019-01-171-1/+27
| | | | | | | | | | | | | | | For ERP compliance, we want to ensure that we are using the least amount of power when the device is in S5 and plugged into AC power. BRANCH=octopus BUG=b:113830171 TEST=passes ERP Change-Id: I91f44de96bdab86edabc5031cb92eaa70b9a39b3 Signed-off-by: Jett Rink <jettrink@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/1406852 Commit-Ready: ChromeOS CL Exonerator Bot <chromiumos-cl-exonerator@appspot.gserviceaccount.com> Reviewed-by: Karthikeyan Ramasubramanian <kramasub@chromium.org>
* USB PD: PPC: Add overcurrent handling.Aseda Aboagye2019-01-171-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The Type-C Power Path Controllers provide overcurrent protection. This commit adds support into the USB PD task for overcurrent events while we are in source role. The USB PD 3.0 spec recommends that ports issue a hard reset when an overcurrent condition occurs on a port. Additionally, we'll allow a source port to overcurrent 3 times before latching off VBUS from the port entirely. The source path will be re-enabled after ~1s after each overcurrent event. BUG=b:69935262,b:114680657 BRANCH=None TEST=Boot to ChromeOS in grabbiter. No overcurrent events reported when the sink is drawing <= 3.20 A. Overcurrent events are reported when the sink is drawing > 3.25 A. After 3 reports, the port is latched off and power delivery is stopped. The port is re-enabled only after the sink is disconnected. Also when the sink is drawing current at 3.24 A, there is one report of overcurrent. The port gets disabled in response to that event. But the port is re-enabled after 1 second since overcurrent event is reported only once. After the port is re-enabled, the sink is able to draw the set current. When the overcurrent event is reported, I can see in the kernel logs that the overcurrent condition is detected by the kernel. EC Logs: [3391.984462 C1: PPC detected Vbus overcurrent!] [3391.984953 C1: overcurrent!] [3392.044935 C1: PPC detected Vbus overcurrent!] [3392.045425 C1: overcurrent!] [3392.061404 C1: PPC detected Vbus overcurrent!] [3392.061894 C1: overcurrent!] [3392.062142 C1: OC event limit reached! Source path disabled until physical disconnect.] [3392.077226 C1: PPC detected Vbus overcurrent!] [3392.077532 C1: overcurrent!] [3392.077891 C1: OC event limit reached! Source path disabled until physical disconnect.] [3392.092660 C1: PPC detected Vbus overcurrent!] [3392.092966 C1: overcurrent!] [3392.093213 C1: OC event limit reached! Source path disabled until physical disconnect.] Kernel Logs: [ 3356.560456] usb usb2-port1: over-current condition [ 3356.768434] usb usb2-port2: over-current condition [ 3356.976446] usb usb2-port4: over-current condition [ 3357.184441] usb usb2-port5: over-current condition [ 3357.392445] usb usb2-port6: over-current condition Change-Id: Ib070f261e98264cd88725ebce7d10e0798267e3b Signed-off-by: Aseda Aboagye <aaboagye@google.com> Signed-off-by: Karthikeyan Ramasubramanian <kramasub@google.com> Reviewed-on: https://chromium-review.googlesource.com/c/1286300 Tested-by: Aseda Aboagye <aaboagye@chromium.org> Reviewed-by: Jett Rink <jettrink@chromium.org> Commit-Queue: Jett Rink <jettrink@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/807633 Commit-Ready: Karthikeyan Ramasubramanian <kramasub@chromium.org> Tested-by: Karthikeyan Ramasubramanian <kramasub@chromium.org> Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
* octopus: convert boards to use hardware intJett Rink2019-01-102-3/+1
| | | | | | | | | | | | | | | | | | Recent kernel changes expect the EC to use a dedicated interrupt pin from the EC to the AP to notify the AP of pending sensor data (instead of using an eSPI "interrupt"). The octopus boards have this hardware support, we just need to enable the EC use it. BRANCH=octopus BUG=b:122552125,b:120679547 TEST=perform sensor tests on various octopus boards Change-Id: I2bd3ffe14947d5f1ec71acbb53fcac962b007cf9 Signed-off-by: Jett Rink <jettrink@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/1403103 Reviewed-by: Enrico Granata <egranata@chromium.org>
* octopus: reduce all octopus sensor fifo sizesJett Rink2019-01-051-6/+0
| | | | | | | | | | | | | | | | Too large of a FIFO causes jitter in the sensor timestamp which can cause issues during batch CTS tests. BRANCH=octopus BUG=b:120508077 TEST=everything builds. Test with smaller fifo were done on bobba. See CL:1387348 Change-Id: If67a46faa6e136006a20ac243b826b7ce06d9868 Signed-off-by: Jett Rink <jettrink@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/1392425 Commit-Ready: ChromeOS CL Exonerator Bot <chromiumos-cl-exonerator@appspot.gserviceaccount.com> Reviewed-by: Karthikeyan Ramasubramanian <kramasub@chromium.org>
* Ampton: Remove CONFIG_SYSTEM_UNLOCKEDDiana Z2019-01-051-3/+0
| | | | | | | | | | | | | | | Since ampton is moving further along in the development process, the CONFIG_SYSTEM_UNLOCKED option can be removed. BUG=b:121005179 BRANCH=octopus TEST=builds Change-Id: I71b55dff3e1316bc3450a4ad242667d594dc2a28 Signed-off-by: Diana Z <dzigterman@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/1395758 Commit-Ready: ChromeOS CL Exonerator Bot <chromiumos-cl-exonerator@appspot.gserviceaccount.com> Reviewed-by: Jett Rink <jettrink@chromium.org>
* Ampton: modify the led behavior when battery errorJames_Chao2018-12-181-2/+2
| | | | | | | | | | | | | BUG=none BRANCH=octopus TEST=check the led behavior when battery error Change-Id: I9680b7011bb88e5e064f67ae3625534945b5dff7 Signed-off-by: James_Chao <james_chao@asus.corp-partner.google.com> Reviewed-on: https://chromium-review.googlesource.com/1381597 Commit-Ready: James Chao <james_chao@asus.corp-partner.google.com> Tested-by: James Chao <james_chao@asus.corp-partner.google.com> Reviewed-by: Jett Rink <jettrink@chromium.org>
* Ampton: Implement the functions about ar cameraJames_Chao2018-12-053-4/+32
| | | | | | | | | | | | | | BUG=b:119926441 BRAHCN=octopus TEST=build success Change-Id: I7ba0632c49836ba957c40d66ed4dfc5cf905c8c6 Signed-off-by: James_Chao <james_chao@asus.corp-partner.google.com> Reviewed-on: https://chromium-review.googlesource.com/1349158 Commit-Ready: James Chao <james_chao@asus.corp-partner.google.com> Tested-by: James Chao <james_chao@asus.corp-partner.google.com> Reviewed-by: Marco Chen <marcochen@chromium.org> Reviewed-by: Jett Rink <jettrink@chromium.org>
* gpio: Add configuration for EC_PCH_RTCRST GPIO in octopus boardsKarthikeyan Ramasubramanian2018-12-051-1/+1
| | | | | | | | | | | | | | | | | | | This will help with using the hardware support to reset the RTC on the SoC. BUG=b:119678692 BRANCH=octopus TEST=make -j buildall && Boot to ChromeOS. Create a forced scenario to trigger an RTC reset and ensure that EC does not get reset while the SoC boots to ChromeOS. Execute warm reboot from AP, cold reboot from EC and wake from ec hibernate (10 iterations each) and suspend_stress_test for 50 iterations successfully. Change-Id: Ib79012b43e397d4c27ca829b135115bebf77dedb Signed-off-by: Karthikeyan Ramasubramanian <kramasub@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/1354493 Reviewed-by: Furquan Shaikh <furquan@chromium.org> Reviewed-by: Jett Rink <jettrink@chromium.org>
* Ampton: change the port0 mux to PS8751James_Chao2018-12-032-1/+39
| | | | | | | | | | | | | | | | | Due to the DP measurement eye-diagram and pre-emphasize fail, we change the mux to PS8751 on the type-c port in mainboard. BUG=b:118728290,b:119840612 BRANCH=octopus TEST=FAFT pass and check the mux function working on EVT. Change-Id: I1817686f09f6aa9a557907b279ab61c889335d9e Signed-off-by: James_Chao <james_chao@asus.corp-partner.google.com> Reviewed-on: https://chromium-review.googlesource.com/1343642 Commit-Ready: James Chao <james_chao@asus.corp-partner.google.com> Tested-by: James Chao <james_chao@asus.corp-partner.google.com> Reviewed-by: Jett Rink <jettrink@chromium.org> Reviewed-by: Diana Z <dzigterman@chromium.org>
* tablet_mode: Introduce hall sensor specific handlingFurquan Shaikh2018-11-292-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This change performs the following renaming: 1. CONFIG_TABLET_SWITCH -> CONFIG_HALL_SENSOR Indicates if a device has hall sensor 2. TABLET_MODE_GPIO_L -> HALL_SENSOR_GPIO_L Provides the interrupt line from hall sensor to EC. 3. tablet_mode_isr -> hall_sensor_isr Interrupt routine that gets control on hall sensor interrupt. 4. tablet_mode_init -> hall_sensor_init Init routine for initializing hall sensor interrupt. 5. tablet_switch_disable -> hall_sensor_disable Disable hall sensor interrupt and tablet mode sub-system. This is done to separate hall sensor interrupt from tablet mode handling. It is another step towards aligning tablet mode detection on EC with Chrome. Hall sensor interrupt occurs when the lid is in 360-degree flipped mode. If tablet mode is not already triggered by lid motion driver, then hall_sensor_isr will set tablet mode and take necessary actions to disable input peripherals. CQ-DEPEND=CL:1351518 BUG=b:120050761 BRANCH=octopus TEST=make -j buildall Change-Id: I5841f6875d538a624cb888bc048f252397ab457c Signed-off-by: Furquan Shaikh <furquan@google.com> Reviewed-on: https://chromium-review.googlesource.com/1350469 Commit-Ready: Furquan Shaikh <furquan@chromium.org> Tested-by: Furquan Shaikh <furquan@chromium.org> Reviewed-by: Aaron Durbin <adurbin@chromium.org> Reviewed-by: Jett Rink <jettrink@chromium.org>
* Ampton: Modify LED behavior to follow CoralJames_Chao2018-11-221-9/+9
| | | | | | | | | | | | | | BUG=b:119842039 BRANCH=none TEST=check the led behavior Change-Id: Ieb684f7a3d38e3b36aab9bcf27cbc823b5a7df82 Signed-off-by: James_Chao <james_chao@asus.corp-partner.google.com> Reviewed-on: https://chromium-review.googlesource.com/1345791 Commit-Ready: James Chao <james_chao@asus.corp-partner.google.com> Tested-by: James Chao <james_chao@asus.corp-partner.google.com> Reviewed-by: James Chao <james_chao@asus.corp-partner.google.com> Reviewed-by: Diana Z <dzigterman@chromium.org>
* Ampton: Correct accel sensor base reference dependent on sensor locationJames_Chao2018-11-211-8/+6
| | | | | | | | | | | | | | BUG=b:118756407 BRANCH=none TEST=accelinfo on Change-Id: I3e9f1791a12e5cb63572b1d50435b4e7a42b7ccd Signed-off-by: James_Chao <james_chao@asus.corp-partner.google.com> Reviewed-on: https://chromium-review.googlesource.com/1343641 Commit-Ready: James Chao <james_chao@asus.corp-partner.google.com> Tested-by: James Chao <james_chao@asus.corp-partner.google.com> Reviewed-by: James Chao <james_chao@asus.corp-partner.google.com> Reviewed-by: Diana Z <dzigterman@chromium.org>
* Ampton: enable the interrupt for GPIO_BASE_SIXAXIS_INT_LJames_Chao2018-11-192-1/+7
| | | | | | | | | | | | | | | BUG=none BRANCH=none TEST=accelinfo on Change-Id: I04764b0ce3f963f12f7977b08c89a375c2319d00 Signed-off-by: James_Chao <james_chao@asus.corp-partner.google.com> Reviewed-on: https://chromium-review.googlesource.com/1335292 Commit-Ready: James Chao <james_chao@asus.corp-partner.google.com> Tested-by: James Chao <james_chao@asus.corp-partner.google.com> Reviewed-by: James Chao <james_chao@asus.corp-partner.google.com> Reviewed-by: Marco Chen <marcochen@chromium.org> Reviewed-by: Jett Rink <jettrink@chromium.org>
* Ampton: add sku id for convertible skuJames_Chao2018-11-151-2/+3
| | | | | | | | | | | | | | | | According to b:112290350, the convertible sku is 1,2,3,4 BUG=b:112290350 BRANCH=none TEST=build Change-Id: I2de55eb070741f3a0058fd390f897a863562f762 Signed-off-by: James_Chao <james_chao@asus.corp-partner.google.com> Reviewed-on: https://chromium-review.googlesource.com/1335290 Commit-Ready: James Chao <james_chao@asus.corp-partner.google.com> Tested-by: James Chao <james_chao@asus.corp-partner.google.com> Reviewed-by: James Chao <james_chao@asus.corp-partner.google.com> Reviewed-by: Jett Rink <jettrink@chromium.org>
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