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* board: Set Accelerometer range to 4gGwendal Grignou2019-12-171-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Required by Android CDD - Section 7.3.1 - Paragraph C.1.4 Modified mechanically with: for i in $(grep -lr "\.default_range" board); do sed -i '/.default_range =/s#\(.*\.default_range = \).* /\ \* g.*#\14, /* g, to meet CDD 7.3.1/C-1-4 reqs */#' $i done Manually reworked to only change the accelerometer that matters to android: The lid accelerometer or the base accelerometer if the base also hosts the gyroscope. This is only for future EC, no need to land the change on branches: mems_setup will take care to set accelerometer ranges at 4g on startup. BUG=b:144004449 BRANCH=none TEST=compile Change-Id: If8c14b2e928c9c70c0ce51451adcfcd674a9e73b Signed-off-by: Gwendal Grignou <gwendal@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1957375 Reviewed-by: Justin TerAvest <teravest@chromium.org> Reviewed-by: Alexandru M Stan <amstan@chromium.org>
* board: Set min/max frequency attributesGwendal Grignou2019-12-091-0/+2
| | | | | | | | | | | | | | | On some boards, min_/max_frequency attributes were not set, esp. for kx022 acceleometers. BUG=b:145799480 BRANCH=octopus,coral TEST=compile Change-Id: I6d32926541505f02f183539ca3ad9f70c1ae7a6b Signed-off-by: Gwendal Grignou <gwendal@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1957374 Reviewed-by: Justin TerAvest <teravest@chromium.org> Tested-by: Justin TerAvest <teravest@chromium.org>
* Rename CONFIG_USB_PD_PORT_COUNT as CONFIG_USB_PD_PORT_MAX_COUNTKarthikeyan Ramasubramanian2019-11-012-2/+2
| | | | | | | | | | | | | | | | | Certain SKUs of certain boards have lesser number of USB PD ports than defined by CONFIG_USB_PD_PORT_COUNT. Hence rename CONFIG_USB_PD_PORT_COUNT as CONFIG_USB_PD_PORT_MAX_COUNT. BUG=b:140816510, b:143196487 BRANCH=octopus TEST=make -j buildall; Boot to ChromeOS Change-Id: I7c33b27150730a1a3b5813b7b4a72fd24ab73c6a Signed-off-by: Karthikeyan Ramasubramanian <kramasub@google.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1879337 Tested-by: Karthikeyan Ramasubramanian <kramasub@chromium.org> Reviewed-by: Jett Rink <jettrink@chromium.org> Commit-Queue: Jett Rink <jettrink@chromium.org>
* tablet_mode: Renaming for GMR sensorPhilip Chen2019-09-192-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | GMR sensors can be used to (1) detect clamshell/tablet mode (2) detect lid open/closed But hall sensors can only do (2). Therefore the naming related to "hall sensor" for tablet mode application is incorrect. This patch performs the following renaming to better reflect the reality: config: CONFIG_HALL_SENSOR -> CONFIG_GMR_TABLET_MODE CONFIG_HALL_SENSOR_CUSTOM -> CONFIG_GMR_TABLET_MODE_CUSTOM CONFIG_DPTF_MOTION_LID_NO_HALL_SENSOR -> CONFIG_DPTF_MOTION_LID_NO_GMR_SENSOR GPIO: HALL_SENSOR_GPIO_L -> GMR_TABLET_MODE_GPIO_L functions: hall_sensor_disable() -> gmr_tablet_switch_disable() hall_sensor_isr() -> gmr_tablet_switch_isr() hall_sensor_int() -> gmr_tablet_switch_init() variable: hall_sensor_at_360 -> gmr_sensor_at_360 BUG=b:139378190 BRANCH=none TEST=make buildall Change-Id: I28393d056ddd128d8ffafc16a1f9fefee5455ccc Signed-off-by: Philip Chen <philipchen@google.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1757275 Reviewed-by: Furquan Shaikh <furquan@chromium.org> Reviewed-by: Aseda Aboagye <aaboagye@chromium.org> Commit-Queue: Philip Chen <philipchen@chromium.org> Tested-by: Philip Chen <philipchen@chromium.org>
* Remove __7b, __8b and __7bfDenis Brockus2019-07-201-5/+5
| | | | | | | | | | | | | | | | | | | The extentions were added to make the compiler perform most of the verification that the conversion was being done correctly to remove 8bit addressing as the standard I2C/SPI address type. Now that the compiler has verified the code, the extra extentions are being removed BUG=chromium:971296 BRANCH=none TEST=make buildall -j TEST=verify sensor functionality on arcada_ish Change-Id: I36894f8bb9daefb5b31b5e91577708f6f9af2a4f Signed-off-by: Denis Brockus <dbrockus@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1704792 Reviewed-by: Jack Rosenthal <jrosenth@chromium.org>
* Use 7bit I2C/SPI slave addresses in ECDenis Brockus2019-07-191-5/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Opt for 7bit slave addresses in EC code. If 8bit is expected by a driver, make it local and show this in the naming. Use __7b, __7bf and __8b as name extensions for i2c/spi addresses used in the EC codebase. __7b indicates a 7bit address by itself. __7bf indicates a 7bit address with optional flags attached. __8b indicates a 8bit address by itself. Allow space for 10bit addresses, even though this is not currently being used by any of our attached devices. These extensions are for verification purposes only and will be removed in the last pass of this ticket. I want to make sure the variable names reflect the type to help eliminate future 7/8/7-flags confusion. BUG=chromium:971296 BRANCH=none TEST=make buildall -j Change-Id: I2fc3d1b52ce76184492b2aaff3060f486ca45f45 Signed-off-by: Denis Brockus <dbrockus@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1699893 Reviewed-by: Jack Rosenthal <jrosenth@chromium.org>
* cleanup: Segregate USB MUX related drivers in usb_mux folderVijay Hiremath2019-07-171-1/+1
| | | | | | | | | | | BUG=none BRANCH=none TEST=make buildall -j Change-Id: If44a363d1288cbfabe5c6545e550f2b8fc623227 Signed-off-by: Vijay Hiremath <vijay.p.hiremath@intel.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1700793 Reviewed-by: Jett Rink <jettrink@chromium.org>
* ampton: tune the dp mux to improve external monitor compatibilityJames_Chao2019-05-071-0/+16
| | | | | | | | | | | | | | | | | | When the ampton connected to external monitor Viewsonic VX2880, it can't display normally. We need to tune the mux: 1. modulate DP equalization setting : 12.8dB > 3.6dB 2. modulate Vswing: 15% BUG=b:131113883 BRANCH=octopus TEST=Check the monitor VX2880 can display normally. Change-Id: Id8d32b41b4fdde4799a54e0081b5ddadf3534fba Reviewed-on: https://chromium-review.googlesource.com/1575886 Commit-Ready: Diana Z <dzigterman@chromium.org> Tested-by: Justin TerAvest <teravest@chromium.org> Reviewed-by: Justin TerAvest <teravest@chromium.org> Reviewed-by: Jett Rink <jettrink@chromium.org>
* common: led_onoff_states: move forward baseboard led_state to common codeDevin Lu2019-04-201-1/+1
| | | | | | | | | | | | | | | | | Now we have led_onoff_states instead of led_state of baseboard, to avoid duplicate file so move forward to common code. BUG=b:126460269 BRANCH=none TEST=make buildall -j, make sure led behavior on meep intended as well. Change-Id: I3adf20ebf2efd2f02b1ae101faf1c36f2f5ed454 Signed-off-by: Devin Lu <Devin.Lu@quantatw.com> Reviewed-on: https://chromium-review.googlesource.com/1556869 Commit-Ready: ChromeOS CL Exonerator Bot <chromiumos-cl-exonerator@appspot.gserviceaccount.com> Reviewed-by: Marco Chen <marcochen@chromium.org> Reviewed-by: Paul Fagerburg <pfagerburg@chromium.org> Reviewed-by: Diana Z <dzigterman@chromium.org>
* ec.tasklist: Consolidate duplicate commentsDaisuke Nojiri2019-04-081-14/+1
| | | | | | | | | | | | | | | | | | | | | | | It's simply a bad idea to describe a macro in multiple locations. It'll make it hard to change. It'll be difficult to keep all locations in sync. This patch replaces the comment duplicated in all ec.tasklist with a pointer to the CONFIG_TASK_LIST definition. The macro will be described in a single place (just like all/most other macros). Signed-off-by: Daisuke Nojiri <dnojiri@chromium.org> BUG=none BRANCH=none TEST=buildall Change-Id: Id658b9d68e742e4334c692b804d9c98c8de21313 Reviewed-on: https://chromium-review.googlesource.com/1551579 Commit-Ready: ChromeOS CL Exonerator Bot <chromiumos-cl-exonerator@appspot.gserviceaccount.com> Tested-by: Daisuke Nojiri <dnojiri@chromium.org> Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org> Reviewed-by: Jett Rink <jettrink@chromium.org>
* common: bit change 1 << constants with BIT(constants)Gwendal Grignou2019-03-261-1/+1
| | | | | | | | | | | | | | | | | Mechanical replacement of bit operation where operand is a constant. More bit operation exist, but prone to errors. Reveal a bug in npcx: chip/npcx/system-npcx7.c:114:54: error: conversion from 'long unsigned int' to 'uint8_t' {aka 'volatile unsigned char'} changes value from '16777215' to '255' [-Werror=overflow] BUG=None BRANCH=None TEST=None Change-Id: I006614026143fa180702ac0d1cc2ceb1b3c6eeb0 Signed-off-by: Gwendal Grignou <gwendal@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/1518660 Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org>
* motion: Define macros for custom eventsGwendal Grignou2019-03-201-2/+4
| | | | | | | | | | | | | | Define macros to define custom events used by sensor interrupt handlers. Remove CONFIG_ for activity events. BUG=none BRANCH=none TEST=compile, sensors work on eve. Change-Id: I08ef6ed2a004466ebc5f7650d6952a150b9de713 Signed-off-by: Gwendal Grignou <gwendal@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/1272189 Reviewed-by: Jett Rink <jettrink@chromium.org>
* Ampton: Correct HPD GPIOsDiana Z2019-03-011-2/+2
| | | | | | | | | | | | | | | | | | Since ampton is using parade as its USB mux on both ports, both HPD lines are inputs. This misconfiguration didn't cause any issues with the EC driving the GPIOs high because they were set as open drain, but does make it impossible to read the HPD level with "gpioget". BRANCH=octopus BUG=None TEST=on apel, verified that gpioget now returns correct level for HPD pins when displays are plugged and unplugged Change-Id: I0ef628cf7ea68884f97a080ba825d780f7feee41 Signed-off-by: Diana Z <dzigterman@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/1492853 Commit-Ready: ChromeOS CL Exonerator Bot <chromiumos-cl-exonerator@appspot.gserviceaccount.com> Reviewed-by: Jett Rink <jettrink@chromium.org>
* ampton: cleanup: Put all sensor defines togetherGwendal Grignou2019-02-281-9/+9
| | | | | | | | | | | | | | BUG=none BRANCH=octopus TEST=compile, verify that .config is the same before and after the patch. Change-Id: I414e6835927f0062bc2785c645458aa5a485c9e5 Signed-off-by: Gwendal Grignou <gwendal@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/1387922 Commit-Ready: ChromeOS CL Exonerator Bot <chromiumos-cl-exonerator@appspot.gserviceaccount.com> Reviewed-by: Furquan Shaikh <furquan@chromium.org> Reviewed-by: Jett Rink <jettrink@chromium.org>
* Ampton: tune the gyro axis and directionJames_Chao2019-02-271-1/+7
| | | | | | | | | | | | BUG=b:126135808 BRANCH=octopus TEST=run the CTS verifier, check the axis and direction is correct Change-Id: I2b6e598e07a5245b452aff8f46c425b72f30b841 Signed-off-by: James_Chao <james_chao@asus.corp-partner.google.com> Reviewed-on: https://chromium-review.googlesource.com/c/1490833 Reviewed-by: Justin TerAvest <teravest@chromium.org> Commit-Queue: ChromeOS CL Exonerator Bot <chromiumos-cl-exonerator@appspot.gserviceaccount.com>
* Ampton: correct thermistor reading functionDiana Z2019-02-132-8/+2
| | | | | | | | | | | | | | | | | | | The charger thermistor on ampton is tied to the PP3300_A rail, rather than the PP6000_LDO_OUT rail which bip used. As such, the charger reading does not depend on AC being present, but does depend on the A rail being enabled. BUG=None BRANCH=octopus TEST=loaded onto apel and confirmed "ectool temps all" now returns charger temperature with AC unplugged, in G3 "temps" will show the ambient and charger sensors as not powered Change-Id: I2ae03899fba8a436e34452bbc644f5e872afd408 Signed-off-by: Diana Z <dzigterman@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/1457076 Reviewed-by: Furquan Shaikh <furquan@chromium.org> Reviewed-by: Jett Rink <jettrink@chromium.org>
* Ampton: Set the PS8751 to source mode before enter low power modeJames_Chao2019-01-251-2/+2
| | | | | | | | | | | | | BUG=b:113830171 BRANCH=octopus TEST=check the power consumption is lower Change-Id: I527cdc5d1e4dd5de137ab0927e66c171696758ce Signed-off-by: James_Chao <james_chao@asus.corp-partner.google.com> Reviewed-on: https://chromium-review.googlesource.com/1426306 Commit-Ready: James Chao <james_chao@asus.corp-partner.google.com> Tested-by: James Chao <james_chao@asus.corp-partner.google.com> Reviewed-by: Jett Rink <jettrink@chromium.org>
* Ampton: tune motion sensorsJames_Chao2019-01-231-1/+7
| | | | | | | | | | | | | | BUG=b:118756407 BRANCH=octopus TEST=On Ampton EVT, Check the x,y,z direction is correct. Change-Id: Ia84d5db0723d8b24e7725333f35d466b7438598b Signed-off-by: James_Chao <james_chao@asus.corp-partner.google.com> Reviewed-on: https://chromium-review.googlesource.com/1425138 Commit-Ready: James Chao <james_chao@asus.corp-partner.google.com> Tested-by: James Chao <james_chao@asus.corp-partner.google.com> Reviewed-by: Jett Rink <jettrink@chromium.org> Reviewed-by: Justin TerAvest <teravest@chromium.org>
* Ampton: add battery configuration for C424James_Chao2019-01-182-0/+28
| | | | | | | | | | | | | | BUG=none BRANCH=octopus TEST=build Change-Id: Ib97e5a0184c9d8f636655713f0ee3bac4d973ebc Signed-off-by: James_Chao <james_chao@asus.corp-partner.google.com> Reviewed-on: https://chromium-review.googlesource.com/1401886 Commit-Ready: James Chao <james_chao@asus.corp-partner.google.com> Tested-by: James Chao <james_chao@asus.corp-partner.google.com> Reviewed-by: James Chao <james_chao@asus.corp-partner.google.com> Reviewed-by: Jett Rink <jettrink@chromium.org>
* apel: lower input voltage to 5V when battery fullJett Rink2019-01-171-1/+27
| | | | | | | | | | | | | | | For ERP compliance, we want to ensure that we are using the least amount of power when the device is in S5 and plugged into AC power. BRANCH=octopus BUG=b:113830171 TEST=passes ERP Change-Id: I91f44de96bdab86edabc5031cb92eaa70b9a39b3 Signed-off-by: Jett Rink <jettrink@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/1406852 Commit-Ready: ChromeOS CL Exonerator Bot <chromiumos-cl-exonerator@appspot.gserviceaccount.com> Reviewed-by: Karthikeyan Ramasubramanian <kramasub@chromium.org>
* USB PD: PPC: Add overcurrent handling.Aseda Aboagye2019-01-171-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The Type-C Power Path Controllers provide overcurrent protection. This commit adds support into the USB PD task for overcurrent events while we are in source role. The USB PD 3.0 spec recommends that ports issue a hard reset when an overcurrent condition occurs on a port. Additionally, we'll allow a source port to overcurrent 3 times before latching off VBUS from the port entirely. The source path will be re-enabled after ~1s after each overcurrent event. BUG=b:69935262,b:114680657 BRANCH=None TEST=Boot to ChromeOS in grabbiter. No overcurrent events reported when the sink is drawing <= 3.20 A. Overcurrent events are reported when the sink is drawing > 3.25 A. After 3 reports, the port is latched off and power delivery is stopped. The port is re-enabled only after the sink is disconnected. Also when the sink is drawing current at 3.24 A, there is one report of overcurrent. The port gets disabled in response to that event. But the port is re-enabled after 1 second since overcurrent event is reported only once. After the port is re-enabled, the sink is able to draw the set current. When the overcurrent event is reported, I can see in the kernel logs that the overcurrent condition is detected by the kernel. EC Logs: [3391.984462 C1: PPC detected Vbus overcurrent!] [3391.984953 C1: overcurrent!] [3392.044935 C1: PPC detected Vbus overcurrent!] [3392.045425 C1: overcurrent!] [3392.061404 C1: PPC detected Vbus overcurrent!] [3392.061894 C1: overcurrent!] [3392.062142 C1: OC event limit reached! Source path disabled until physical disconnect.] [3392.077226 C1: PPC detected Vbus overcurrent!] [3392.077532 C1: overcurrent!] [3392.077891 C1: OC event limit reached! Source path disabled until physical disconnect.] [3392.092660 C1: PPC detected Vbus overcurrent!] [3392.092966 C1: overcurrent!] [3392.093213 C1: OC event limit reached! Source path disabled until physical disconnect.] Kernel Logs: [ 3356.560456] usb usb2-port1: over-current condition [ 3356.768434] usb usb2-port2: over-current condition [ 3356.976446] usb usb2-port4: over-current condition [ 3357.184441] usb usb2-port5: over-current condition [ 3357.392445] usb usb2-port6: over-current condition Change-Id: Ib070f261e98264cd88725ebce7d10e0798267e3b Signed-off-by: Aseda Aboagye <aaboagye@google.com> Signed-off-by: Karthikeyan Ramasubramanian <kramasub@google.com> Reviewed-on: https://chromium-review.googlesource.com/c/1286300 Tested-by: Aseda Aboagye <aaboagye@chromium.org> Reviewed-by: Jett Rink <jettrink@chromium.org> Commit-Queue: Jett Rink <jettrink@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/807633 Commit-Ready: Karthikeyan Ramasubramanian <kramasub@chromium.org> Tested-by: Karthikeyan Ramasubramanian <kramasub@chromium.org> Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
* octopus: convert boards to use hardware intJett Rink2019-01-102-3/+1
| | | | | | | | | | | | | | | | | | Recent kernel changes expect the EC to use a dedicated interrupt pin from the EC to the AP to notify the AP of pending sensor data (instead of using an eSPI "interrupt"). The octopus boards have this hardware support, we just need to enable the EC use it. BRANCH=octopus BUG=b:122552125,b:120679547 TEST=perform sensor tests on various octopus boards Change-Id: I2bd3ffe14947d5f1ec71acbb53fcac962b007cf9 Signed-off-by: Jett Rink <jettrink@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/1403103 Reviewed-by: Enrico Granata <egranata@chromium.org>
* octopus: reduce all octopus sensor fifo sizesJett Rink2019-01-051-6/+0
| | | | | | | | | | | | | | | | Too large of a FIFO causes jitter in the sensor timestamp which can cause issues during batch CTS tests. BRANCH=octopus BUG=b:120508077 TEST=everything builds. Test with smaller fifo were done on bobba. See CL:1387348 Change-Id: If67a46faa6e136006a20ac243b826b7ce06d9868 Signed-off-by: Jett Rink <jettrink@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/1392425 Commit-Ready: ChromeOS CL Exonerator Bot <chromiumos-cl-exonerator@appspot.gserviceaccount.com> Reviewed-by: Karthikeyan Ramasubramanian <kramasub@chromium.org>
* Ampton: Remove CONFIG_SYSTEM_UNLOCKEDDiana Z2019-01-051-3/+0
| | | | | | | | | | | | | | | Since ampton is moving further along in the development process, the CONFIG_SYSTEM_UNLOCKED option can be removed. BUG=b:121005179 BRANCH=octopus TEST=builds Change-Id: I71b55dff3e1316bc3450a4ad242667d594dc2a28 Signed-off-by: Diana Z <dzigterman@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/1395758 Commit-Ready: ChromeOS CL Exonerator Bot <chromiumos-cl-exonerator@appspot.gserviceaccount.com> Reviewed-by: Jett Rink <jettrink@chromium.org>
* Ampton: modify the led behavior when battery errorJames_Chao2018-12-181-2/+2
| | | | | | | | | | | | | BUG=none BRANCH=octopus TEST=check the led behavior when battery error Change-Id: I9680b7011bb88e5e064f67ae3625534945b5dff7 Signed-off-by: James_Chao <james_chao@asus.corp-partner.google.com> Reviewed-on: https://chromium-review.googlesource.com/1381597 Commit-Ready: James Chao <james_chao@asus.corp-partner.google.com> Tested-by: James Chao <james_chao@asus.corp-partner.google.com> Reviewed-by: Jett Rink <jettrink@chromium.org>
* Ampton: Implement the functions about ar cameraJames_Chao2018-12-053-4/+32
| | | | | | | | | | | | | | BUG=b:119926441 BRAHCN=octopus TEST=build success Change-Id: I7ba0632c49836ba957c40d66ed4dfc5cf905c8c6 Signed-off-by: James_Chao <james_chao@asus.corp-partner.google.com> Reviewed-on: https://chromium-review.googlesource.com/1349158 Commit-Ready: James Chao <james_chao@asus.corp-partner.google.com> Tested-by: James Chao <james_chao@asus.corp-partner.google.com> Reviewed-by: Marco Chen <marcochen@chromium.org> Reviewed-by: Jett Rink <jettrink@chromium.org>
* gpio: Add configuration for EC_PCH_RTCRST GPIO in octopus boardsKarthikeyan Ramasubramanian2018-12-051-1/+1
| | | | | | | | | | | | | | | | | | | This will help with using the hardware support to reset the RTC on the SoC. BUG=b:119678692 BRANCH=octopus TEST=make -j buildall && Boot to ChromeOS. Create a forced scenario to trigger an RTC reset and ensure that EC does not get reset while the SoC boots to ChromeOS. Execute warm reboot from AP, cold reboot from EC and wake from ec hibernate (10 iterations each) and suspend_stress_test for 50 iterations successfully. Change-Id: Ib79012b43e397d4c27ca829b135115bebf77dedb Signed-off-by: Karthikeyan Ramasubramanian <kramasub@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/1354493 Reviewed-by: Furquan Shaikh <furquan@chromium.org> Reviewed-by: Jett Rink <jettrink@chromium.org>
* Ampton: change the port0 mux to PS8751James_Chao2018-12-032-1/+39
| | | | | | | | | | | | | | | | | Due to the DP measurement eye-diagram and pre-emphasize fail, we change the mux to PS8751 on the type-c port in mainboard. BUG=b:118728290,b:119840612 BRANCH=octopus TEST=FAFT pass and check the mux function working on EVT. Change-Id: I1817686f09f6aa9a557907b279ab61c889335d9e Signed-off-by: James_Chao <james_chao@asus.corp-partner.google.com> Reviewed-on: https://chromium-review.googlesource.com/1343642 Commit-Ready: James Chao <james_chao@asus.corp-partner.google.com> Tested-by: James Chao <james_chao@asus.corp-partner.google.com> Reviewed-by: Jett Rink <jettrink@chromium.org> Reviewed-by: Diana Z <dzigterman@chromium.org>
* tablet_mode: Introduce hall sensor specific handlingFurquan Shaikh2018-11-292-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This change performs the following renaming: 1. CONFIG_TABLET_SWITCH -> CONFIG_HALL_SENSOR Indicates if a device has hall sensor 2. TABLET_MODE_GPIO_L -> HALL_SENSOR_GPIO_L Provides the interrupt line from hall sensor to EC. 3. tablet_mode_isr -> hall_sensor_isr Interrupt routine that gets control on hall sensor interrupt. 4. tablet_mode_init -> hall_sensor_init Init routine for initializing hall sensor interrupt. 5. tablet_switch_disable -> hall_sensor_disable Disable hall sensor interrupt and tablet mode sub-system. This is done to separate hall sensor interrupt from tablet mode handling. It is another step towards aligning tablet mode detection on EC with Chrome. Hall sensor interrupt occurs when the lid is in 360-degree flipped mode. If tablet mode is not already triggered by lid motion driver, then hall_sensor_isr will set tablet mode and take necessary actions to disable input peripherals. CQ-DEPEND=CL:1351518 BUG=b:120050761 BRANCH=octopus TEST=make -j buildall Change-Id: I5841f6875d538a624cb888bc048f252397ab457c Signed-off-by: Furquan Shaikh <furquan@google.com> Reviewed-on: https://chromium-review.googlesource.com/1350469 Commit-Ready: Furquan Shaikh <furquan@chromium.org> Tested-by: Furquan Shaikh <furquan@chromium.org> Reviewed-by: Aaron Durbin <adurbin@chromium.org> Reviewed-by: Jett Rink <jettrink@chromium.org>
* Ampton: Modify LED behavior to follow CoralJames_Chao2018-11-221-9/+9
| | | | | | | | | | | | | | BUG=b:119842039 BRANCH=none TEST=check the led behavior Change-Id: Ieb684f7a3d38e3b36aab9bcf27cbc823b5a7df82 Signed-off-by: James_Chao <james_chao@asus.corp-partner.google.com> Reviewed-on: https://chromium-review.googlesource.com/1345791 Commit-Ready: James Chao <james_chao@asus.corp-partner.google.com> Tested-by: James Chao <james_chao@asus.corp-partner.google.com> Reviewed-by: James Chao <james_chao@asus.corp-partner.google.com> Reviewed-by: Diana Z <dzigterman@chromium.org>
* Ampton: Correct accel sensor base reference dependent on sensor locationJames_Chao2018-11-211-8/+6
| | | | | | | | | | | | | | BUG=b:118756407 BRANCH=none TEST=accelinfo on Change-Id: I3e9f1791a12e5cb63572b1d50435b4e7a42b7ccd Signed-off-by: James_Chao <james_chao@asus.corp-partner.google.com> Reviewed-on: https://chromium-review.googlesource.com/1343641 Commit-Ready: James Chao <james_chao@asus.corp-partner.google.com> Tested-by: James Chao <james_chao@asus.corp-partner.google.com> Reviewed-by: James Chao <james_chao@asus.corp-partner.google.com> Reviewed-by: Diana Z <dzigterman@chromium.org>
* Ampton: enable the interrupt for GPIO_BASE_SIXAXIS_INT_LJames_Chao2018-11-192-1/+7
| | | | | | | | | | | | | | | BUG=none BRANCH=none TEST=accelinfo on Change-Id: I04764b0ce3f963f12f7977b08c89a375c2319d00 Signed-off-by: James_Chao <james_chao@asus.corp-partner.google.com> Reviewed-on: https://chromium-review.googlesource.com/1335292 Commit-Ready: James Chao <james_chao@asus.corp-partner.google.com> Tested-by: James Chao <james_chao@asus.corp-partner.google.com> Reviewed-by: James Chao <james_chao@asus.corp-partner.google.com> Reviewed-by: Marco Chen <marcochen@chromium.org> Reviewed-by: Jett Rink <jettrink@chromium.org>
* Ampton: add sku id for convertible skuJames_Chao2018-11-151-2/+3
| | | | | | | | | | | | | | | | According to b:112290350, the convertible sku is 1,2,3,4 BUG=b:112290350 BRANCH=none TEST=build Change-Id: I2de55eb070741f3a0058fd390f897a863562f762 Signed-off-by: James_Chao <james_chao@asus.corp-partner.google.com> Reviewed-on: https://chromium-review.googlesource.com/1335290 Commit-Ready: James Chao <james_chao@asus.corp-partner.google.com> Tested-by: James Chao <james_chao@asus.corp-partner.google.com> Reviewed-by: James Chao <james_chao@asus.corp-partner.google.com> Reviewed-by: Jett Rink <jettrink@chromium.org>
* SN5S330: treat interrupts as level-sensitiveDiana Z2018-11-131-0/+8
| | | | | | | | | | | | | | | | | | | | | | | | | | The SN5S330 PPC will pull its /INT pin low until all interrupts are cleared. Since the interrupt pin is treated as edge-sensitive, its handler needs to provide level-checking before exiting. Otherwise, if not all interrupts are cleared before the handler exits, the EC won't see another edge to call the handler again. Boards which share the PPC interrupt pin with other sources may choose to implement their own callback, if they are able to determine which chip was the source of the interrupt. BUG=b:118846062 BRANCH=None TEST=performed several power swaps and unplugs on a pair of Careenas, verifying that in instances where the handler had to loop around we correctly cleared the interrupts and the "ectool usbpdpower" output was normal Change-Id: Iccbe40976a746d109d67b9a91f8fbd81898f9b3f Signed-off-by: Diana Z <dzigterman@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/1327123 Reviewed-by: Scott Collyer <scollyer@chromium.org> Reviewed-by: Edward Hill <ecgh@chromium.org> Reviewed-by: Jett Rink <jettrink@chromium.org>
* Apel: add battery configurationJames_Chao2018-11-072-0/+28
| | | | | | | | | | | | | | | | BUG=b:115502621 BRANCH=master TEST=Build success now. Check the battery is working after we got proto board and battery. Change-Id: Id207d807439b16474ebcf9567bcaa1e9ccd83c20 Signed-off-by: James_Chao <james_chao@asus.corp-partner.google.com> Reviewed-on: https://chromium-review.googlesource.com/1312516 Commit-Ready: James Chao <james_chao@asus.corp-partner.google.com> Tested-by: James Chao <james_chao@asus.corp-partner.google.com> Reviewed-by: James Chao <james_chao@asus.corp-partner.google.com> Reviewed-by: Marco Chen <marcochen@chromium.org> Reviewed-by: Jett Rink <jettrink@chromium.org>
* Ampton: add initial motion sensor codeDiana Z2018-10-313-3/+183
| | | | | | | | | | | | | | | | Adds initial motion sensor code for ampton and apel, based on the code for similar boards. Sensors will only be present on ampton SKUs (currently numbered 1 and 2). BRANCH=None BUG=b:115501243 TEST=builds Change-Id: I61de2ec824df27b2944dd291c0e3bdbdae13a04b Signed-off-by: Diana Z <dzigterman@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/1310094 Reviewed-by: Furquan Shaikh <furquan@chromium.org> Reviewed-by: Justin TerAvest <teravest@chromium.org>
* Ampton: add battery configurationJames_Chao2018-10-232-3/+29
| | | | | | | | | | | | | | BUG=b:115502621 BRANCH=master TEST=Build success now. Check the battery is working after we got proto board. Change-Id: I5a3f14e118b474767ec885137448c776c215e0fa Signed-off-by: James_Chao <james_chao@asus.corp-partner.google.com> Reviewed-on: https://chromium-review.googlesource.com/1267760 Commit-Ready: ChromeOS CL Exonerator Bot <chromiumos-cl-exonerator@appspot.gserviceaccount.com> Tested-by: James Chao <james_chao@asus.corp-partner.google.com> Reviewed-by: Jett Rink <jettrink@chromium.org>
* Ampton: implement the LED function to follow BipJames_Chao2018-10-193-1/+78
| | | | | | | | | | | | | | BUG=none BRANCH=none TEST=Flash to ampton, check the LED is working Change-Id: Ib81e1744540f3c4cae9cb5704a3fe0398a1c2281 Signed-off-by: James_Chao <james_chao@asus.corp-partner.google.com> Reviewed-on: https://chromium-review.googlesource.com/1288649 Commit-Ready: ChromeOS CL Exonerator Bot <chromiumos-cl-exonerator@appspot.gserviceaccount.com> Tested-by: James Chao <james_chao@asus.corp-partner.google.com> Reviewed-by: Marco Chen <marcochen@chromium.org> Reviewed-by: Jett Rink <jettrink@chromium.org>
* Ampton: config the charger ic VARIANT_OCTOPUS_CHARGER_ISL9238James_Chao2018-10-111-1/+1
| | | | | | | | | | | | | | | BUG=b:117470429 BRANCH=master TEST=build Change-Id: I4a9f8449fb859eb843549d6d7f0574307df6e7ef Signed-off-by: James_Chao <james_chao@asus.corp-partner.google.com> Reviewed-on: https://chromium-review.googlesource.com/1275467 Commit-Ready: Justin TerAvest <teravest@chromium.org> Tested-by: Justin TerAvest <teravest@chromium.org> Reviewed-by: Marco Chen <marcochen@chromium.org> Reviewed-by: Jett Rink <jettrink@chromium.org> Reviewed-by: Justin TerAvest <teravest@chromium.org>
* Ampton: confirm thermistor partsDiana Z2018-10-081-1/+0
| | | | | | | | | | | | | | | Confirmed that Ampton is using 4050b thermistors (as we'd previously guessed), so removing TODO BRANCH=None BUG=b:115502220 TEST=builds Change-Id: Ie037eba542ae50cf1f9fa1911e9c33fb839e53dd Signed-off-by: Diana Z <dzigterman@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/1265064 Commit-Ready: Jett Rink <jettrink@chromium.org> Reviewed-by: Jett Rink <jettrink@chromium.org>
* bc12: rename bq24392 driver to max14637Scott Collyer2018-10-021-1/+0
| | | | | | | | | | | | | | | | | | | | The MAX14637 BC 1.2 USB charger detection chip is functionally similar to the bq24392 and can use the same driver. Rather than have 2 copies of the same driver, or a generic named driver than can be used for both chips, rename the existing bq24392 driver to max14637 as that's the BC 1.2 chip that our current designs are using. BUG=b:113267982 BRANCH=none TEST=make -j buildall Change-Id: I03cfb4918513d756c2a41341001a8162652a29b6 Signed-off-by: Scott Collyer <scollyer@google.com> Reviewed-on: https://chromium-review.googlesource.com/1250031 Commit-Ready: Scott Collyer <scollyer@chromium.org> Tested-by: Scott Collyer <scollyer@chromium.org> Reviewed-by: Edward Hill <ecgh@chromium.org> Reviewed-by: Jett Rink <jettrink@chromium.org>
* Ampton: create initial EC imageDiana Z2018-09-146-0/+417
This image is based on bip from current ToT and the most recent ampton schematics. Bugs have been created and put into TODO statements for the future work needed on this EC image. BRANCH=None BUG=b:111498206 TEST=builds Change-Id: Idff972b9ce5231524dd4865a87953ebcd5310c62 Signed-off-by: Diana Z <dzigterman@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/1225350 Reviewed-by: Justin TerAvest <teravest@chromium.org>
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