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* config: rename CONFIG_HOSTCMD_ESPI to CONFIG_HOST_INTERFACE_ESPIKeith Short2021-11-191-1/+1
| | | | | | | | | | | | | | | Rename CONFIG_HOSTCMD_ESPI to CONFIG_HOST_INTERFACE_ESPI. This makes the host interface selection configs distinct from configs used to enable/disable specific host commands. BUG=b:195416058 BRANCH=main TEST=compare_build.sh Signed-off-by: Keith Short <keithshort@chromium.org> Change-Id: I7f52614ca9a0dd54cc7e96e51bba40453564198e Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3095842 Tested-by: Michał Barnaś <mb@semihalf.com>
* board: Rename RSMRST_L_PGOOD as PG_EC_RSMRST_ODLfirmware-chameleon-14280.B-mainDivya Sasidharan2021-10-121-1/+1
| | | | | | | | | | | | | | | | | GPIO_RSMRST_L_PGOOD is also used as GPIO_PG_EC_RSMRST_ODL creating redundancy. Removing it will help need for redefinitions for zephyr. Remove reference to GPIO_RSMRST_L_PGOOD in zephyr BUG=b:200975143 BRANCH=main TEST=make buildall -j, boot up on brya Change-Id: Iff46595174c54db347b69cff3ad9e266ba9fd535 Signed-off-by: Divya Sasidharan <divya.s.sasidharan@intel.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3180808 Reviewed-by: Keith Short <keithshort@chromium.org> Commit-Queue: Keith Short <keithshort@chromium.org>
* keyboard: Use __override for keyboard_scan_configDaisuke Nojiri2021-07-231-1/+1
| | | | | | | | | | | | | | | | | Currently keyboard_scan_config is defined by each board using CONFIG_KEYBOARD_BOARD_CONFIG. This patch makes it defined as __override hence removes CONFIG_KEYBOARD_BOARD_CONFIG. BUG=None BRANCH=None TEST=buildall Change-Id: I53a356741ba4d00e829ca59b74ee6dc704188728 Signed-off-by: Daisuke Nojiri <dnojiri@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3044403 Tested-by: Gwendal Grignou <gwendal@chromium.org> Commit-Queue: Gwendal Grignou <gwendal@chromium.org> Reviewed-by: Gwendal Grignou <gwendal@chromium.org>
* system: Clean up system_get_board_version()Philip Chen2021-07-091-1/+0
| | | | | | | | | | | | | | | | | | | Refactor system_get_board_version() a bit so that we can remove CONFIG_BOARD_VERSION_CUSTOM and CONFIG_BOARD_VERSION from config.h. BRANCH=None BUG=b:186264627 TEST=make buildall -j TEST=zmake testall Cq-Depend: chromium:3015243 Change-Id: Id5ab809493c297b7d330ea13dcd6934ec00042a6 Signed-off-by: Philip Chen <philipchen@google.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3004112 Commit-Queue: Philip Chen <philipchen@chromium.org> Tested-by: Philip Chen <philipchen@chromium.org> Reviewed-by: Keith Short <keithshort@chromium.org> Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org>
* chgstv2: Unify power-on and shutdown battery thresholdsDaisuke Nojiri2021-06-231-1/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Currently, power-on battery SoC and shutdown battery SoC are independently configured by each board. This patch will unify the setting as follows: CONFIG_CHARGER_MIN_BAT_PCT_FOR_POWER_ON = 2 (don't boot if soc < 2%) CONFIG_BATT_HOST_SHUTDOWN_PERCENTAGE = 2 (shutdown if soc <= 2%) BATTERY_LEVEL_SHUTDOWN = 3 (shutdown if soc < 3%) CONFIG_BATTERY_EXPORT_DISPLAY_SOC = Y (removed) CONFIG_CHARGER_MIN_BAT_PCT_FOR_POWER_ON_WITH_AC = 1 This allows us to show the low battery alert whenever we can because EC doesn't inhibit power-on even if it knows the host would immediately shut down. With CONFIG_BATTERY_EXPORT_DISPLAY_SOC, boards will start using the CONFIG_BATT_HOST_SHUTDOWN_PERCENTAGE = 2% as the low battery threshold (and the SoC will be agreed between the EC and Powerd). Boards with CONFIG_CHARGER_MIN_BAT_PCT_FOR_POWER_ON = 1 will keep the same threshold. This is for avoiding degrading the UX by increasing the power-on threshold (even though a question that 1% may not be enough for soft sync to finish consistently remains to be answered). Boards with CONFIG_CHARGER_MIN_BAT_PCT_FOR_POWER_ON > 2 will have a lower threshold but we think 2% is enough to finish the software sync. A lower threshold also improves the UX by showing the low battery alert in the situation where otherwise the system would leave the user uninformed by not responding to a power button press. BUG=b:191837893 BRANCH=None TEST=buildall Change-Id: If6ff733bc181f929561a3fffb8a84e760668ce37 Signed-off-by: Daisuke Nojiri <dnojiri@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2981468 Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
* config: Provide default VCONN Swap delayAbe Levkoy2021-01-221-1/+0
| | | | | | | | | | | | | | | | | Almost every relevant board copy-pastes 5000 us. Make that the default and get rid of the redundant definitions. This is the approximate result of this command: find . -type f -name *.h | xargs sed -i -E \ '/#define CONFIG_USBC_VCONN_SWAP_DELAY_US[[:space:]]+5000[[:space:]]/d' BUG=b:144165680 TEST=make buildall BRANCH=none Change-Id: Ife86f9752971abcd7ab5ad5a5e607eb2ccbde2ba Signed-off-by: Abe Levkoy <alevkoy@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2628132 Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
* config: Make VCONN Swap delay a documented optionAbe Levkoy2021-01-221-1/+1
| | | | | | | | | | | | | | | | | | | | | Replace PD_VCONN_SWAP_DELAY with CONFIG_USBC_VCONN_SWAP_DELAY_US. This is the approximate result of the following command, run from platform/ec: find . -type f -\( -name '*.c' -o -name '*.h' -\) | \ xargs sed -iE 's/PD_VCONN_SWAP_DELAY/CONFIG_USBC_VCONN_SWAP_DELAY/g' Fix some latent formatting errors in usb_pd_protocol.c, because they were preventing pre-upload hooks from passing. BUG=b:144165680 TEST=make buildall BRANCH=none Signed-off-by: Abe Levkoy <alevkoy@chromium.org> Change-Id: Icaf3b309c08fdcd162e960cf5dc88185016b5d2d Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2628131 Reviewed-by: Aseda Aboagye <aaboagye@chromium.org> Commit-Queue: Aseda Aboagye <aaboagye@chromium.org>
* Refactor CONFIG_FLASH_SIZE to CONFIG_FLASH_SIZE_BYTESYuval Peress2021-01-151-1/+1
| | | | | | | | | | | | | | | | | | | | | In Zephyr CONFIG_FLASH_SIZE is a Kconfig value that is used throughout. The issue is that the units don't match. In Zephyr the value is in KiB instead of bytes. This refactor simply renames CONFIG_FLASH_SIZE in platform/ec to include the unit (via _BYTES). BRANCH=none BUG=b:174873770 TEST=make buildall be generated by the build instead of per board Signed-off-by: Yuval Peress <peress@chromium.org> Change-Id: I44bf3c7a20fcf62aaa9ae15715be78db4210f384 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2627638 Reviewed-by: Jack Rosenthal <jrosenth@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Hughes <tomhughes@chromium.org> Commit-Queue: Jack Rosenthal <jrosenth@chromium.org>
* COIL: Rename CONFIG_I2C_CONTROLLERDiana Z2020-11-051-1/+1
| | | | | | | | | | | | | Rename CONFIG_I2C_CONTROLLER and related comments. BRANCH=None BUG=None TEST=make -j buildall Signed-off-by: Diana Z <dzigterman@chromium.org> Change-Id: Ied6a1829bf54a5c9a32e6772982a4b8aa31aaf23 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2518659 Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org>
* usb_pd: Rename CONFIG_CMD_PD_CONTROL to CONFIG_HOSTCMD_PD_CONTROLVijay Hiremath2020-05-151-1/+1
| | | | | | | | | | | | BUG=none BRANCH=none TEST=make buildall -j Change-Id: I33a63d6ac45bbd46da74db34a21d1bb130476362 Signed-off-by: Vijay Hiremath <vijay.p.hiremath@intel.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2196946 Reviewed-by: Sooraj Govindan <sooraj.govindan@intel.corp-partner.google.com> Reviewed-by: Keith Short <keithshort@chromium.org>
* TCPMV1/2: Make the PD Config Flags more consistentSam Hurst2020-02-221-0/+1
| | | | | | | | | | | | | | | | | | | | The current use of the PD Config Flags are a bit confusing and has been changed to the following: The CONFIG_USB_POWER_DELIVERY flag is used to enable and disable the TCPMv1 and TCPMv2 stacks. And when CONFIG_USB_POWER_DELIVERY is enabled, one of the following must be enabled: CONFIG_USB_PD_TCPMV1 - legacy power delivery state machine CONFIG_USB_PD_TCPMV2 - current power delivery state machine BUG=b:149993808 BRANCH=none TEST=make -j buildall Change-Id: Ie3f8615a75b15b4f1c703f57f3db9e152a471238 Signed-off-by: Sam Hurst <shurst@google.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2068519 Reviewed-by: Diana Z <dzigterman@chromium.org>
* Rename CONFIG_USB_PD_PORT_COUNT as CONFIG_USB_PD_PORT_MAX_COUNTKarthikeyan Ramasubramanian2019-11-011-1/+1
| | | | | | | | | | | | | | | | | Certain SKUs of certain boards have lesser number of USB PD ports than defined by CONFIG_USB_PD_PORT_COUNT. Hence rename CONFIG_USB_PD_PORT_COUNT as CONFIG_USB_PD_PORT_MAX_COUNT. BUG=b:140816510, b:143196487 BRANCH=octopus TEST=make -j buildall; Boot to ChromeOS Change-Id: I7c33b27150730a1a3b5813b7b4a72fd24ab73c6a Signed-off-by: Karthikeyan Ramasubramanian <kramasub@google.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1879337 Tested-by: Karthikeyan Ramasubramanian <kramasub@chromium.org> Reviewed-by: Jett Rink <jettrink@chromium.org> Commit-Queue: Jett Rink <jettrink@chromium.org>
* eSPI: Configure SLP_S3, SLP_S4 separatelyAbe Levkoy2019-10-301-1/+2
| | | | | | | | | | | | | | | | | | Split the configuration option CONFIG_HOSTCMD_ESPI_VW_SLP_SIGNALS into separate options controlling SLP_S3 and SLP_S4. Allow volteer to configure SLP_S3 as a GPIO and SLP_S4 as an eSPI virtual wire. Cause a build error if virtual wires are configured, but eSPI is not. BUG=b:139553375,b:143288478 TEST=make buildall TEST=Build volteer with CONFIG_HOSTCMD_ESPI_VW_S4 defined but CONFIG_HOSTCMD_ESPI undefined; observe build error BRANCH=none Change-Id: I8c6737e2ccb1a77a882e5fa65c6eddb342209b61 Signed-off-by: Abe Levkoy <alevkoy@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1881758 Reviewed-by: Keith Short <keithshort@chromium.org>
* config: Merge CONFIG_CHARGER_V2 into CONFIG_CHARGERKeith Short2019-09-181-1/+0
| | | | | | | | | | | | | | | | For all boards that defined CONFIG_CHARGER, CONFIG_CHARGER_V2 is also defined. Remove references to CONFIG_CHARGER_V2 from board header files. Replace CONFIG_CHARGER_V2 in common C modules with CONFIG_CHARGER when appropriate. BUG=b:139699769 BRANCH=none TEST=make buildall -j Change-Id: I6b54baf4ad2406bbed629b6b272dad9ea6a81280 Signed-off-by: Keith Short <keithshort@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1789420 Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org>
* atlas: remove reference to CONFIG_USB_PD_CUSTOM_VDMCaveh Jalali2019-09-131-1/+0
| | | | | | | | | | | | | there is no such thing as CONFIG_USB_PD_CUSTOM_VDM in the EC codebase. BUG=none BRANCH=none TEST=verified there are no references to CONFIG_USB_PD_CUSTOM_VDM Change-Id: I0eaaf2084591f64dd8f76d4e9ca356224afee3fe Signed-off-by: Caveh Jalali <caveh@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1772529 Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org>
* config: Refactor CONFIG_ACCEL_FIFO to enable use of IS_ENABLEDYuval Peress2019-09-031-2/+6
| | | | | | | | | | | | | | | This change allows us to use the IS_ENABLED condition to replace the various ifdef guards around the CONFIG_ACCEL_FIFO BUG=b:137758297,chromium:981990 BRANCH=None TEST=buildall and CTS tests on Arcada Change-Id: I65d36bac19855e51c830a33e6f3812575e8d15d9 Signed-off-by: Yuval Peress <peress@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1704164 Reviewed-by: Jack Rosenthal <jrosenth@chromium.org> Reviewed-by: Gwendal Grignou <gwendal@chromium.org>
* Remove __7b, __8b and __7bfDenis Brockus2019-07-201-4/+4
| | | | | | | | | | | | | | | | | | | The extentions were added to make the compiler perform most of the verification that the conversion was being done correctly to remove 8bit addressing as the standard I2C/SPI address type. Now that the compiler has verified the code, the extra extentions are being removed BUG=chromium:971296 BRANCH=none TEST=make buildall -j TEST=verify sensor functionality on arcada_ish Change-Id: I36894f8bb9daefb5b31b5e91577708f6f9af2a4f Signed-off-by: Denis Brockus <dbrockus@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1704792 Reviewed-by: Jack Rosenthal <jrosenth@chromium.org>
* Use 7bit I2C/SPI slave addresses in ECDenis Brockus2019-07-191-4/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Opt for 7bit slave addresses in EC code. If 8bit is expected by a driver, make it local and show this in the naming. Use __7b, __7bf and __8b as name extensions for i2c/spi addresses used in the EC codebase. __7b indicates a 7bit address by itself. __7bf indicates a 7bit address with optional flags attached. __8b indicates a 8bit address by itself. Allow space for 10bit addresses, even though this is not currently being used by any of our attached devices. These extensions are for verification purposes only and will be removed in the last pass of this ticket. I want to make sure the variable names reflect the type to help eliminate future 7/8/7-flags confusion. BUG=chromium:971296 BRANCH=none TEST=make buildall -j Change-Id: I2fc3d1b52ce76184492b2aaff3060f486ca45f45 Signed-off-by: Denis Brockus <dbrockus@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1699893 Reviewed-by: Jack Rosenthal <jrosenth@chromium.org>
* intel_x86/power: Consolidate chipset specific power signals arrayVijay Hiremath2019-06-131-10/+0
| | | | | | | | | | | | | | | Currently chipset specific power signals are defined at board/baseboard level. These power signals are moved to chipset specific file to minimize the redundant power signals array defined for each board/baseboard. BUG=b:134079574 BRANCH=none TEST=make buildall -j Change-Id: I351904f7cd2e0f27844c0711beb118d390219581 Signed-off-by: Vijay Hiremath <vijay.p.hiremath@intel.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1636837 Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
* common: motion_sense: Require CONFIG_MOTION_SENSOR_MAX_COUNTYuval Peress2019-06-051-0/+1
| | | | | | | | | | | | | | | This changes requires all boards to define the maximum number of sensors they support. This will allow us to later create static arrays with the appropriate length. BUG=chromium:966506 BRANCH=None TEST=make buildall Change-Id: I5a2fa8f0fdcaef69065dfd4c2bfea4e3f371e986 Signed-off-by: Yuval Peress <peress@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1637414 Reviewed-by: Jett Rink <jettrink@chromium.org>
* board: atlas: Remove BMI160 supportGwendal Grignou2019-05-091-7/+0
| | | | | | | | | | | | | | | | | | | Atlas may ship without IMU. hardware_features.xml indicates no IMU support (CL:*1168651 and CL:*1138132) Prevent EC to report IMU even if present. BUG=b:129078548 TEST=Compile BRANCH=atlas Change-Id: I600ef7268d7cea50164bf2e9fe7dd54d00329437 Signed-off-by: Gwendal Grignou <gwendal@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/1582609 Commit-Ready: ChromeOS CL Exonerator Bot <chromiumos-cl-exonerator@appspot.gserviceaccount.com> Tested-by: Caveh Jalali <caveh@google.com> Reviewed-by: Bob Moragues <moragues@chromium.org> Reviewed-by: Caveh Jalali <caveh@google.com>
* atlas: stop advertising tight-timestampsCaveh Jalali2019-05-021-0/+1
| | | | | | | | | | | | | | | | | | atlas currently does not have a low jitter sensor timestamping mechanism, so use the recently added config option that disables the advertising a the low jitter feature to the AP. BUG=b:123700100,b:129084649,b:129086694 BRANCH=none TEST=system boots normally Change-Id: I2581d36f38531f227cca31d6ba5a23bedbc57829 Signed-off-by: Caveh Jalali <caveh@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/1584037 Commit-Ready: Caveh Jalali <caveh@google.com> Tested-by: Caveh Jalali <caveh@google.com> Reviewed-by: Bob Moragues <moragues@chromium.org> Reviewed-by: Caveh Jalali <caveh@google.com>
* atlas: let AP fully control display backlightCaveh Jalali2019-04-261-2/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | this change removes the EC from the display backlight control logic. previously, the EC would enable/disable the backlight master enable directly based on the lid switch. this turns out to be redundant and in some cases causes timing violations between backlight enable and the backlight PWM signal. the AP already controls the display power load switch (EN_PP3300_DX_EDP), so when the AP is off, display power (including the backlight) is also off. in addition, the AP correctly controls the backlight using PCH_EDP_BKLTEN. with this change, we're only removing the EC's master kill switch for the backlight. BRANCH=none BUG=b:129651119,b:128625720 TEST=verified no ill effects on atlas. EE scoped PWM vs. BL enable. Change-Id: Ibef9062ce66dfec1363626e674f144a1a3d55b5e Signed-off-by: Caveh Jalali <caveh@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1566482 Commit-Queue: Caveh Jalali <caveh@google.com> Tested-by: Caveh Jalali <caveh@google.com> Reviewed-by: Aseda Aboagye <aaboagye@chromium.org> (cherry picked from commit e3c9e42a6475121e07fc5b9372e24af847fecf4b) Reviewed-on: https://chromium-review.googlesource.com/1585134 Commit-Ready: Caveh Jalali <caveh@google.com> Reviewed-by: Caveh Jalali <caveh@google.com>
* atlas: enable discharge-on-acCaveh Jalali2019-04-191-0/+2
| | | | | | | | | | | | | | | | | | | enable a mode where we will switch from AC power to battery power when the battery is fully charged. then, when the battery is no longer considred fully charged (95%), switch back to AC and chrage the battery. BUG=b:128709632 BRANCH=none TEST=observed atlas hovers between 95% and 100% battery charge. no AC current drawn while going from 100% to 95%. Change-Id: I6e22189fa5be43dc31a5c3b93fda70a4fe5958a1 Signed-off-by: Caveh Jalali <caveh@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/1496755 Commit-Ready: Caveh Jalali <caveh@google.com> Tested-by: caveh jalali <caveh@chromium.org> Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
* common: bit change 1 << constants with BIT(constants)Gwendal Grignou2019-03-261-1/+1
| | | | | | | | | | | | | | | | | Mechanical replacement of bit operation where operand is a constant. More bit operation exist, but prone to errors. Reveal a bug in npcx: chip/npcx/system-npcx7.c:114:54: error: conversion from 'long unsigned int' to 'uint8_t' {aka 'volatile unsigned char'} changes value from '16777215' to '255' [-Werror=overflow] BUG=None BRANCH=None TEST=None Change-Id: I006614026143fa180702ac0d1cc2ceb1b3c6eeb0 Signed-off-by: Gwendal Grignou <gwendal@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/1518660 Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org>
* atlas: "system lock" the ECCaveh Jalali2019-03-211-6/+0
| | | | | | | | | | | | | | | | | | | | this enables the "system lock" feature in the EC. basically, when the EC flash is locked and and the write protect pin is asserted, some features of the EC are disabled. most notably, USB-PD is disabled when running in EC-RO. BRANCH=none BUG=b:122571285 TEST=verified that "sysinfo" reports the EC to be locked when when GPIO_WP_L is high and the flash is locked (ectool flashprotect enable) Change-Id: I85491573ed1c60e558e8b893553a00fbbbd77e76 Signed-off-by: Caveh Jalali <caveh@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/1532347 Commit-Ready: caveh jalali <caveh@chromium.org> Tested-by: caveh jalali <caveh@chromium.org> Reviewed-by: Matthew Blecker <matthewb@chromium.org>
* motion: Define macros for custom eventsGwendal Grignou2019-03-201-1/+2
| | | | | | | | | | | | | | Define macros to define custom events used by sensor interrupt handlers. Remove CONFIG_ for activity events. BUG=none BRANCH=none TEST=compile, sensors work on eve. Change-Id: I08ef6ed2a004466ebc5f7650d6952a150b9de713 Signed-off-by: Gwendal Grignou <gwendal@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/1272189 Reviewed-by: Jett Rink <jettrink@chromium.org>
* atlas: raise charger power limit to 60wCaveh Jalali2019-03-131-1/+1
| | | | | | | | | | | | | | | | this raises the ingress/charger power limit to 60w. the hardware team has verified atlas can take 60w. BUG=b:126377091 BRANCH=none TEST=verified atlas negotiates PD to 20v and can draw > 45w using zinger Change-Id: If738cfc690893df39f223205bff9daecd332b3a3 Signed-off-by: Caveh Jalali <caveh@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/1496199 Commit-Ready: ChromeOS CL Exonerator Bot <chromiumos-cl-exonerator@appspot.gserviceaccount.com> Tested-by: caveh jalali <caveh@chromium.org> Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
* atlas: only apply internal EC_WP_L pullup when neededCaveh Jalali2019-01-191-0/+2
| | | | | | | | | | | | | | | | | we had applied an internal pullup on the EC side to the EC_WP_L signal to work around a problem. we now have a board level fix on newer boards, so we should only apply this workaround on older boards. BUG=b:122568899,b:116670191 BRANCH=stabilize-atlas-11512.6.B TEST=verified older boards still read EC_WP_L as high Change-Id: Ia95b8649eed240a7c97c6b1cc20ed5ccea40e4f2 Signed-off-by: Caveh Jalali <caveh@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/1407245 Commit-Ready: ChromeOS CL Exonerator Bot <chromiumos-cl-exonerator@appspot.gserviceaccount.com> Tested-by: caveh jalali <caveh@chromium.org> Reviewed-by: Duncan Laurie <dlaurie@chromium.org>
* Atlas: Stop defining CONFIG_BATTERY_CRITICAL_SHUTDOWN_CUT_OFF.Matthew Blecker2019-01-151-1/+0
| | | | | | | | | | | | | | | | This changes the low battery behavior to enter hibernate (G3) when battery is at 2%. EC will no longer cut off the battery at any level. The system will now rely on the battery fuel gauge to cut itself off when needed. BRANCH=none BUG=b:121219147 TEST=zakaufman@ reports this resolves the linked bug. Change-Id: I14afeafb2291a6093fbe2ee4d46b7baa8c8fe8cb Signed-off-by: Matthew Blecker <matthewb@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/1407239 Tested-by: Zachary Kaufman <zakaufman@google.com> Reviewed-by: Caveh Jalali <caveh@google.com>
* atlas: disable PD communication when EC is lockedCaveh Jalali2018-12-231-0/+1
| | | | | | | | | | | | | | | | | | this config option disables PD communication when the EC is still running in RO and the system is "locked". for now, atlas is still configured to be unlocked, so changing this config will not affect PD negotiation. BUG=b:121222819 BRANCH=none TEST=verified we still charge at 15v in RO Change-Id: I389b6c7e3bef9c348f929b84240370d8a7930644 Signed-off-by: Caveh Jalali <caveh@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/1387999 Commit-Ready: ChromeOS CL Exonerator Bot <chromiumos-cl-exonerator@appspot.gserviceaccount.com> Tested-by: Caveh Jalali <caveh@google.com> Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
* atlas: update port LED colors to new specCaveh Jalali2018-08-141-0/+3
| | | | | | | | | | | | | | | | | | - only the LED next to the charging connection is on - "charging" is amber - full charge is white BUG=b:110505328 BRANCH=none TEST=flashed atlas, verified LEDs Change-Id: If4308b971980075305948c43980a2cd52192b7b5 Signed-off-by: Caveh Jalali <caveh@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/1170575 Commit-Ready: caveh jalali <caveh@chromium.org> Tested-by: caveh jalali <caveh@chromium.org> Reviewed-by: Aseda Aboagye <aaboagye@chromium.org> Reviewed-by: caveh jalali <caveh@chromium.org>
* Revert "atlas: do not fake power-on as reset-pin"Caveh Jalali2018-08-031-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This reverts commit fc1496d1bb84f74d539bc11a205d90926dc79740. this change prevented us from entering recovery mode using the 3-finger salute. the keyboard_scan.c:check_boot_key() depends the reset pin being asserted as a prerequisite to checking the refresh key has been pressed. this means we never get as far as checking for the 3-finger salute key combo. BUG=b:75070158,b:111577561 BRANCH=stabilize-atlas.10819.B TEST=3-finger salute now gets us into recovery Original change's description: > atlas: do not fake power-on as reset-pin > > atlas can detect a power-on reset, so we don't need to fake it as a > reset-pin initiated reset. > > BUG=b:75070158 > BRANCH=none > TEST=EC now claims the reset cause was power-on instead of reset on > cold boot > > Change-Id: I0b0a58f79b605e768719249f1c139f6d46fec30b > Signed-off-by: Caveh Jalali <caveh@chromium.org> > Reviewed-on: https://chromium-review.googlesource.com/1098531 > Commit-Ready: Caveh Jalali <caveh@google.com> > Tested-by: Caveh Jalali <caveh@google.com> > Reviewed-by: Aseda Aboagye <aaboagye@chromium.org> Bug: b:75070158 Change-Id: Ia3bb9ccecbb69e35b1cec48dabfc5e99b29a3b17 Reviewed-on: https://chromium-review.googlesource.com/1161226 Commit-Ready: Caveh Jalali <caveh@google.com> Tested-by: Caveh Jalali <caveh@google.com> Reviewed-by: Caveh Jalali <caveh@google.com>
* espi: Rename CONFIG_HOSTCMD_ESPI_VW_SIGNALS to ↵Furquan Shaikh2018-07-271-1/+1
| | | | | | | | | | | | | | | | | | | | | CONFIG_HOSTCMD_ESPI_VW_SLP_SIGNALS This change renames CONFIG_HOSTCMD_ESPI_VW_SIGNALS to CONFIG_HOSTCMD_ESPI_VW_SIGNALS in order to make it clear that this config option indicates that chipset sleep signals (SLP_S3 and SLP_S4) are tranmitted over virtual wires instead of physical lines with eSPI. BUG=b:111859300 BRANCH=None TEST=make -j buildall Change-Id: Iab4423abc9102164d4f43296a279c24355445341 Signed-off-by: Furquan Shaikh <furquan@google.com> Reviewed-on: https://chromium-review.googlesource.com/1151048 Commit-Ready: Furquan Shaikh <furquan@chromium.org> Tested-by: Furquan Shaikh <furquan@chromium.org> Reviewed-by: Aaron Durbin <adurbin@chromium.org> Reviewed-by: Jett Rink <jettrink@chromium.org>
* atlas: enable ALS pollingCaveh Jalali2018-06-291-0/+3
| | | | | | | | | | | | | | | | | | | it looks like we were missing a config option on the EC to poll the ALS for readings, so just turn it on like on other platforms. BUG=b:110955363 BRANCH=none TEST="accelinfo on 100" on the EC console now reports non-zero ALS values. on linux, /sys/bus/iio/devices/iio:device1/in_illuminance_raw reads plausible values. Change-Id: Id4be964154efcbf021c3b781ff5dc5ba43e432db Signed-off-by: Caveh Jalali <caveh@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/1119662 Commit-Ready: caveh jalali <caveh@chromium.org> Tested-by: Caveh Jalali <caveh@google.com> Tested-by: caveh jalali <caveh@chromium.org> Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
* atlas: enable charge status LEDsCaveh Jalali2018-06-221-4/+10
| | | | | | | | | | | | | | | | | | | this enables the charge status LEDs. this is largely taken from the nocturne config. the color_map is tweaked to produce reasonable colors on atlas - at least as a 1st order approximation. BUG=b:110505328 BRANCH=none TEST=verified LEDs on a reworked board. color pattern is the same as nocturne. Change-Id: I4be4847e7a7d41ab83df8ab173bb3dba83297212 Signed-off-by: Caveh Jalali <caveh@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/1111576 Commit-Ready: caveh jalali <caveh@chromium.org> Tested-by: caveh jalali <caveh@chromium.org> Reviewed-by: Aseda Aboagye <aaboagye@chromium.org> Reviewed-by: caveh jalali <caveh@chromium.org>
* atlas: config CPU_PROCHOT polarityCaveh Jalali2018-06-201-0/+1
| | | | | | | | | | | | | | | | | | | atlas's CPU_PROCHOT signal is active low which is inverted compared with previous designs. we recently added support for configuring PROCHOT polarity, so we can now configure this pin correctly. BUG=b:79266467 BRANCH=none TEST=prochot pin reads back correctly on EC and CPU is not throttled. explicitly asserting PROCHOT gpio on EC throttles CPU. Change-Id: Ie44352855d36f43f5767a99684dd17a509826190 Signed-off-by: Caveh Jalali <caveh@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/1107121 Commit-Ready: ChromeOS CL Exonerator Bot <chromiumos-cl-exonerator@appspot.gserviceaccount.com> Tested-by: caveh jalali <caveh@chromium.org> Reviewed-by: Aseda Aboagye <aaboagye@chromium.org> Reviewed-by: caveh jalali <caveh@chromium.org>
* atlas: power down system at PMIC on hibernateCaveh Jalali2018-06-191-0/+1
| | | | | | | | | | | | | | | | this turns off most of the power rails at the PMIC in response to a system hibernate request. BUG=b:110237370 BRANCH=none TEST=verified both the AP and EC power down Change-Id: Ica830e15dfd2f80a3392afe29a079faa5e4d6ec9 Signed-off-by: Caveh Jalali <caveh@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/1096485 Commit-Ready: Caveh Jalali <caveh@google.com> Tested-by: Caveh Jalali <caveh@google.com> Reviewed-by: Caveh Jalali <caveh@google.com>
* atlas: do not fake power-on as reset-pinCaveh Jalali2018-06-161-1/+0
| | | | | | | | | | | | | | | | | atlas can detect a power-on reset, so we don't need to fake it as a reset-pin initiated reset. BUG=b:75070158 BRANCH=none TEST=EC now claims the reset cause was power-on instead of reset on cold boot Change-Id: I0b0a58f79b605e768719249f1c139f6d46fec30b Signed-off-by: Caveh Jalali <caveh@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/1098531 Commit-Ready: Caveh Jalali <caveh@google.com> Tested-by: Caveh Jalali <caveh@google.com> Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
* atlas: configure GPIOC2 as PWM1Caveh Jalali2018-06-121-1/+1
| | | | | | | | | | | | | | | | | on the npcx7, GPIOC2 is a bit special because it has 2 alternate modes. we want the PWM1 mode instead of I2C6, and that's selected using a special #define. BUG=b:94613023,b:78309559 BRANCH=none TEST=apshutdown still works Change-Id: Ibd8baa15640344ce6c48b2c849e0d9fe6ce4239f Signed-off-by: Caveh Jalali <caveh@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/1090320 Commit-Ready: caveh jalali <caveh@chromium.org> Tested-by: caveh jalali <caveh@chromium.org> Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
* atlas: config PCH_PWR_BTN as push-pullCaveh Jalali2018-06-051-1/+1
| | | | | | | | | | | | | | | | | we don't have a pullup on PCH_PWR_BTN, so just configure it as push-pull. BUG=b:78309559 BRANCH=none TEST=able to power down/up the AP Change-Id: I791bfe3fb1c168ac72762f748f744cfbe771169b Signed-off-by: Caveh Jalali <caveh@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/1086470 Commit-Ready: caveh jalali <caveh@chromium.org> Tested-by: caveh jalali <caveh@chromium.org> Reviewed-by: Aseda Aboagye <aaboagye@chromium.org> Reviewed-by: Caveh Jalali <caveh@google.com>
* atlas: board version 1 supportCaveh Jalali2018-06-011-0/+2
| | | | | | | | | | | | | | | | | | | these changes reflect the hardware changes made between version 0 and version 1 of the atlas board. note: these changes are not backward compatible - version 0 of atlas is no longer supported. BUG=b:78309559 BRANCH=none TEST=works fine on atlas version 1 Change-Id: Ia519f161c66066e02e9ddce7560a8fe2b7e74882 Signed-off-by: Caveh Jalali <caveh@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/1045730 Commit-Ready: Caveh Jalali <caveh@google.com> Tested-by: Caveh Jalali <caveh@google.com> Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
* espi: rename remaining eSPI optionsJett Rink2018-05-231-1/+1
| | | | | | | | | | | | | Change prefix from CONFIG_ESPI to CONFIG_HOSTCMD_ESPI for consistency. BRANCH=none BUG=chromium:818804 TEST=Full stack builds and works on yorp (espi) and grunt (lpc) Change-Id: I8b6e7eea515d14a0ba9030647cec738d95aea587 Signed-off-by: Jett Rink <jettrink@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/1067513 Reviewed-by: Randall Spangler <rspangler@chromium.org>
* espi: convert all eSPI board to use CONFIG_HOSTCMD_ESPIJett Rink2018-05-221-2/+1
| | | | | | | | | | | | | | Convert all boards that use both CONFIG_ESPI and CONFIG_LPC to only use the CONFIG_HOSTCMD_ESPI option. BRANCH=none BUG=chromium:818804 TEST=entire stack works with lpc and espi Change-Id: Idd1519494a4f880b7b2018d059579d50c5461fcf Signed-off-by: Jett Rink <jettrink@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/1067499 Reviewed-by: Randall Spangler <rspangler@chromium.org>
* atlas: keep discharged battery powered during prechargeCaveh Jalali2018-05-211-0/+2
| | | | | | | | | | | | | | | | | | | | | | when we wake up a discharged battery using the "precharge current", it briefly requests requests (0 vols, 0 amps) - presumably while its controller is trying to figure out what's going on... we respect this and stop charging, but that's probably a really bad idea since the battery has had very little chance to accept enough charge to self-power its controller. enabling "REQUESTS_NIL_WHEN_DEAD" gets around that. BUG=b:79354967 BRANCH=none TEST=instrumented code to verify we override the 0 amps request when battery is at 0% charge Change-Id: I1e15e5106ae5cdda94bd1bfd02132b300c9c4665 Signed-off-by: Caveh Jalali <caveh@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/1067010 Commit-Ready: Caveh Jalali <caveh@google.com> Tested-by: Caveh Jalali <caveh@google.com> Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org>
* system: update board version to return an error if encounteredJett Rink2018-04-191-2/+1
| | | | | | | | | | | | | | | | | | | | Now that board version can come from CBI, we can have a real error reading it. We should pass that error to the console or to the AP on the host command and let the AP firmware (or user) decided how to handle that error case Also update the CONFIG_BOARD_VERSION to be derived instead of needed in most cases. BRANCH=none BUG=b:77972120 TEST=Error reported on EC console and AP console when CBI is invalid on yorp Change-Id: Ib8d80f610ea226265a61e68b61965150cdc9bb04 Signed-off-by: Jett Rink <jettrink@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/1015776 Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
* atlas: Add new boardDuncan Laurie2018-04-061-0/+270
This is based on the initial code from Caveh here: https://chromium-review.googlesource.com/959861 Most things are functional, with some workarounds for P0 boards. The type-c hotplug is not working in this commit, the HPD will be run from the tcpm in the next board build. For now we might be able to get it working on P0 with some more tweaking.. The other known issue is that the battery takes ~2 seconds to come back online after a cutoff (the auto-power-on timeout is one second so the board will not power on like it should) and sometimes the battery is not responding properly on i2c and it requires an EC reset. BUG=b:75070158 BRANCH=none TEST=tested on P0 boards Change-Id: I438cb93b78d6f501426842d6cbe3d6a994563358 Signed-off-by: Duncan Laurie <dlaurie@google.com> Signed-off-by: Caveh Jalali <caveh@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/982498 Commit-Ready: ChromeOS CL Exonerator Bot <chromiumos-cl-exonerator@appspot.gserviceaccount.com> Tested-by: Caveh Jalali <caveh@google.com> Reviewed-by: Caveh Jalali <caveh@google.com>
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