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* ish: Trim down the release branchstabilize-wristpin-14469.59.B-ishstabilize-voshyr-14637.B-ishstabilize-quickfix-14695.187.B-ishstabilize-quickfix-14695.124.B-ishstabilize-quickfix-14526.91.B-ishstabilize-14695.85.B-ishstabilize-14695.107.B-ishstabilize-14682.B-ishstabilize-14633.B-ishstabilize-14616.B-ishstabilize-14589.B-ishstabilize-14588.98.B-ishstabilize-14588.14.B-ishstabilize-14588.123.B-ishstabilize-14536.B-ishstabilize-14532.B-ishstabilize-14528.B-ishstabilize-14526.89.B-ishstabilize-14526.84.B-ishstabilize-14526.73.B-ishstabilize-14526.67.B-ishstabilize-14526.57.B-ishstabilize-14498.B-ishstabilize-14496.B-ishstabilize-14477.B-ishstabilize-14469.9.B-ishstabilize-14469.8.B-ishstabilize-14469.58.B-ishstabilize-14469.41.B-ishstabilize-14442.B-ishstabilize-14438.B-ishstabilize-14411.B-ishstabilize-14396.B-ishstabilize-14395.B-ishstabilize-14388.62.B-ishstabilize-14388.61.B-ishstabilize-14388.52.B-ishstabilize-14385.B-ishstabilize-14345.B-ishstabilize-14336.B-ishstabilize-14333.B-ishrelease-R99-14469.B-ishrelease-R98-14388.B-ishrelease-R102-14695.B-ishrelease-R101-14588.B-ishrelease-R100-14526.B-ishfirmware-cherry-14454.B-ishfirmware-brya-14505.B-ishfirmware-brya-14505.71.B-ishfactory-kukui-14374.B-ishfactory-guybrush-14600.B-ishfactory-cherry-14455.B-ishfactory-brya-14517.B-ishJack Rosenthal2021-11-051-40/+0
| | | | | | | | | | | | | | | | | | | | | | In the interest of making long-term branch maintenance incur as little technical debt on us as possible, we should not maintain any files on the branch we are not actually using. This has the added effect of making it extremely clear when merging CLs from the main branch when changes have the possibility to affect us. The follow-on CL adds a convenience script to actually pull updates from the main branch and generate a CL for the update. BUG=b:204206272 BRANCH=ish TEST=make BOARD=arcada_ish && make BOARD=drallion_ish Signed-off-by: Jack Rosenthal <jrosenth@chromium.org> Change-Id: I17e4694c38219b5a0823e0a3e55a28d1348f4b18 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3262038 Reviewed-by: Jett Rink <jettrink@chromium.org> Reviewed-by: Tom Hughes <tomhughes@chromium.org>
* adc: Remove adc_chip.h where adc.h is usedCaveh Jalali2021-08-271-1/+0
| | | | | | | | | | | | | | This removes the use of adc_chip.h where adc.h is also used. In this case, adc_chip.h is redundant. BRANCH=none BUG=b:181271666 TEST=buildall passes Change-Id: Id7baf9aef949447a4d47934242f9bae97c971262 Signed-off-by: Caveh Jalali <caveh@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3120317 Reviewed-by: Keith Short <keithshort@chromium.org>
* LICENSE: remove unnecessary (c) after CopyrightTom Hughes2019-06-191-1/+1
| | | | | | | | | | | | | | | | Ran the following command: git grep -l 'Copyright (c)' | \ xargs sed -i 's/Copyright (c)/Copyright/g' BRANCH=none BUG=none TEST=make buildall -j Change-Id: I6cc4a0f7e8b30d5b5f97d53c031c299f3e164ca7 Signed-off-by: Tom Hughes <tomhughes@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1663262 Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org> Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
* GPIO: Move definition of alternate functions to gpio.incAnton Staaf2014-07-171-9/+0
| | | | | | | | | | | | | | | | | | | | | This is a straightforward conversion of existing tables into X-Macro style definitions for the GPIO alternate functions. This change in itself, is not particularly powerful, but having all GPIO settings in a single file makes a board easier to understand. Signed-off-by: Anton Staaf <robotboy@chromium.org> BRANCH=none TEST=make buildall -j Followed by manual testing of interrupt on change and UART functionality on STM32F0 based discovery board. Change-Id: Ib7f1f014f4bd289d7c0ac3100470ba2dc71ca579 Reviewed-on: https://chromium-review.googlesource.com/207987 Reviewed-by: Randall Spangler <rspangler@chromium.org> Tested-by: Anton Staaf <robotboy@chromium.org> Commit-Queue: Anton Staaf <robotboy@chromium.org>
* gpio: Replace duplication in gpio declarations with X-macro fileAnton Staaf2014-06-261-10/+1
| | | | | | | | | | | | | | | | | | | | | Previously each board.h and board.c contained an enum and an array for gpio definitons that had to be manually kept in sync, with no compiler assistance other than that their lengths matched. This change adds a single gpio.inc file that declares all gpio's that a board uses and is used as an X-macro include file to generate both the gpio_signal enum and the gpio_list array. Signed-off-by: Anton Staaf <robotboy@chromium.org> BRANCH=none TEST=make buildall -j Change-Id: If9c9feca968619a59ff9f20701359bcb9374e4da Reviewed-on: https://chromium-review.googlesource.com/205354 Tested-by: Anton Staaf <robotboy@chromium.org> Reviewed-by: Vincent Palatin <vpalatin@chromium.org> Commit-Queue: Anton Staaf <robotboy@chromium.org>
* cleanup: Remove checkpatch warningsRandall Spangler2013-12-191-1/+1
| | | | | | | | | | | | | | | | This make minor syntactic changes and renames some camel-cased symbols to keep checkpatch from complaining. The goal is to reduce the temptation to use 'repo upload --no-verify'. This is a big furball of find/replace, but no functional changes. BUG=chromium:322144 BRANCH=none TEST=build all boards; pass unit tests Change-Id: I0269b7dd95836ef9a6e33f88c003ab0f24f842a0 Signed-off-by: Randall Spangler <rspangler@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/180495
* Specify I2C channels physically, not arbitrarilytest-4824.BBill Richardson2013-11-111-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | In board.c, we initialize this struct: struct i2c_port_t { const char *name; /* Port name */ int port; /* Port */ int kbps; /* Speed in kbps */ }; extern const struct i2c_port_t i2c_ports[]; The port field refers to the physical I2C bus on the EC. Meanwhile, in board.h, we've identified the bus where each I2C device is attached: Up until this CL, we've been picking one of those device-to-bus macros to initialize port fields of the i2c_ports[] array. That's wrong and confusing. This change specifies the physical channel with the physical number. BUG=chrome-os-partner:18343 BRANCH=none TEST=manual Renaming only. There should be no change in observed behavior. Change-Id: I5427c26290572133f060b6cf0d9ebea5015adba1 Signed-off-by: Bill Richardson <wfrichar@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/176176 Reviewed-by: Yung-chieh Lo <yjlou@chromium.org>
* cleanup: Rename and move header filesRandall Spangler2013-10-231-1/+1
| | | | | | | | | | | | | | Device-specific headers belong in driver/ or chip/. The include/ directory should be for common interfaces. Code should not normally need to include driver-specific headers. If it does, it should use the full relative path from the EC project root (for example, drivers/charger/bq24715.h). Change-Id: Id23db37a431e2d802a74ec601db6f69b613352ba Signed-off-by: Randall Spangler <rspangler@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/173746 Reviewed-by: Bill Richardson <wfrichar@chromium.org>
* cleanup: Replace awkward I2C_PORTS_USED macro with constantBill Richardson2013-10-071-1/+1
| | | | | | | | | | | | | | | | | | | | We only used I2C_PORTS_USED to iterate through the list of hardware ports actually in use, but we defined it in board.h at the same place where we matched particular I2C devices to the (possibly shared) buses they're on. This CL makes I2C_PORTS_USED into a global constant, so it can be set automatically where we initialize the ports, and doesn't have to be related to the list of attached devices. BUG=chrome-os-partner:18343 BRANCH=none TEST=manual Build everything, run all tests, should still work. Change-Id: I65f22f5cadfc4b3afe51af48faa5fb369bc3aa09 Signed-off-by: Bill Richardson <wfrichar@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/171884
* Clean up configuring GPIO alternate functionsRandall Spangler2013-08-071-2/+11
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | GPIO alternate functions used to be configured throughout the code, which made it hard to tell which ones you needed to configure yourself in board.c. It also sometimes (chip/lm4/i2c.c) led to GPIOs being configured as alternate functions even if they weren't used on a given board. With this change, every board has a table in board.c which lists ALL GPIOs which have alternate functions. This is now the only place where alternate functions are configured. Each module then calls gpio_init_module() to set up its GPIOs. This also fixes a bug where gpio_set_flags() ignored most of the flags passed to it (only direction and level were actually used). On stm32f, gpio_set_alternate() does not exist, and pins are configured via direct register writes from board.c. Rather than attempt to change that in the same CL, I've stubbed out gpio_set_alternate() for stm32f, and will fix the register writes in a follow-up CL. BUG=chrome-os-partner:21618 BRANCH=peppy (fixes I2C1 being initialized even though those pins are used for other things) TEST=boot link, falco, pit, spring Change-Id: I40f47025d8f767e0723c6b40c80413af9ba8deba Signed-off-by: Randall Spangler <rspangler@chromium.org> Reviewed-on: https://gerrit.chromium.org/gerrit/64400
* Add build-time checks on board-specific array sizes.Bill Richardson2013-07-311-3/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | We've been declaring a bunch of statically-sized arrays: extern struct foo_t foo[FOO_COUNT]; And then initializing them like so: struct foo_t foo[FOO_COUNT] = { /* blah */ }; That only catches cases where we initialize with too many entries. It doesn't catch cases where we haven't initialized enough. This change tests for both cases like so: extern struct foo_t foo[]; struct foo_t foo[] = { /* blah */ }; BUILD_ASSERT(ARRAY_SIZE(foo) == FOO_COUNT); The affected arrays are: adc_channels[ADC_CH_COUNT] gpio_list[GPIO_COUNT] temp_sensors[TEMP_SENSOR_COUNT] x86_signal_list[X86_SIGNAL_COUNT] i2c_ports[I2C_PORTS_USED] BUG=chrome-os-partner:18343 BRANCH=falco,peppy TEST=build all platforms All platforms should still build, all tests should still pass. Change-Id: Ibb16dc3201f32df7cdc875648e89ba4ffb09f733 Signed-off-by: Bill Richardson <wfrichar@chromium.org> Reviewed-on: https://gerrit.chromium.org/gerrit/63833 Reviewed-by: Randall Spangler <rspangler@chromium.org>
* Remove unneeded direct includes of board.h and config.hRandall Spangler2013-07-161-1/+0
| | | | | | | | | | | | | | | | | | | | | Both of these are included via common.h, which is in turn included by most other header files. Directly including board.h or config.h is redundant and discouraged. No code changes, just removing #includes. This is in preparation for making a top-level config.h file, but that change will be easier to review if it doesn't touch as many files. BUG=chrome-os-partner:18343 BRANCH=none TEST=build all platforms Change-Id: I204bcebe5607c6e6808821eb071cfc31d2a93a7c Signed-off-by: Randall Spangler <rspangler@chromium.org> Reviewed-on: https://gerrit.chromium.org/gerrit/62121 Reviewed-by: Bill Richardson <wfrichar@chromium.org> Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
* Move write protect GPIO handling to flash moduleRandall Spangler2013-05-231-1/+1
| | | | | | | | | | | | | | | | | Write protect signal naming is now consistent across boards. New CONFIG_WP_ACTIVE_HIGH is present on systems where the write protect signal is active-high (e.g. Link). This will be used in the next CL, which moves flash_get_protect() to flash_common.c BUG=chrome-os-partner:15613 BRANCH=none TEST=flashinfo properly reports WP signal status Change-Id: I502ab033c3eb36661cc3ee97320874b3fbf6fc0d Signed-off-by: Randall Spangler <rspangler@chromium.org> Reviewed-on: https://gerrit.chromium.org/gerrit/56087 Reviewed-by: Vic Yang <victoryang@chromium.org>
* Clean up board configurationRandall Spangler2013-04-051-5/+0
| | | | | | | | | | | | | | | | | Board configuration interfaces are now defined in board_config.h, not in every board.h file. Tidied /alphabetized CONFIG defines. No functional changes, just rearranging code. BUG=chrome-os-partner:18343 BRANCH=none TEST=build all targets Change-Id: I6196591784f8fa9ce6dfccd31891b679fb200063 Signed-off-by: Randall Spangler <rspangler@chromium.org> Reviewed-on: https://gerrit.chromium.org/gerrit/47419
* Clean up ADC moduleRandall Spangler2012-10-301-2/+2
| | | | | | | | | | | | | | ADC config structs are now chip-specific; this saves code size (several hundred bytes on LM4, since no need for 24-entry ADC channel to GPIO mapping table). BUG=chrome-os-partner:15579 BRANCH=none TEST='adc' with system on and off; ChargerCurrent should be bigger when on. Change-Id: Ia88b3f043438bec049f2d2ad39fc42dcf86d9424 Signed-off-by: Randall Spangler <rspangler@chromium.org> Reviewed-on: https://gerrit.chromium.org/gerrit/36798
* Snow must assert ENTERING_RW GPIO when jumping between imagesRandall Spangler2012-08-301-0/+1
| | | | | | | | | | | | | | | | BUG=chrome-os-partner:13439 BRANCH=snow TEST=manual 1. Ctrl+Refresh+Esc; should go to INSERT screen 2. Ctrl+D; should show TODEV (this confirms it's still possible to get into dev mode the right way) 3. From EC console, 'sysjump rw' 4. Ctrl+D; should NOT show TODEV (this confirms the bug is fixed) Change-Id: Ic4879cb0a7fc47527eac1a5a727f3225744ff880 Signed-off-by: Randall Spangler <rspangler@chromium.org> Reviewed-on: https://gerrit.chromium.org/gerrit/31932
* Add a list of I2C portsRandall Spangler2012-05-171-4/+10
| | | | | | | | | | | | | | | | | This cleans up I2C init and debug commands across boards. Signed-off-by: Randall Spangler <rspangler@chromium.org> BUG=none TEST=on link and bds: i2cscan lightbar run powerbtn (to power on system) temps (to read i2c temp sensors) battery (to read battery) charger (to read charger) Change-Id: If3fb0cdb8d3178592bf68cbb2e72bc4b7f71dec5
* Disable unused BDS functionalityRandall Spangler2012-05-171-60/+2
| | | | | | | | | | | | | This was used on the hybrid Badger-Lumpy systems for one-off testing. It wouldn't necessarily work on a bare Badger board, and maintaining it resulted in frequent build breaks. Signed-off-by: Randall Spangler <rspangler@chromium.org> BUG=none TEST=build link, bds, daisy; boot link and bds Change-Id: Ib64ccad9f38d76832ab57f7254dbf32f3d5e4a5e
* Add AC state change hookRandall Spangler2012-05-171-0/+1
| | | | | | | | | | | | | | And start wiring to x86_power so it can detect AC state changes (needed to enable/disable turbo). *YES*, this compiles for BDS/Daisy now... Signed-off-by: Randall Spangler <rspangler@chromium.org> BUG=chrome-os-partner:9069 TEST=plug/unplug AC power and look for "x86 AC on" / "x86 AC off" in debug log Change-Id: I8399fab9637d6635a1c615f07448fd45b86bc25f
* Enable vboot for BDS too.Bill Richardson2012-05-151-1/+2
| | | | | | | | | | | | | | The recovery switch is the DOWN button. BUG=none TEST=manual Install on BDS, open console. Press the reset button, it should boot to firmware A. Hold the DOWN button, press the reset button. It should stay in RO. Change-Id: I82f72a56df463c7cc67bde7e09f3be1545c76129 Signed-off-by: Bill Richardson <wfrichar@chromium.org>
* Drop DPWROK when system is off for more than 10 secrelease-R20-2268.BRandall Spangler2012-05-091-1/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | This saves ~70mw of power. To make this work, I also had to stretch the power button signal to give the system a chance to come back up when the user taps the power button. Signed-off-by: Randall Spangler <rspangler@chromium.org> BUG=chrome-os-partner:9574 TEST=manual For each of the following tests, wait ~15 sec after the system is powered off to give it a chance to drop DPWROK. 1) tap power button -> system turns on 2) hold power button 1 sec -> system turns on 3) open lid -> system turns on 4) silego reset (power+refresh, or power+esc on proto1) -> system stays off 5) silego recovery (power+esc+refresh) -> system turns on 6) hold down power button and type 'reboot' on EC console -> system turns on 7) type 'powerbtn' on EC console -> system turns on Change-Id: I781cf3e665104192521b7fb9ff75a3c3e7f43464
* Invert write protect signalRandall Spangler2012-04-041-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | Write protect is active-high, not active-low. Signed-off-by: Randall Spangler <rspangler@chromium.org> BUG=chrome-os-partner:8580 TEST=manual From chroot: dut-control fw_wp_en:on dut-control mfg_mode:on From console: gpioget WRITE_PROTECT 0 WRITE_PROTECT From chroot: dut-control fw_wp_en:on dut-control mfg_mode:off From console: gpioget WRITE_PROTECT 1 WRITE_PROTECT Change-Id: I81c7858cac43c6c9b8630bf7f5aa0f491e6554ad
* lightbar: add reset GPIOBill Richardson2012-04-031-0/+1
| | | | | | | | | | | | | | | | | | De-assert the lightbar reset GPIO to be able to access its registers. According to the HW guys, it will consume less power in standby than in reset due the pull-up on the reset line. Signed-off-by: Bill Richardson <wfrichar@chromium.org> BUG=None TEST=manual On Link proto-1, type "lightbar test" in the EC console and see it blink. On BDS, just build it. Nothing actually changes for BDS. Change-Id: I9ec612c80f48d41ccf779f0962fc047966d4b7ba
* Tidy ADC channel definitionsRandall Spangler2012-03-191-1/+4
| | | | | | | | | | | We moved a while ago to a table of ADC channels, so having a meaningless constant defined in board.h is more harmful than helpful. BUG=none TEST=build link, bds Change-Id: I651a609c9ed13f879bb943c90731275407d77e50 Signed-off-by: Randall Spangler <rspangler@chromium.org>
* Fix test buildVincent Palatin2012-03-151-0/+4
| | | | | | | | | | | Allow to build without the power button task. Signed-off-by: Vincent Palatin <vpalatin@chromium.org> BUG=None TEST=make qemu-tests Change-Id: Ibc757a6641f195f0d10e6a673792b996694f8cec
* Add wake signal to PCHRandall Spangler2012-03-151-1/+1
| | | | | | | | | | | | | | | | | | | | | | This works similar to SCI/SMI events, but triggers a separate level-sensitive signal to the PCH instead. Signed-off-by: Randall Spangler <rspangler@chromium.org> BUG=chrome-os-partner:8514 TEST=manual From EC console: gpioget PCH_WAKEn --> should be 1 hostevent wake 0x1 close lid switch (with magnet) hostevent -> should show wake mask 0x1, raw events 0x1 gpioget PCH_WAKEn --> should be 0 hostevent clear 0x1 hostevent -> should show raw events 0 gpioget PCH_WAKEn --> should be 1 Change-Id: I29832c1dc30239a98987578f07dfeb25791dde11
* Update LPC mapped switch states with write protect and recovery statesRandall Spangler2012-03-071-0/+2
| | | | | | | | | | | | | | | | | | | | | | Signed-off-by: Randall Spangler <rspangler@chromium.org> BUG=chrome-os-partner:8325 TEST=manual Boot system with lid open. 'ectool switches' should show lid open. Use 'dut-control goog_rec_mode:on'. 'ectool switches should show dedicated recovery signal on.' Use 'dut-control goog_rec_mode:off'. 'ectool switches should show dedicated recovery signal off.' Disable write protect via screw. 'ectool switches' should show WP signal disabled. Boot system in recovery mode (power+esc+reload). Should show 0x09. Change-Id: I0434427c4b5f8c07c02a8714618f7eb101b86fed
* Only send power button pulse on lid-open when main chipset is offRandall Spangler2012-03-051-0/+10
| | | | | | | | | | | | | Signed-off-by: Randall Spangler <rspangler@chromium.org> BUG=chrome-os-partner:8324 TEST=manual 1. When system is off, open lid. Debug console should show PB PCH pwrbtn activity. 2. Wait for system to boot. 3. Quickly close and open lid. Debug console should not show pwrbtn activity. Change-Id: Ia018ff06a31ac2a68f20021d17e47ddb06096eb8
* Add SMI/SCI supportRandall Spangler2012-03-051-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | BUG=chrome-os-partner:8277 TEST=manual On EC console: hostevent set 0x1e From root shell: ectool eventget --> should return 0x1e ectool eventclear 0x02 ectool eventget --> should return 0x1c ectool queryec --> should return event 3 ectool queryec --> should return event 4 ectool queryec --> should return event 5 ectool queryec --> should return no event pending ectool eventsetsmimask 0x1200 ectool eventsetscimask 0x0034 ectool eventgetsmimask --> should return 0x1200 ectool eventgetscimask --> should return 0x0034 On EC console: hostevent --> should show raw=0 SMI mask = 0x1200 SCI mask = 0x34 Change-Id: I33042fa80c0b148cd63209a94a184af493e25ed3
* Fix a typo that cause compilation fail on BDSVic Yang2012-02-021-1/+1
| | | | | | | BUG=none TEST=compile for BDS succeded. Change-Id: I7790e2e5c2f2c9662a1c7b1fcf7a7442759a8653
* Refactor ADC code and add Link charger current ADC supportVic Yang2012-02-021-0/+19
| | | | | | | | | | | Refactor ADC code and move board/chip-specific part to corresponding directories. Implement function and console command to read Link charger current. BUG=chrome-os-partner:7527 TEST=Read EC temperature and POT input on BDS. Change-Id: I7fafd310ea49d9b2781f10c3453f5488da29a08a
* Add x86 power state machineRandall Spangler2012-01-171-1/+26
| | | | | | | | | | | For bringup, this powers on the x86 unconditionally. Signed-off-by: Randall Spangler <rspangler@chromium.org> BUG=chrome-os-partner:7528 TEST=none Change-Id: Ib23e56d38ab42f8d8a4dbd1ba9dce12f0c3eeec9
* Move board-specific GPIO lists to board-specific filesRandall Spangler2012-01-121-2/+21
| | | | | | | | | Signed-off-by: Randall Spangler <rspangler@chromium.org> BUG=chrome-os-partner:7528 TEST=none Change-Id: I47fd5d709a9575e41fdcdf21a7440ebbb762cef5
* Add constants for all GPIOs.Randall Spangler2012-01-111-20/+0
| | | | | | | | | Signed-off-by: Randall Spangler <rspangler@chromium.org> BUG=chrome-os-partner:7528 TEST=none Change-Id: I3b77cbbb7f0cc12a4daae7ababd603b5d7af32d1
* Add JTAG moduleRandall Spangler2012-01-111-34/+0
| | | | | | | | | | | This just ensures the JTAG pins are reset to JTAG function on warm reboot. Signed-off-by: Randall Spangler <rspangler@chromium.org> BUG=chrome-os-partner:7448 TEST=none Change-Id: I0cccdbe7a68c228db7f354898ed30598e9fabff0
* Change register.h macros to use inline funcs without concatenate (##).Randall Spangler2011-12-131-22/+26
| | | | | | | | | Signed-off-by: Randall Spangler <rspangler@chromium.org> BUG=none TEST=none Change-Id: Ia8c54bfeff2351e8f76d97db558952a9d2ca9a45
* Initial sources import 3/3Vincent Palatin2011-12-071-0/+63
source files mainly done by Vincent. Signed-off-by: Vincent Palatin <vpalatin@chromium.org> Change-Id: Ic2d1becd400c9b4b4a14d4a243af1bdf77d9c1e2
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