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* ish: Trim down the release branchstabilize-wristpin-14469.59.B-ishstabilize-voshyr-14637.B-ishstabilize-quickfix-14695.187.B-ishstabilize-quickfix-14695.124.B-ishstabilize-quickfix-14526.91.B-ishstabilize-14695.85.B-ishstabilize-14695.107.B-ishstabilize-14682.B-ishstabilize-14633.B-ishstabilize-14616.B-ishstabilize-14589.B-ishstabilize-14588.98.B-ishstabilize-14588.14.B-ishstabilize-14588.123.B-ishstabilize-14536.B-ishstabilize-14532.B-ishstabilize-14528.B-ishstabilize-14526.89.B-ishstabilize-14526.84.B-ishstabilize-14526.73.B-ishstabilize-14526.67.B-ishstabilize-14526.57.B-ishstabilize-14498.B-ishstabilize-14496.B-ishstabilize-14477.B-ishstabilize-14469.9.B-ishstabilize-14469.8.B-ishstabilize-14469.58.B-ishstabilize-14469.41.B-ishstabilize-14442.B-ishstabilize-14438.B-ishstabilize-14411.B-ishstabilize-14396.B-ishstabilize-14395.B-ishstabilize-14388.62.B-ishstabilize-14388.61.B-ishstabilize-14388.52.B-ishstabilize-14385.B-ishstabilize-14345.B-ishstabilize-14336.B-ishstabilize-14333.B-ishrelease-R99-14469.B-ishrelease-R98-14388.B-ishrelease-R102-14695.B-ishrelease-R101-14588.B-ishrelease-R100-14526.B-ishfirmware-cherry-14454.B-ishfirmware-brya-14505.B-ishfirmware-brya-14505.71.B-ishfactory-kukui-14374.B-ishfactory-guybrush-14600.B-ishfactory-cherry-14455.B-ishfactory-brya-14517.B-ishJack Rosenthal2021-11-055-144/+0
| | | | | | | | | | | | | | | | | | | | | | In the interest of making long-term branch maintenance incur as little technical debt on us as possible, we should not maintain any files on the branch we are not actually using. This has the added effect of making it extremely clear when merging CLs from the main branch when changes have the possibility to affect us. The follow-on CL adds a convenience script to actually pull updates from the main branch and generate a CL for the update. BUG=b:204206272 BRANCH=ish TEST=make BOARD=arcada_ish && make BOARD=drallion_ish Signed-off-by: Jack Rosenthal <jrosenth@chromium.org> Change-Id: I17e4694c38219b5a0823e0a3e55a28d1348f4b18 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3262038 Reviewed-by: Jett Rink <jettrink@chromium.org> Reviewed-by: Tom Hughes <tomhughes@chromium.org>
* adc: Remove adc_chip.h where adc.h is usedCaveh Jalali2021-08-271-1/+0
| | | | | | | | | | | | | | This removes the use of adc_chip.h where adc.h is also used. In this case, adc_chip.h is redundant. BRANCH=none BUG=b:181271666 TEST=buildall passes Change-Id: Id7baf9aef949447a4d47934242f9bae97c971262 Signed-off-by: Caveh Jalali <caveh@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3120317 Reviewed-by: Keith Short <keithshort@chromium.org>
* COIL: Rename CONFIG_I2C_CONTROLLERDiana Z2020-11-051-1/+1
| | | | | | | | | | | | | Rename CONFIG_I2C_CONTROLLER and related comments. BRANCH=None BUG=None TEST=make -j buildall Signed-off-by: Diana Z <dzigterman@chromium.org> Change-Id: Ied6a1829bf54a5c9a32e6772982a4b8aa31aaf23 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2518659 Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org>
* LICENSE: remove unnecessary (c) after CopyrightTom Hughes2019-06-195-5/+5
| | | | | | | | | | | | | | | | Ran the following command: git grep -l 'Copyright (c)' | \ xargs sed -i 's/Copyright (c)/Copyright/g' BRANCH=none BUG=none TEST=make buildall -j Change-Id: I6cc4a0f7e8b30d5b5f97d53c031c299f3e164ca7 Signed-off-by: Tom Hughes <tomhughes@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1663262 Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org> Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
* ec.tasklist: Consolidate duplicate commentsDaisuke Nojiri2019-04-081-11/+1
| | | | | | | | | | | | | | | | | | | | | | | It's simply a bad idea to describe a macro in multiple locations. It'll make it hard to change. It'll be difficult to keep all locations in sync. This patch replaces the comment duplicated in all ec.tasklist with a pointer to the CONFIG_TASK_LIST definition. The macro will be described in a single place (just like all/most other macros). Signed-off-by: Daisuke Nojiri <dnojiri@chromium.org> BUG=none BRANCH=none TEST=buildall Change-Id: Id658b9d68e742e4334c692b804d9c98c8de21313 Reviewed-on: https://chromium-review.googlesource.com/1551579 Commit-Ready: ChromeOS CL Exonerator Bot <chromiumos-cl-exonerator@appspot.gserviceaccount.com> Tested-by: Daisuke Nojiri <dnojiri@chromium.org> Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org> Reviewed-by: Jett Rink <jettrink@chromium.org>
* cleanup: remove transition code for LPC/ESPI cleanupJett Rink2018-05-231-1/+0
| | | | | | | | | | | BRANCH=none BUG=chromium:818804 TEST=full stack works with lpc and espi Change-Id: I371e993bc97e7e87fb1075cf3dba82082402c0cf Signed-off-by: Jett Rink <jettrink@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/1067504 Reviewed-by: Randall Spangler <rspangler@chromium.org>
* lpc: convert LPC only boards to use CONFIG_HOSTCMD_LPCJett Rink2018-05-221-1/+2
| | | | | | | | | | | BRANCH=none BUG=chromium:818804 TEST=Full stack builds and works on yorp (espi) and grunt (lpc) Change-Id: I4a70e10c34d79361ceada1ff40b8912b8a6fdaa7 Signed-off-by: Jett Rink <jettrink@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/1067500 Reviewed-by: Randall Spangler <rspangler@chromium.org>
* Remove Makefile symlinks under board directoryDaisuke Nojiri2016-07-091-1/+0
| | | | | | | | | | | | | | | | | | | | | | | | This feature is inconsistent. Not all boards have such a symlink (for a obvious reason). This feature is fragile. It's most likely not tested and going to be broken if not already. Developers won't like it if they have to test two different ways to build boards before submitting patches. This feature is not necessary. If you build EC in the standard way (e.g. make BOARD=samus), these symlinks are not needed. This feature is wasteful. Extra disk spaces are used and extra lines are added to Makefile (increasing code complexity slightly). BUG=chromium:626776 BRANCH=none TEST=make buildall Change-Id: Id5444284d773cb0e9225f39abd877441b8f61440 Signed-off-by: Daisuke Nojiri <dnojiri@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/359321 Reviewed-by: Randall Spangler <rspangler@chromium.org>
* cleanup: Add warning comment to gpio.inc filesBill Richardson2016-02-251-0/+3
| | | | | | | | | | | | | | | | | | | | | | | With commit e9883124ff16, a GPIO_INT macro was added. That change also required that all instances of GPIO_INT in a board's gpio.inc file come before any GPIO macros, or the interrupt handler wouldn't work properly. This CL just adds a warning comment about requirement to all gpio.inc files. BUG=chromium:471331 BRANCH=none TEST=make buildall, test image on Cr50 This is a change to comments only. There is no new behavior to verify, although I did run try out one new image just to be sure nothing stupid happened. Change-Id: I83f7819929a53bce3a8bae04d15b3ee3bda11738 Signed-off-by: Bill Richardson <wfrichar@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/329334 Reviewed-by: Vadim Bendebury <vbendeb@chromium.org>
* cleanup: Standardize use of CONFIG_I2C and add MASTER/SLAVE CONFIGsShawn Nematbakhsh2015-11-031-0/+2
| | | | | | | | | | | | | | | | | | | Some chips previously defined CONFIG_I2C and others didn't. Standardize the usage by removing CONFIG_I2C from all config_chip files and force it to be defined at the board level. Also, make boards define CONFIG_I2C_MASTER and/or CONFIG_I2C_SLAVE based on the I2C interfaces they will use - this will assist with some later cleanup. BUG=chromium:550206 TEST=`make buildall -j` BRANCH=None Change-Id: I2f0970e494ea49611abc315587c7c9aa0bc2d14a Signed-off-by: Shawn Nematbakhsh <shawnn@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/310070 Commit-Ready: Shawn N <shawnn@chromium.org> Tested-by: Shawn N <shawnn@chromium.org> Reviewed-by: Alec Berg <alecaberg@chromium.org>
* eoption: Remove unused eeprom option storage codeAnton Staaf2015-09-081-2/+0
| | | | | | | | | | | | | | | Signed-off-by: Anton Staaf <robotboy@chromium.org> BRANCH=None BUG=None TEST=make buildall -j Change-Id: I2174a904df160d19d47f1aa2d053349356cb4291 Reviewed-on: https://chromium-review.googlesource.com/297805 Commit-Ready: Anton Staaf <robotboy@chromium.org> Tested-by: Anton Staaf <robotboy@chromium.org> Reviewed-by: Aseda Aboagye <aaboagye@chromium.org> Reviewed-by: Randall Spangler <rspangler@chromium.org>
* cleanup: fix all the header guardsBill Richardson2015-06-181-3/+3
| | | | | | | | | | | | | | | This unifies all the EC header files to use __CROS_EC_FILENAME_H as the include guard. Well, except for test/ util/ and extra/ which use __TEST_ __UTIL_ and __EXTRA_ prefixes respectively. BUG=chromium:496895 BRANCH=none TEST=make buildall -j Signed-off-by: Bill Richardson <wfrichar@chromium.org> Change-Id: Iea71b3a08bdec94a11239de810a2b2e152b15029 Reviewed-on: https://chromium-review.googlesource.com/278121 Reviewed-by: Randall Spangler <rspangler@chromium.org>
* mec1322: Simplify GPIO listsSteven Jian2015-05-271-6/+6
| | | | | | | | | | | | | | | Our existing GPIO macros use port# / gpio#, but the concept of different GPIO ports does not exist on the mec1322. Therefore, add new GPIO macros for chips which do not have distinct GPIO ports. BUG=None BRANCH=None TEST=make buildall -j Change-Id: Ibda97c6563ad447d16dab39ecadab43ccb25174b Signed-off-by: Steven Jian <steven.jian@intel.com> Reviewed-on: https://chromium-review.googlesource.com/262841 Reviewed-by: Anton Staaf <robotboy@chromium.org>
* gpio: Refactor IRQ handler pointer out of gpio_listAseda Aboagye2015-04-101-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | In the gpio_info struct, we had a irq_handler pointer defined even though a majority of the GPIOs did not have irq handlers associated. By removing the irq_handler pointer out of the struct, we can save some space with some targets saving more than others. (For example, ~260 bytes for samus_pd). This change also brings about a new define: GPIO_INT(name, port, pin, flags, signal) And the existing GPIO macro has had the signal parameter removed since they were just NULL. GPIO(name, port, pin, flags) In each of the gpio.inc files, all the GPIOs with irq handlers must be defined at the top of the file. This is because their enum values from gpio_signal are used as the index to the gpio_irq_handlers table. BUG=chromium:471331 BRANCH=none TEST=Flashed ec to samus and samus_pd, verified lightbar tap, lid, power button, keyboard, charging, all still working. TEST=Moved a GPIO_INT declaration after a GPIO declaration and watched the build fail. TEST=make -j BOARD=peppy tests TEST=make -j BOARD=auron tests TEST=make -j BOARD=link tests Change-Id: Id6e261b0a3cd63223ca92f2e96a80c95e85cdefb Signed-off-by: Aseda Aboagye <aaboagye@google.com> Reviewed-on: https://chromium-review.googlesource.com/263973 Reviewed-by: Randall Spangler <rspangler@chromium.org> Tested-by: Aseda Aboagye <aaboagye@chromium.org> Commit-Queue: Aseda Aboagye <aaboagye@chromium.org> Trybot-Ready: Aseda Aboagye <aaboagye@chromium.org> Reviewed-by: Alec Berg <alecaberg@chromium.org>
* Makefile: Add support for per-board symlinks to top levelAnton Staaf2014-07-301-0/+1
| | | | | | | | | | | | | | | | | | | | | | | Previously if you were working on a single board you had to add BOARD= to all of your make command lines. Now if you are in a board directory you can just use "make", or "make clean", or any other top level make command. This commit also adds support for a top level "make flash" command that can be used from the board directories as well. This command uses openocd and requires that the board provides an openocd-flash.cfg file. Signed-off-by: Anton Staaf <robotboy@chromium.org> BRANCH=none TEST=(from a few board directories) make clean; make -j (from the discovery-stm32f072 directory) make flash Change-Id: Ie09a74881371169a2c3cd9cd9922f39f4873f1a6 Reviewed-on: https://chromium-review.googlesource.com/209669 Tested-by: Anton Staaf <robotboy@chromium.org> Reviewed-by: Bill Richardson <wfrichar@chromium.org> Commit-Queue: Anton Staaf <robotboy@chromium.org>
* GPIO: Move definition of alternate functions to gpio.incAnton Staaf2014-07-172-9/+5
| | | | | | | | | | | | | | | | | | | | | This is a straightforward conversion of existing tables into X-Macro style definitions for the GPIO alternate functions. This change in itself, is not particularly powerful, but having all GPIO settings in a single file makes a board easier to understand. Signed-off-by: Anton Staaf <robotboy@chromium.org> BRANCH=none TEST=make buildall -j Followed by manual testing of interrupt on change and UART functionality on STM32F0 based discovery board. Change-Id: Ib7f1f014f4bd289d7c0ac3100470ba2dc71ca579 Reviewed-on: https://chromium-review.googlesource.com/207987 Reviewed-by: Randall Spangler <rspangler@chromium.org> Tested-by: Anton Staaf <robotboy@chromium.org> Commit-Queue: Anton Staaf <robotboy@chromium.org>
* gpio: Replace duplication in gpio declarations with X-macro fileAnton Staaf2014-06-263-24/+19
| | | | | | | | | | | | | | | | | | | | | Previously each board.h and board.c contained an enum and an array for gpio definitons that had to be manually kept in sync, with no compiler assistance other than that their lengths matched. This change adds a single gpio.inc file that declares all gpio's that a board uses and is used as an X-macro include file to generate both the gpio_signal enum and the gpio_list array. Signed-off-by: Anton Staaf <robotboy@chromium.org> BRANCH=none TEST=make buildall -j Change-Id: If9c9feca968619a59ff9f20701359bcb9374e4da Reviewed-on: https://chromium-review.googlesource.com/205354 Tested-by: Anton Staaf <robotboy@chromium.org> Reviewed-by: Vincent Palatin <vpalatin@chromium.org> Commit-Queue: Anton Staaf <robotboy@chromium.org>
* cleanup: Remove checkpatch warningsRandall Spangler2013-12-192-5/+7
| | | | | | | | | | | | | | | | This make minor syntactic changes and renames some camel-cased symbols to keep checkpatch from complaining. The goal is to reduce the temptation to use 'repo upload --no-verify'. This is a big furball of find/replace, but no functional changes. BUG=chromium:322144 BRANCH=none TEST=build all boards; pass unit tests Change-Id: I0269b7dd95836ef9a6e33f88c003ab0f24f842a0 Signed-off-by: Randall Spangler <rspangler@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/180495
* Specify I2C channels physically, not arbitrarilytest-4824.BBill Richardson2013-11-111-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | In board.c, we initialize this struct: struct i2c_port_t { const char *name; /* Port name */ int port; /* Port */ int kbps; /* Speed in kbps */ }; extern const struct i2c_port_t i2c_ports[]; The port field refers to the physical I2C bus on the EC. Meanwhile, in board.h, we've identified the bus where each I2C device is attached: Up until this CL, we've been picking one of those device-to-bus macros to initialize port fields of the i2c_ports[] array. That's wrong and confusing. This change specifies the physical channel with the physical number. BUG=chrome-os-partner:18343 BRANCH=none TEST=manual Renaming only. There should be no change in observed behavior. Change-Id: I5427c26290572133f060b6cf0d9ebea5015adba1 Signed-off-by: Bill Richardson <wfrichar@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/176176 Reviewed-by: Yung-chieh Lo <yjlou@chromium.org>
* cleanup: Consolidate module IDs into a single shared enumRandall Spangler2013-10-251-7/+0
| | | | | | | | | | | | | | | | | | This is tidier than every board defining its own module_id enum, and encourages standard naming of modules. A subsequent CL will do more cleanup (standardizing on MODULE_LED instead of MODULE_POWER_LED and MODULE_LED_KIRBY), but it's easier to do that as a separate CL than part of this one. BUG=chrome-os-partner:18343 BRANCH=none TEST=build all platforms; pass unit tests Change-Id: If0fcef284fb3aa2fa145bc9ff3d1f3f2d25a2e47 Signed-off-by: Randall Spangler <rspangler@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/174382 Reviewed-by: Bill Richardson <wfrichar@chromium.org>
* cleanup: Rename and move header filesRandall Spangler2013-10-231-1/+1
| | | | | | | | | | | | | | Device-specific headers belong in driver/ or chip/. The include/ directory should be for common interfaces. Code should not normally need to include driver-specific headers. If it does, it should use the full relative path from the EC project root (for example, drivers/charger/bq24715.h). Change-Id: Id23db37a431e2d802a74ec601db6f69b613352ba Signed-off-by: Randall Spangler <rspangler@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/173746 Reviewed-by: Bill Richardson <wfrichar@chromium.org>
* cleanup: Replace awkward I2C_PORTS_USED macro with constantBill Richardson2013-10-072-3/+1
| | | | | | | | | | | | | | | | | | | | We only used I2C_PORTS_USED to iterate through the list of hardware ports actually in use, but we defined it in board.h at the same place where we matched particular I2C devices to the (possibly shared) buses they're on. This CL makes I2C_PORTS_USED into a global constant, so it can be set automatically where we initialize the ports, and doesn't have to be related to the list of attached devices. BUG=chrome-os-partner:18343 BRANCH=none TEST=manual Build everything, run all tests, should still work. Change-Id: I65f22f5cadfc4b3afe51af48faa5fb369bc3aa09 Signed-off-by: Bill Richardson <wfrichar@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/171884
* Refactor PWM moduleVic Yang2013-08-271-0/+4
| | | | | | | | | | | | | | | | | | | | This unifies the PWM module interface for LM4 and STM32. Now PWM channels are defined in board.h/board.c. Instead of calling functions named pwm_set_fan_duty(x), one can now use pwm_set_duty(PWM_CH_FAN, x), which prevents additional functions added when we have a new PWM channel. BUG=chrome-os-partner:18343 TEST=Limit input current on Spring. TEST=Check power LED in S0/S3/S5 on Snow. TEST=Check keyboard backlight functionality on Link. TEST=Check fan speed control/detecting on Link. BRANCH=None Change-Id: Ibac4d79f72e65c94776d503558a7592f7db859dc Signed-off-by: Vic Yang <victoryang@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/64450 Reviewed-by: Randall Spangler <rspangler@chromium.org>
* Lock BOOTCFG to safe values for all LM4sBill Richardson2013-08-211-4/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The BOOTCFG register configures a couple of important things: whether to allow jumping into the builtin ROM bootloader at reset, and whether or not to allow JTAG access for programing and debugging. The default is "no" and "yes". But the BOOTCFG register can be locked so that it can't be changed again, which means that if the wrong values are put into it, the system is pretty much bricked. On Link, we wrote a BOOTCFG value that allowed a GPIO to be used as a bypass to optionally trigger the ROM bootloader, but on Slippy and its derivatives that GPIO is not pulled up. If you program the Link values into BOOTCFG on a Slippy, the system is stuck in the ROM bootloader more or less forever. This change disables that GPIO, keeps JTAG enabled, and locks those settings for all LM4 chips (it's a chip config now, not a board config). We've never actually used the GPIO to invoke the ROM bootloader, but we have managed to brick a number of systems just by having it enabled, so we're going to lock it into a safe configuration now. BUG=chrome-os-partner:19247 BRANCH=falco,peppy TEST=manual Reflash, boot, power cycle (actually unplug the EC from AC and battery) a few times. It should continue to work. Change-Id: Iaf1a81d6814104421a56425490e3d5164ea9b617 Signed-off-by: Bill Richardson <wfrichar@chromium.org> Reviewed-on: https://gerrit.chromium.org/gerrit/66538 Reviewed-by: Aaron Durbin <adurbin@chromium.org> Reviewed-by: Duncan Laurie <dlaurie@chromium.org> Reviewed-by: Randall Spangler <rspangler@chromium.org>
* Clean up configuring GPIO alternate functionsRandall Spangler2013-08-072-6/+20
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | GPIO alternate functions used to be configured throughout the code, which made it hard to tell which ones you needed to configure yourself in board.c. It also sometimes (chip/lm4/i2c.c) led to GPIOs being configured as alternate functions even if they weren't used on a given board. With this change, every board has a table in board.c which lists ALL GPIOs which have alternate functions. This is now the only place where alternate functions are configured. Each module then calls gpio_init_module() to set up its GPIOs. This also fixes a bug where gpio_set_flags() ignored most of the flags passed to it (only direction and level were actually used). On stm32f, gpio_set_alternate() does not exist, and pins are configured via direct register writes from board.c. Rather than attempt to change that in the same CL, I've stubbed out gpio_set_alternate() for stm32f, and will fix the register writes in a follow-up CL. BUG=chrome-os-partner:21618 BRANCH=peppy (fixes I2C1 being initialized even though those pins are used for other things) TEST=boot link, falco, pit, spring Change-Id: I40f47025d8f767e0723c6b40c80413af9ba8deba Signed-off-by: Randall Spangler <rspangler@chromium.org> Reviewed-on: https://gerrit.chromium.org/gerrit/64400
* Add build-time checks on board-specific array sizes.Bill Richardson2013-07-311-3/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | We've been declaring a bunch of statically-sized arrays: extern struct foo_t foo[FOO_COUNT]; And then initializing them like so: struct foo_t foo[FOO_COUNT] = { /* blah */ }; That only catches cases where we initialize with too many entries. It doesn't catch cases where we haven't initialized enough. This change tests for both cases like so: extern struct foo_t foo[]; struct foo_t foo[] = { /* blah */ }; BUILD_ASSERT(ARRAY_SIZE(foo) == FOO_COUNT); The affected arrays are: adc_channels[ADC_CH_COUNT] gpio_list[GPIO_COUNT] temp_sensors[TEMP_SENSOR_COUNT] x86_signal_list[X86_SIGNAL_COUNT] i2c_ports[I2C_PORTS_USED] BUG=chrome-os-partner:18343 BRANCH=falco,peppy TEST=build all platforms All platforms should still build, all tests should still pass. Change-Id: Ibb16dc3201f32df7cdc875648e89ba4ffb09f733 Signed-off-by: Bill Richardson <wfrichar@chromium.org> Reviewed-on: https://gerrit.chromium.org/gerrit/63833 Reviewed-by: Randall Spangler <rspangler@chromium.org>
* Clean up more config optionsRandall Spangler2013-07-241-1/+4
| | | | | | | | | | | | No functional changes, just renaming config options. BUG=chrome-os-partner:18343 BRANCH=none TEST=build all platforms Change-Id: I65b310b670e61bcb3531c581dfc57625df064df2 Signed-off-by: Randall Spangler <rspangler@chromium.org> Reviewed-on: https://gerrit.chromium.org/gerrit/63248
* Clean up and document UART config optionsRandall Spangler2013-07-241-3/+2
| | | | | | | | | | | | No functional changes, just renaming config options. BUG=chrome-os-partner:18343 BRANCH=none TEST=build all platforms Change-Id: I91584cb1f8990dd0f980abd32c04465a66243e71 Signed-off-by: Randall Spangler <rspangler@chromium.org> Reviewed-on: https://gerrit.chromium.org/gerrit/63244
* Clean up debug config optionsRandall Spangler2013-07-231-5/+0
| | | | | | | | | | | | | | | | | All of these were defined on all but a few platforms, and those explicitly #undef them. So define them as enabled by default in config.h so the board.h files are cleaner. No functional changes; just rearranging/renaming config constants. BUG=chrome-os-partner:18343 BRANCH=none TEST=build all platforms; FEATURES=test emerge-falco chromeos-ec Change-Id: I1201a1472ae29641e9e219c2a0347691ca64cd28 Signed-off-by: Randall Spangler <rspangler@chromium.org> Reviewed-on: https://gerrit.chromium.org/gerrit/63102 Reviewed-by: Vic Yang <victoryang@chromium.org>
* Split x86 power button logic out of switch.cRandall Spangler2013-07-171-0/+3
| | | | | | | | | | | | | | | | | | | | | | Power button logic is common across all platforms and is not LM4-specific, so move it to its own module. Switch.c will eventually be moving to common/ and will common across all platforms (not just x86), and splitting out the x86 power button logic is needed before that too. BUG=chrome-os-partner:18343 BRANCH=none TEST=manual 1) power on system with both lid and power button. 2) power+refresh -> reboots 3) power+refresh+esc -> recovery mode 4) power+refresh+downarrow -> reboots, AP stays off 5) toggling recovery GPIO via servo should generate SW debug output showing bit 0x10 toggling Change-Id: I07714e2c035dceece66f90407983397d2697e7d5 Signed-off-by: Randall Spangler <rspangler@chromium.org> Reviewed-on: https://gerrit.chromium.org/gerrit/61780
* Remove unneeded direct includes of board.h and config.hRandall Spangler2013-07-161-1/+0
| | | | | | | | | | | | | | | | | | | | | Both of these are included via common.h, which is in turn included by most other header files. Directly including board.h or config.h is redundant and discouraged. No code changes, just removing #includes. This is in preparation for making a top-level config.h file, but that change will be easier to review if it doesn't touch as many files. BUG=chrome-os-partner:18343 BRANCH=none TEST=build all platforms Change-Id: I204bcebe5607c6e6808821eb071cfc31d2a93a7c Signed-off-by: Randall Spangler <rspangler@chromium.org> Reviewed-on: https://gerrit.chromium.org/gerrit/62121 Reviewed-by: Bill Richardson <wfrichar@chromium.org> Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
* Move write protect GPIO handling to flash moduleRandall Spangler2013-05-232-2/+5
| | | | | | | | | | | | | | | | | Write protect signal naming is now consistent across boards. New CONFIG_WP_ACTIVE_HIGH is present on systems where the write protect signal is active-high (e.g. Link). This will be used in the next CL, which moves flash_get_protect() to flash_common.c BUG=chrome-os-partner:15613 BRANCH=none TEST=flashinfo properly reports WP signal status Change-Id: I502ab033c3eb36661cc3ee97320874b3fbf6fc0d Signed-off-by: Randall Spangler <rspangler@chromium.org> Reviewed-on: https://gerrit.chromium.org/gerrit/56087 Reviewed-by: Vic Yang <victoryang@chromium.org>
* LM4: Support configurable host UART interfaceDuncan Laurie2013-05-131-1/+3
| | | | | | | | | | | | | | | | | | | | | | | Slippy uses UART2 instead of UART1 and so the EC needs to be able to tolerate having the host use a different interface. There are of course many ways to accomplish that but this approach adds two config variables to specify the host uart and the host uart irq. The UART port setup is split out to allow them to be configured separately rather than needing to be adjacent in a for loop. The interrupt functions were renamed (to ec and host) in order to indicate which interface they are responsible for. BUG=chrome-os-partner:19356 BRANCH=none TEST=boot slippy and see host serial output Change-Id: I1913ff3d650f329224c9654eee7bb7412fae5402 Signed-off-by: Duncan Laurie <dlaurie@chromium.org> Reviewed-on: https://gerrit.chromium.org/gerrit/50837
* Specify the LM4 GPIOs to use for UART1Bill Richardson2013-04-241-0/+3
| | | | | | | | | | | | | | | UART0 is the EC console, and it's consistent. UART1 is the AP console that we export via servo. It was connected to a different set of GPIOS on the BDS. BUG=chrome-os-partner:18343 TEST=build link, bds BRANCH=none Change-Id: Ib4c10fd4d2b7a8ffb4e41e216528d4760ba50de3 Signed-off-by: Bill Richardson <wfrichar@chromium.org> Reviewed-on: https://gerrit.chromium.org/gerrit/48975 Reviewed-by: Randall Spangler <rspangler@chromium.org>
* Only includes necessary tasks for test binariesVic Yang2013-04-101-4/+6
| | | | | | | | | | | | | | | | | | | | This changes current TASK() syntax to TASK_BASE() and TASK_NORMAL(), where TASK_BASE is necessary for the EC to boot on a board and TASK_NORMAL represents the task that can be removed in a test binary. Tasks introduced by a test should be listed as TASK_TEST(). Note that this CL breaks current tests (many of them are broken anyway), which will be fixed in up coming CLs. BUG=chrome-os-partner:18598 TEST=Build link/bds/spring/snow/daisy/mccroskey. (mccroskey failed for unrelated issue) BRANCH=none Change-Id: Ic645cdae0906ed21dc473553f1f43c2537ec4bb9 Signed-off-by: Vic Yang <victoryang@chromium.org> Reviewed-on: https://gerrit.chromium.org/gerrit/47531
* Clean up board configurationRandall Spangler2013-04-052-8/+1
| | | | | | | | | | | | | | | | | Board configuration interfaces are now defined in board_config.h, not in every board.h file. Tidied /alphabetized CONFIG defines. No functional changes, just rearranging code. BUG=chrome-os-partner:18343 BRANCH=none TEST=build all targets Change-Id: I6196591784f8fa9ce6dfccd31891b679fb200063 Signed-off-by: Randall Spangler <rspangler@chromium.org> Reviewed-on: https://gerrit.chromium.org/gerrit/47419
* Rename tasks to HOOKS and CHIPSETRandall Spangler2013-03-191-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | Rename tasks TICK -> HOOKS The hooks task handles more than just the TICK hook now. X86POWER -> CHIPSET GAIAPOWER -> CHIPSET Kinda kludgy that the name of the task controls which chipset source gets included. Change this to a CONFIG_CHIPSET_{X86,GAIA} #define to make it easier to support future chipsets. Also, rename the task function to chipset_task() so ec.tasklist is chipset-agnostic. No code changes, just renaming constants and functions. BUG=none BRANCH=none TEST=build bds,link,daisy,snow,spring Change-Id: I163ce1cd27b2d8d030d42bb1f7eb46b880c244fb Signed-off-by: Randall Spangler <rspangler@chromium.org> Reviewed-on: https://gerrit.chromium.org/gerrit/45805
* Watchdog is reloaded by HOOK_TICK, not its own taskRandall Spangler2012-10-301-1/+0
| | | | | | | | | | | | | This reduces memory footprint. BUG=chrome-os-partner:15714 BRANCH=none TEST=system still boots; 'waitms 1500' prints watchdog error dump Change-Id: Ieb0248a34655514b03d919cc36c2b369691da716 Signed-off-by: Randall Spangler <rspangler@chromium.org> Reviewed-on: https://gerrit.chromium.org/gerrit/36937 Reviewed-by: Simon Glass <sjg@chromium.org>
* Add tick taskRandall Spangler2012-10-301-0/+1
| | | | | | | | | | | | | | | | | | | Adds a new HOOK_TICK event which is called every 250ms (LM4) or 500ms (STM32). This will be used to consolidate a number of tasks which do small amounts of work infrequently, and previously needed their own task functions. This CL adds the tick task; subsequent CLs will consolidate watchdog and other tasks into tick hooks. BUG=chrome-os-partner:15714 BRANCH=none TEST=taskinfo shows TICK task as lowest priority Change-Id: I9068ee99d56a5bf5c12afd86ad51998c013f4954 Signed-off-by: Randall Spangler <rspangler@chromium.org> Reviewed-on: https://gerrit.chromium.org/gerrit/36908 Reviewed-by: Simon Glass <sjg@chromium.org>
* Clean up ADC moduleRandall Spangler2012-10-301-2/+2
| | | | | | | | | | | | | | ADC config structs are now chip-specific; this saves code size (several hundred bytes on LM4, since no need for 24-entry ADC channel to GPIO mapping table). BUG=chrome-os-partner:15579 BRANCH=none TEST='adc' with system on and off; ChargerCurrent should be bigger when on. Change-Id: Ia88b3f043438bec049f2d2ad39fc42dcf86d9424 Signed-off-by: Randall Spangler <rspangler@chromium.org> Reviewed-on: https://gerrit.chromium.org/gerrit/36798
* link: disable unused EEPROM modulesRandall Spangler2012-09-121-0/+10
| | | | | | | | | | | | | | | | Haven't found a use for these, so remove to reduce code size (reduces binary by 2KB) / complexity. These are still test-compiled on BDS so they'll be ready if needed. BUG=chrome-os-partner:11232 BRANCH=link TEST=build and boot firmware. 'help' should not show eeread/eewrite commands Change-Id: I0f2e41e21efcbbb0967a5b85b7c8a2ff8147460e Signed-off-by: Randall Spangler <rspangler@chromium.org> Reviewed-on: https://gerrit.chromium.org/gerrit/33112 Reviewed-by: Simon Glass <sjg@chromium.org>
* Switch to variable-size stacksRandall Spangler2012-09-091-4/+5
| | | | | | | | | | | | | | | | | | | | Increase stack size slightly for vboot hash task since the vboot SHA256 function allocates ~300 bytes of stack data. Reduce stack size for watchdog, power LED, and a few other tasks with simple call trees where we can be sure an error path isn't going to blow past the reduced stack. This frees up ~1KB of RAM on STM32. BUG=chrome-os-partner:13814 BRANCH=all TEST=boot system; shmem should show more unused RAM; taskinfo should show tasks still have unused stack Change-Id: I47d6b77564a0180d15d86667cc0566a8919b776e Signed-off-by: Randall Spangler <rspangler@chromium.org> Reviewed-on: https://gerrit.chromium.org/gerrit/32608 Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
* Use new panic stack on all platformsRandall Spangler2012-08-311-1/+0
| | | | | | | | | | | | | | | | Now that the panic stack goes at the end of RAM, there's no overhead to using it on all platforms. When it was a dedicated block of memory, we needed to turn it off on some low-RAM platforms (e.g. Snow). BUG=chrome-os-partner:7466 TEST='crash divzero' or 'crash unaligned'; should print dump and reboot BRANCH=all Change-Id: Iddfeb134e237538215df51abe4e16ee831b3ae2d Signed-off-by: Randall Spangler <rspangler@chromium.org> Reviewed-on: https://gerrit.chromium.org/gerrit/32037 Reviewed-by: Simon Glass <sjg@chromium.org>
* Snow must assert ENTERING_RW GPIO when jumping between imagesRandall Spangler2012-08-302-0/+2
| | | | | | | | | | | | | | | | BUG=chrome-os-partner:13439 BRANCH=snow TEST=manual 1. Ctrl+Refresh+Esc; should go to INSERT screen 2. Ctrl+D; should show TODEV (this confirms it's still possible to get into dev mode the right way) 3. From EC console, 'sysjump rw' 4. Ctrl+D; should NOT show TODEV (this confirms the bug is fixed) Change-Id: Ic4879cb0a7fc47527eac1a5a727f3225744ff880 Signed-off-by: Randall Spangler <rspangler@chromium.org> Reviewed-on: https://gerrit.chromium.org/gerrit/31932
* Remove signature-based vboot supportRandall Spangler2012-08-071-2/+0
| | | | | | | | | | | | | | | | | | | | Superseded by EC software sync (hash-based). Sig-based vboot was correctly implemented, but ended up being too slow to be useful given the limited processing power of the EC chips, and we also couldn't come up with a manageable way to handle A/B autoupdate of signed EC firmware. This change and an associated vboot_reference change shrinks the EC binary by ~2KB. BUG=chrome-os-partner:11232 TEST=build link,snow; boot link and check that 'hash' command still works. Change-Id: I3f03ae2d0a4030977826980d6ec5613181e154c2 Signed-off-by: Randall Spangler <rspangler@chromium.org> Reviewed-on: https://gerrit.chromium.org/gerrit/29496 Reviewed-by: Bill Richardson <wfrichar@chromium.org>
* bitrot: disable VBOOT_SIG for BDS. It's broken.Bill Richardson2012-07-231-1/+1
| | | | | | | | | | | | | | | | | | BDS has been slowly rotting as we make changes for Link. I haven't been able to test the BDS image for some time (I think due to openocd updates that no longer like the BDS configs), and now it doesn't even compile. This is gating the Link schedule, so I'm just turning it off. If we ever need the BDS again, well, what fun. BUG=none TEST=none It already doesn't work, so it should continue to not work. Change-Id: I2b365623903590a56948dfceb986a2300699f541 Signed-off-by: Bill Richardson <wfrichar@chromium.org> Reviewed-on: https://gerrit.chromium.org/gerrit/28181 Reviewed-by: Randall Spangler <rspangler@chromium.org>
* Remove firmware BRandall Spangler2012-07-171-1/+0
| | | | | | | | | | BUG=chrome-os-partner:11449 TEST=build link, snow, bds; ectool reboot_ec cold to make sure enums line up Change-Id: Ie09db2080a00f1a7e2c05579b9b41ea5137c1af0 Signed-off-by: Randall Spangler <rspangler@chromium.org> Reviewed-on: https://gerrit.chromium.org/gerrit/27658 Reviewed-by: Bill Richardson <wfrichar@chromium.org>
* Enable help debug features on all boardsSimon Glass2012-07-041-0/+5
| | | | | | | | | | | | | This ensures that we have all available help enabled. For the moment this is useful for development. We may revisit later. BUG=chrome-os-partner:10895 TEST=manual: build for all boards Change-Id: I721e09995959638660ff417dd9420200e2e1a703 Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-on: https://gerrit.chromium.org/gerrit/26173
* Only one RW image is now the defaultRandall Spangler2012-06-261-0/+5
| | | | | | | | | | | | And if RW B isn't enabled, it's not even linked. BUG=chrome-os-partner:10881 TEST=on link, should be no B image, and 'sysjump B' should fail On BDS, still should be A and B images Signed-off-by: Randall Spangler <rspangler@chromium.org> Change-Id: Icb2af07881cc7e28b9b877f45824486a22fde8d7 Reviewed-on: https://gerrit.chromium.org/gerrit/26116
* Strip out vboot signature code and stay in RO for linkRandall Spangler2012-06-262-1/+2
| | | | | | | | | | | | | | BUG=chrome-os-partner:10880 TEST=boot EC; should stay in RO and not do signature check (verify via debug console output) Signed-off-by: Randall Spangler <rspangler@chromium.org> Change-Id: I831aa91f8273bc7fb1a624cf36d9f21d52d8f3d8 Reviewed-on: https://gerrit.chromium.org/gerrit/26115 Reviewed-by: Bill Richardson <wfrichar@chromium.org> Tested-by: Randall Spangler <rspangler@chromium.org> Commit-Ready: Randall Spangler <rspangler@chromium.org>
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