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* Add a list of I2C portsRandall Spangler2012-05-172-12/+12
| | | | | | | | | | | | | | | | | This cleans up I2C init and debug commands across boards. Signed-off-by: Randall Spangler <rspangler@chromium.org> BUG=none TEST=on link and bds: i2cscan lightbar run powerbtn (to power on system) temps (to read i2c temp sensors) battery (to read battery) charger (to read charger) Change-Id: If3fb0cdb8d3178592bf68cbb2e72bc4b7f71dec5
* Disable unused BDS functionalityRandall Spangler2012-05-176-293/+10
| | | | | | | | | | | | | This was used on the hybrid Badger-Lumpy systems for one-off testing. It wouldn't necessarily work on a bare Badger board, and maintaining it resulted in frequent build breaks. Signed-off-by: Randall Spangler <rspangler@chromium.org> BUG=none TEST=build link, bds, daisy; boot link and bds Change-Id: Ib64ccad9f38d76832ab57f7254dbf32f3d5e4a5e
* Add AC state change hookRandall Spangler2012-05-172-0/+2
| | | | | | | | | | | | | | And start wiring to x86_power so it can detect AC state changes (needed to enable/disable turbo). *YES*, this compiles for BDS/Daisy now... Signed-off-by: Randall Spangler <rspangler@chromium.org> BUG=chrome-os-partner:9069 TEST=plug/unplug AC power and look for "x86 AC on" / "x86 AC off" in debug log Change-Id: I8399fab9637d6635a1c615f07448fd45b86bc25f
* Enable vboot for BDS too.Bill Richardson2012-05-152-2/+3
| | | | | | | | | | | | | | The recovery switch is the DOWN button. BUG=none TEST=manual Install on BDS, open console. Press the reset button, it should boot to firmware A. Hold the DOWN button, press the reset button. It should stay in RO. Change-Id: I82f72a56df463c7cc67bde7e09f3be1545c76129 Signed-off-by: Bill Richardson <wfrichar@chromium.org>
* Enable verified boot for EC firmwareBill Richardson2012-05-101-0/+1
| | | | | | | | | | | | | | | | | | | | BUG=chrome-os-partner:7459 TEST=manual In the chroot: cd src/platform/ec make BOARD=link The firmware image (build/link/ec.bin) is signed with dev-keys. Reflash the EC and try it, and it should verify and reboot into RW A. Additional tests (setting USE_RO_NORMAL, poking random values into VBLOCK_A or FW_MAIN_A to force RW B to run, etc.) are left as an exercise for the reader. I've done them and they work, though. Change-Id: I29a23ea69aef02a11aebd4af3b043f6864723523 Signed-off-by: Bill Richardson <wfrichar@chromium.org>
* Drop DPWROK when system is off for more than 10 secrelease-R20-2268.BRandall Spangler2012-05-091-1/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | This saves ~70mw of power. To make this work, I also had to stretch the power button signal to give the system a chance to come back up when the user taps the power button. Signed-off-by: Randall Spangler <rspangler@chromium.org> BUG=chrome-os-partner:9574 TEST=manual For each of the following tests, wait ~15 sec after the system is powered off to give it a chance to drop DPWROK. 1) tap power button -> system turns on 2) hold power button 1 sec -> system turns on 3) open lid -> system turns on 4) silego reset (power+refresh, or power+esc on proto1) -> system stays off 5) silego recovery (power+esc+refresh) -> system turns on 6) hold down power button and type 'reboot' on EC console -> system turns on 7) type 'powerbtn' on EC console -> system turns on Change-Id: I781cf3e665104192521b7fb9ff75a3c3e7f43464
* Fix test configurations build errorsVincent Palatin2012-04-253-4/+5
| | | | | | | | | | | | | fix small modularity issues to ensure we are able to compile all boards in "tests" configuration. Signed-off-by: Vincent Palatin <vpalatin@chromium.org> BUG=chrome-os-partner:8546 TEST=make BOARD=link tests && make BOARD=bds tests make BOARD=daisy tests && make BOARD=adv tests && make BOARD=discovery tests Change-Id: I9eed0195af6bfd3b47ef74e3cb27966c4365c345
* Use console output instead of uart output for console commandsRandall Spangler2012-04-241-16/+16
| | | | | | | | | | | | This completes console output cleanup. The remaining calls to uart_puts() and uart_printf() actually need to be that way. Signed-off-by: Randall Spangler <rspangler@chromium.org> BUG=chrome-os-partner:7464 TEST=manual Change-Id: Ib1d6d370d30429017b3d11994894fece75fab6ea
* Set BOOTCFG register to test valueRandall Spangler2012-04-241-0/+4
| | | | | | | | | | | | | | Needed for testing preprogramming chips Signed-off-by: Randall Spangler <rspangler@chromium.org> BUG=chrome-os-partner:8769 TEST=manual hibernate 1; should reboot rw 0x400fe1d0; should print: read word 0x400fe1d0 = 0xfffffdfe Change-Id: I95b419d7285a0bf5204f95d1f68f64dc212bb39e
* Support keyboard typematic.Louis Yung-Chieh Lo2012-04-171-0/+1
| | | | | | | | | | Mainly add a typematic task that counts down the delay. Set the initial delay in the keyboard_state_changed() when key pressed and clean it when released. BUS=chrome-os-partner:8463 TEST=press on a particular key and screen shows that key is repeating. Change-Id: Ic8432f8b38b514476588e0b7ad8fdc8a0b0c0b51
* Add preliminary lightbar functionality.Bill Richardson2012-04-121-0/+1
| | | | | | | | | | | | | I need to clean up the console commands and provide the same functionality via ectool, but this is a good starting point. BUG=chrome-os-partner:7839 TEST=manual Power up the CPU. The lights should blink. Change-Id: Ic05a171d2b647551f1cfc7d6b2fd101088cac137 Signed-off-by: Bill Richardson <wfrichar@chromium.org>
* Support dynamically changing the system clockRandall Spangler2012-04-091-3/+0
| | | | | | | | | | | | | | | | | | | | | | | Add nopll command to turn off the PLL, reducing the system clock to 16Mhz. Signed-off-by: Randall Spangler <rspangler@chromium.org> BUG=chrome-os-partner:8798 TEST=manual boot system press power button to boot x86 temps // should print all temperatures timerinfo timerinfo timerinfo // convince yourself this is counting up at about 1MHz nopll // this drops the system clock to 16MHz temps // should still print all temperatures timerinfo timerinfo timerinfo // should still be counting up at about 1MHz Change-Id: Ie29ceb17af348148bffadf63d60c1b731f4c3f6d
* Invert write protect signalRandall Spangler2012-04-042-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | Write protect is active-high, not active-low. Signed-off-by: Randall Spangler <rspangler@chromium.org> BUG=chrome-os-partner:8580 TEST=manual From chroot: dut-control fw_wp_en:on dut-control mfg_mode:on From console: gpioget WRITE_PROTECT 0 WRITE_PROTECT From chroot: dut-control fw_wp_en:on dut-control mfg_mode:off From console: gpioget WRITE_PROTECT 1 WRITE_PROTECT Change-Id: I81c7858cac43c6c9b8630bf7f5aa0f491e6554ad
* lightbar: add reset GPIOBill Richardson2012-04-032-0/+2
| | | | | | | | | | | | | | | | | | De-assert the lightbar reset GPIO to be able to access its registers. According to the HW guys, it will consume less power in standby than in reset due the pull-up on the reset line. Signed-off-by: Bill Richardson <wfrichar@chromium.org> BUG=None TEST=manual On Link proto-1, type "lightbar test" in the EC console and see it blink. On BDS, just build it. Nothing actually changes for BDS. Change-Id: I9ec612c80f48d41ccf779f0962fc047966d4b7ba
* Tidy ADC channel definitionsRandall Spangler2012-03-192-5/+4
| | | | | | | | | | | We moved a while ago to a table of ADC channels, so having a meaningless constant defined in board.h is more harmful than helpful. BUG=none TEST=build link, bds Change-Id: I651a609c9ed13f879bb943c90731275407d77e50 Signed-off-by: Randall Spangler <rspangler@chromium.org>
* Clean up chip/board configs for LM4Randall Spangler2012-03-163-4/+3
| | | | | | | | | | | Board-specific features like lightbar should be config'd at the board level, not at the chip level. BUG=none TEST=build link, bds, daisy Change-Id: If1df2ca0422f7b8bdc172d0df7bd9f6a1af6a9d2 Signed-off-by: Randall Spangler <rspangler@chromium.org>
* Merge "Fix test build"Gerrit2012-03-151-0/+4
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| * Fix test buildVincent Palatin2012-03-151-0/+4
| | | | | | | | | | | | | | | | | | | | | | Allow to build without the power button task. Signed-off-by: Vincent Palatin <vpalatin@chromium.org> BUG=None TEST=make qemu-tests Change-Id: Ibc757a6641f195f0d10e6a673792b996694f8cec
* | Temperature sensor grouping.Vic Yang2012-03-161-3/+6
|/ | | | | | | | | | | | Group temperature sensors into different types so we only have to set temperature threshold for each type instead of each sensor. Signed-off-by: Vic Yang <victoryang@google.com> BUG=chrome-os-partner:8466 TEST=Fan control still works. Change-Id: I7acc714c32f282cec490b9e02d402ab91a53becf
* Add wake signal to PCHRandall Spangler2012-03-152-2/+2
| | | | | | | | | | | | | | | | | | | | | | This works similar to SCI/SMI events, but triggers a separate level-sensitive signal to the PCH instead. Signed-off-by: Randall Spangler <rspangler@chromium.org> BUG=chrome-os-partner:8514 TEST=manual From EC console: gpioget PCH_WAKEn --> should be 1 hostevent wake 0x1 close lid switch (with magnet) hostevent -> should show wake mask 0x1, raw events 0x1 gpioget PCH_WAKEn --> should be 0 hostevent clear 0x1 hostevent -> should show raw events 0 gpioget PCH_WAKEn --> should be 1 Change-Id: I29832c1dc30239a98987578f07dfeb25791dde11
* Temp sensor report 0xfd on sensor unpowered.Vic Yang2012-03-141-3/+3
| | | | | | | | | | | | | Make temp sensor report 0xfd when sensor is unpowered. Also refactor power specification of temp sensors from thermal.c to temp_sensor.c. Signed-off-by: Vic Yang <victoryang@google.com> BUG=chrome-os-partner:8279 TEST=none Change-Id: Ib13813bdbac2f048fbc3b98fae5bbf104ebf37d7
* Update LPC mapped switch states with write protect and recovery statesRandall Spangler2012-03-072-0/+4
| | | | | | | | | | | | | | | | | | | | | | Signed-off-by: Randall Spangler <rspangler@chromium.org> BUG=chrome-os-partner:8325 TEST=manual Boot system with lid open. 'ectool switches' should show lid open. Use 'dut-control goog_rec_mode:on'. 'ectool switches should show dedicated recovery signal on.' Use 'dut-control goog_rec_mode:off'. 'ectool switches should show dedicated recovery signal off.' Disable write protect via screw. 'ectool switches' should show WP signal disabled. Boot system in recovery mode (power+esc+reload). Should show 0x09. Change-Id: I0434427c4b5f8c07c02a8714618f7eb101b86fed
* Only send power button pulse on lid-open when main chipset is offRandall Spangler2012-03-051-0/+10
| | | | | | | | | | | | | Signed-off-by: Randall Spangler <rspangler@chromium.org> BUG=chrome-os-partner:8324 TEST=manual 1. When system is off, open lid. Debug console should show PB PCH pwrbtn activity. 2. Wait for system to boot. 3. Quickly close and open lid. Debug console should not show pwrbtn activity. Change-Id: Ia018ff06a31ac2a68f20021d17e47ddb06096eb8
* Add SMI/SCI supportRandall Spangler2012-03-052-0/+2
| | | | | | | | | | | | | | | | | | | | | | | | BUG=chrome-os-partner:8277 TEST=manual On EC console: hostevent set 0x1e From root shell: ectool eventget --> should return 0x1e ectool eventclear 0x02 ectool eventget --> should return 0x1c ectool queryec --> should return event 3 ectool queryec --> should return event 4 ectool queryec --> should return event 5 ectool queryec --> should return no event pending ectool eventsetsmimask 0x1200 ectool eventsetscimask 0x0034 ectool eventgetsmimask --> should return 0x1200 ectool eventgetscimask --> should return 0x0034 On EC console: hostevent --> should show raw=0 SMI mask = 0x1200 SCI mask = 0x34 Change-Id: I33042fa80c0b148cd63209a94a184af493e25ed3
* Write current fan speed to LPC mapped value space.Vic Yang2012-02-271-0/+1
| | | | | | | | | | | | | Add a task to update fan speed in LPC mapped memory once per second. Also added read_mapped_mem16 and read_mapped_mem32. Signed-off-by: Vic Yang <victoryang@chromium.org> BUG=chrome-os-partner:8183 TEST="ectool pwmgetfanrpm" shows same result as "faninfo" from ec console. Change-Id: Ibc536acd39f836ffcad0bfa7c9c14e730220bd49
* x86power module is not present on bds boardRandall Spangler2012-02-271-1/+0
| | | | | | | | | | | On bds, always send the keyboard scan code for the power button. Signed-off-by: Randall Spangler <rspangler@chromium.org> BUG=none TEST=none Change-Id: I56ad8c9dd67edfd54190d64f16742896a86b9ac1
* Temperature polling and temporal correctionVic Yang2012-02-183-4/+19
| | | | | | | | | | | | | | | | A temperature polling task is added to achieve temporal correction and also reduce the latency of reading temperature. Factor out sensor specific part to keep code clean. Signed-off-by: Vic Yang <victoryang@chromium.org> BUG=chrome-os-partner:7801 TEST=On link, 'temps' shows all temperature readings. Cover each sensor with hand and see object temperature rise. Compilation succeeded on bds/adv/daisy/discovery. Change-Id: I3c44c8b2e3ab2aa9ce640d3fc25e7fba56534b86
* Make i8042 independent of host <--> KBC bus.David Hendricks2012-02-151-0/+3
| | | | | | | | | | | | | | | | | | | | | | | | | This CL attempts to abstract underlying bus from i8042 code. Nearly all i8042 logic is isolated already. This patch is intended to allow us to use i8042 logic for processing keys and commands on boards which do not necessarily use LPC as the host <--> KBC bus interface. This CL does the following: - Define KBC bus <--> host (kbc_host_bus) on a per-board basis in board.c. - Add generic wrappers in place of lpc_keyboard_* in i8042 code. - Define the behavior of generic wrappers in EC-specific keyboard sources. If board.c specifies LPC, then send via LPC. TODO: This needs to be tested on real hardware... Signed-off-by: David Hendricks <dhendrix@chromium.org> BUG=None TEST=Locally compiled for Link, BDS and Discovery. Change-Id: I9cabd514bd44fd6b508c26994eccc3011eedbc0f
* Add 'lightsaber' command to test the blinky lights.Bill Richardson2012-02-131-0/+2
| | | | | | | | BUG=chrome-os-partner:7839 TEST=none, work in progress Change-Id: I20acde8db7f250227adcd4b9dc59328362e68720 Signed-off-by: Bill Richardson <wfrichar@chromium.org>
* Fix discovery and bds builds, which don't have temp sensor or peciRandall Spangler2012-02-131-2/+2
| | | | | | | | | | | | | Remove id field from temp_sensor_t struct, since it's only used by the console command (which already knows the id, because it's looping over it). Signed-off-by: Randall Spangler <rspangler@chromium.org> BUG=none TEST='temps' Change-Id: I0970850073d644509cd5501d7ac4421c7373143b
* Merge "Add tmp006 object temperature calculation"chrome-bot2012-02-081-1/+1
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| * Add tmp006 object temperature calculationVic Yang2012-02-081-1/+1
| | | | | | | | | | | | | | | | | | | | Implement TMP006 object temperature calculation. Also add a console command to calculate temperature with manually entered data. BUG=chrome-os-partner:7801 TEST=In console, "tempremote 29715 -105000 6390" gives 285.00K. Change-Id: I0f9193fb970fdc36566399e7083e73ab58965a85
* | Initial bq24725 charger driver importRong Chang2012-02-072-0/+93
|/ | | | | | | | | | | | | | | | Battery charging state machine contains many file changes. This is the 1st part of the break down. Refactor original test code into board dummy driver. Normalize charger API. And import link's charger IC driver. Signed-off-by: Rong Chang <rongchang@google.com> BUG=chrome-os-partner:7855 TEST=build without warning and error BOARD=bds make BOARD=link make BOARD=discovery make Change-Id: I34b6e9862a45331378916bc77653d4adb22ca548
* Refactor temperature sensor code and add support of Link I2C temp sensor.Vic Yang2012-02-043-0/+30
| | | | | | | | | | | | Refactor board/chip-specific code into corresponding directories. Add support of the four I2C temp sensor in Link. Use table lookup to handle different types of temperature sensors. BUG=chrome-os-partner:7527 TEST=Correctly read EC internal temperature on bds. Compile for link succeeded. Change-Id: I694cfa54e1545798d877fafdf18c5585ab5f03e2
* Fix a typo that cause compilation fail on BDSVic Yang2012-02-021-1/+1
| | | | | | | BUG=none TEST=compile for BDS succeded. Change-Id: I7790e2e5c2f2c9662a1c7b1fcf7a7442759a8653
* Refactor ADC code and add Link charger current ADC supportVic Yang2012-02-022-0/+29
| | | | | | | | | | | Refactor ADC code and move board/chip-specific part to corresponding directories. Implement function and console command to read Link charger current. BUG=chrome-os-partner:7527 TEST=Read EC temperature and POT input on BDS. Change-Id: I7fafd310ea49d9b2781f10c3453f5488da29a08a
* Change COMx port to COM1Randall Spangler2012-01-301-0/+2
| | | | | | | | | Signed-off-by: Randall Spangler <rspangler@chromium.org> BUG=chrome-os-partner:7804 TEST=boot and check UART2 output; should have coreboot debug output Change-Id: Ia0d16498180bb7b7d466d10268a959097e385fac
* Add modularity to the buildVincent Palatin2012-01-242-2/+2
| | | | | | | | | | | | | | You can now enable/disable tasks more easily. To conditionally compile a C file depending on the task FOO activation, just write something like that in the build.mk file : common-$(CONFIG_TASK_FOO)+=foo_source.o Signed-off-by: Vincent Palatin <vpalatin@chromium.org> BUG=None TEST=make all BOARD=link && make qemu-tests Change-Id: I760fb248e1599d13190ccd937a68ef47da17b510
* Use correct ADC channel for charger current on linkRandall Spangler2012-01-231-1/+1
| | | | | | | | | Signed-off-by: Randall Spangler <rspangler@chromium.org> BUG=chrome-os-partner:7697 TEST=if it runs, it works Change-Id: I36ab37a8cf1c3e4bf41bfb38e622e766cee8a4c4
* USB Charging controlVic Yang2012-01-191-0/+3
| | | | | | | | | | | | | | Implement TPS2543 USB charging control. It contains routine for setting each USB port as dedicated charging port or standard downstream port. To allow us controlling the current distributed to each port, we can select whether to allow 500mA or 1500mA for each port. BUG=chrome-os-partner:7476 TEST=Added USB port definition for BDS and tested GPIO output voltage level is correct for all modes. Change-Id: I19bc4b30d333aa802f868ebfc3a398b30e99ba0f
* Handle all GPIO IRQs. Interrupts no longer enabled by default.Randall Spangler2012-01-171-0/+5
| | | | | | | | | Signed-off-by: Randall Spangler <rspangler@chromium.org> BUG=chrome-os-partner:7456 TEST=if it runs, it works Change-Id: Ib82afab7d53203af31eefc9887feb98679266ac1
* Add x86 power state machineRandall Spangler2012-01-173-1/+54
| | | | | | | | | | | For bringup, this powers on the x86 unconditionally. Signed-off-by: Randall Spangler <rspangler@chromium.org> BUG=chrome-os-partner:7528 TEST=none Change-Id: Ib23e56d38ab42f8d8a4dbd1ba9dce12f0c3eeec9
* Move board-specific GPIO lists to board-specific filesRandall Spangler2012-01-122-3/+38
| | | | | | | | | Signed-off-by: Randall Spangler <rspangler@chromium.org> BUG=chrome-os-partner:7528 TEST=none Change-Id: I47fd5d709a9575e41fdcdf21a7440ebbb762cef5
* Add constants for all GPIOs.Randall Spangler2012-01-111-20/+0
| | | | | | | | | Signed-off-by: Randall Spangler <rspangler@chromium.org> BUG=chrome-os-partner:7528 TEST=none Change-Id: I3b77cbbb7f0cc12a4daae7ababd603b5d7af32d1
* Add JTAG moduleRandall Spangler2012-01-111-34/+0
| | | | | | | | | | | This just ensures the JTAG pins are reset to JTAG function on warm reboot. Signed-off-by: Randall Spangler <rspangler@chromium.org> BUG=chrome-os-partner:7448 TEST=none Change-Id: I0cccdbe7a68c228db7f354898ed30598e9fabff0
* Split power button code into its own fileRandall Spangler2012-01-101-1/+1
| | | | | | | | | Signed-off-by: Randall Spangler <rspangler@chromium.org> BUG=chrome-os-partner:7499 TEST=press and release power button; should see debug messages Change-Id: I8909ae4643afc98753edb690771618ad43135e3e
* Implement EC lid switch handlerVic Yang2011-12-291-0/+1
| | | | | | | | | | Implement EC lid switch interrupt handler and debouncing. BUG=chrome-os-partner:7363 TEST=Manually test lid switch output signal is correct. Use UART console to see debouncing is correct. Change-Id: I74aad63330716da017fc4a57002349461c6a9b26
* Change register.h macros to use inline funcs without concatenate (##).Randall Spangler2011-12-131-22/+26
| | | | | | | | | Signed-off-by: Randall Spangler <rspangler@chromium.org> BUG=none TEST=none Change-Id: Ia8c54bfeff2351e8f76d97db558952a9d2ca9a45
* Add user-mode LPC endpointRandall Spangler2011-12-081-0/+9
| | | | | | | | | Signed-off-by: Randall Spangler <rspangler@chromium.org> BUG=none TEST='ectool hello' on target system Change-Id: I39845c2ea107ea6f85ef556d58e49343f5a0e9c0
* Initial sources import 3/3Vincent Palatin2011-12-073-0/+91
| | | | | | | | source files mainly done by Vincent. Signed-off-by: Vincent Palatin <vpalatin@chromium.org> Change-Id: Ic2d1becd400c9b4b4a14d4a243af1bdf77d9c1e2
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