summaryrefslogtreecommitdiff
path: root/board/cr50
Commit message (Expand)AuthorAgeFilesLines
* cr50: Merge BattPrsnt device handling to wp.cRandall Spangler2017-08-084-50/+36
* cr50: Merge CCD device handling to rdd.cRandall Spangler2017-08-083-38/+8
* cr50: Clean up device state codeRandall Spangler2017-08-081-36/+213
* cr50: fix saving the U2F seed to flashVincent Palatin2017-08-041-0/+2
* g: use deterministic k for individual attestation certificate ECDSAVincent Palatin2017-08-031-1/+4
* cr50: stop using AP PHYMary Ruthven2017-08-012-56/+0
* cr50: add a pulldown to spi mosi and clkMary Ruthven2017-08-012-2/+8
* cr50: CCD V1 controls UART accessRandall Spangler2017-08-012-24/+82
* usb_i2c: Fail if board I2C bridge is disabledRandall Spangler2017-07-312-3/+39
* cr50: provide chip factory mode supportVadim Bendebury2017-07-301-0/+5
* cr50: introduce means of detecting chip running in factory modeVadim Bendebury2017-07-303-0/+24
* cr50: Rename uartn_enabled() to uartn_tx_is_connected()Randall Spangler2017-07-292-9/+11
* cr50: CCD V1 controls SPI accessRandall Spangler2017-07-281-9/+13
* cr50: protect EC/AP reset commands using CCD V1Randall Spangler2017-07-271-0/+6
* cr50: restrict console and control WP via CCD configRandall Spangler2017-07-273-347/+109
* cr50: Disable CCD on board ID mismatchRandall Spangler2017-07-271-0/+4
* cr50: Preserve CCD state across deep sleepRandall Spangler2017-07-272-1/+41
* g: hwtimer: Improve accuracy of hwtimer and ensure minimum udelay() waitShawn Nematbakhsh2017-07-211-0/+3
* cr50: modify tpm_endorse() error reporting logicstabilize-9765.7.BVadim Bendebury2017-07-201-9/+13
* cr50: Add case closed debugging V1 configurationRandall Spangler2017-07-203-11/+101
* cr50: Add physical presence state machineRandall Spangler2017-07-192-4/+24
* cr50: Always read LONG_LIFE_SCRATCH1 for brdprop.Aseda Aboagye2017-07-111-2/+7
* cr50: ensure the hash sizes are correct in U2F codeVincent Palatin2017-07-031-5/+5
* cr50: add U2F supportVincent Palatin2017-06-294-0/+237
* g: cr50: update INFO1 mask when corrupting the second imageVadim Bendebury2017-06-211-1/+4
* cr50: handle board ID mismatch gracefullyVadim Bendebury2017-06-162-0/+11
* mn50: fix usb_updateNick Sanders2017-06-163-191/+0
* cr50: check for board ID match at startupVadim Bendebury2017-06-152-4/+35
* g: show RW headers' Board ID fields in 'version' outputVadim Bendebury2017-06-134-301/+3
* cr50: Enable EC UART bit banging.Aseda Aboagye2017-06-073-1/+55
* cr50: Add console and TPM vendor commands to get/set board IDPhilip Chen2017-06-023-0/+301
* cr50: change the power button handlingVincent Palatin2017-06-021-8/+18
* cr50: configure flash counterVincent Palatin2017-06-022-8/+15
* cr50: Have CCD_MODE_L respect "ccd keepalive".Aseda Aboagye2017-06-011-3/+4
* cr50: read fwmp and act on it when controlling console restrictionsVadim Bendebury2017-05-314-13/+104
* cr50: remove code that was used to work around sys_rst issuesMary Ruthven2017-05-161-35/+1
* cr50: drop obsolete/addressed TODOsVadim Bendebury2017-05-163-20/+0
* CR50: replace dcrypto_memset with always_memsetnagendra modadugu2017-05-153-16/+23
* cr50: add LONG_LIFE bit to suppress RO uart.Marius Schilder2017-05-121-0/+6
* mn50: initial checkinNick Sanders2017-05-121-7/+2
* cr50: print '.' every time cr50 resumes from sleepMary Ruthven2017-04-061-0/+11
* cr50: wp: Only use RAM val on wake from hibernate.Aseda Aboagye2017-03-311-6/+12
* cr50: add a function to read TPM NVMEM locationsVadim Bendebury2017-03-232-0/+75
* g: add code to corrupt new header until further notice and move rw to 0.0.19Vadim Bendebury2017-03-221-16/+34
* cr50: add vendor command to restore corrupted headerVadim Bendebury2017-03-221-0/+141
* cr50: use plt_rst_l low level as a sleep wake triggerVadim Bendebury2017-03-151-4/+13
* cr50: add rollback information to the sysinfo command outputVadim Bendebury2017-03-091-0/+4
* g: mark RW INFO rollback map space to match the header infomap fieldVadim Bendebury2017-03-091-0/+2
* cr50: make sys_rst_l wake on lowMary Ruthven2017-03-071-7/+12
* cr50: Only drive CCD_MODE_L when in CCD mode.Aseda Aboagye2017-03-074-28/+81
View Lorry Controller Status