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Chipset task is overflowing and causing runtime crash.
Increasing the chipset task stack size by 128 bytes.
BUG=chrome-os-partner:43329
BRANCH=none
TEST=Build/flash EC and boot the platform to OS.
Change-Id: I4e444cc48979c74810851ab2625b982fdabdeb73
Signed-off-by: Divagar Mohandass <divagar.mohandass@intel.com>
Reviewed-on: https://chromium-review.googlesource.com/289112
Reviewed-by: Shawn N <shawnn@chromium.org>
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Increase host-command task stack size by 128
to avoid stack overflow exception.
BRANCH=None
BUG=chrome-os-partner:42071
TEST=Test for general functionality and confirm
that no stack overflow happens.
Change-Id: I5513dbca84cf556357c25cddbcde00e0db6d271b
Signed-off-by: Chiranjeevi Rapolu <chiranjeevi.rapolu@intel.com>
Reviewed-on: https://chromium-review.googlesource.com/282810
Reviewed-by: Shawn N <shawnn@chromium.org>
Commit-Queue: Divya Jyothi <divya.jyothi@intel.com>
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Charger task is overflowing and causing crash.
Increased charger task stack size by 128 bytes.
Also increased console/hook by 128 bytes as these
are also close to its limit.
BRANCH=None
BUG=chrome-os-partner:40766
TEST=1.Program EC image.
2. Run various tests to verify charger stack doesn't
overflow.
Change-Id: I6e350584508fa3a47769982b1e0cf3e3aea9ded6
Signed-off-by: Chiranjeevi Rapolu <chiranjeevi.rapolu@intel.com>
Reviewed-on: https://chromium-review.googlesource.com/274204
Reviewed-by: Sheng-liang Song <ssl@chromium.org>
Reviewed-by: Shawn N <shawnn@chromium.org>
Commit-Queue: Divya Jyothi <divya.jyothi@intel.com>
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In S3 state, sensors loose their power. Prevent any initiation of
communication with the sensors.
BUG=None
TEST=With Servo connected, verify that no I2C failures are reported
on EC Console when system is brought to S3.
BRANCH=None
Change-Id: I1988c40aa9de48403e9e3a6be5aec3b7267c29e0
Signed-off-by: Shamile Khan <shamile.khan@intel.com>
Reviewed-on: https://chromium-review.googlesource.com/268481
Reviewed-by: Shawn N <shawnn@chromium.org>
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With mec1322's EMI set to decode IO 0x800, it does not have any other
interfaces to support POST code via IO 0x80.
This change is to enable Port80 POST code support via polling method.
Limitation:
- POST Code 0xFF will be ignored.
- POST Code frequency is greater than 1 msec.
BUG=chrome-os-partner:39386
TEST=Verified Port80 POST code is captured in EC console.
Verified "port80 task" console command will disable/enable Port80 task.
Verified "port80 poll" will get the last Port80 POST code.
BRANCH=none
Change-Id: I27e53e84b5be1fd98464a44407dd58b93d8c798d
Signed-off-by: Kevin K Wong <kevin.k.wong@intel.com>
Reviewed-on: https://chromium-review.googlesource.com/266783
Reviewed-by: Randall Spangler <rspangler@chromium.org>
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BUG=none
TEST=Verified system is able to boot to kernel.
BRANCH=none
Change-Id: I7fa4a45bf2209098b5c3794f197d4010c05c356e
Signed-off-by: Kevin K Wong <kevin.k.wong@intel.com>
Reviewed-on: https://chromium-review.googlesource.com/266835
Reviewed-by: Shawn N <shawnn@chromium.org>
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BUG=none
TEST=Booted on cyan
BRANCH=none
Change-Id: Ibc7fe6b797fffc00613e13912868fa4d8b14091f
Signed-off-by: Kevin K Wong <kevin.k.wong@intel.com>
Reviewed-on: https://chromium-review.googlesource.com/260684
Reviewed-by: Eric Caruso <ejcaruso@chromium.org>
Reviewed-by: Shawn N <shawnn@chromium.org>
Commit-Queue: Divya Jyothi <divya.jyothi@intel.com>
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