| Commit message (Collapse) | Author | Age | Files | Lines |
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Each board defines its own callback lid_angle_peripheral_enable().
The implementation is very similar. Create a common implementation
and reduce the duplicated code.
This CL removes the board callbacks which are identifical to the
common callback. If it is slightly different, keep it and add
the __override tag.
The check of TEST_BUILD is unnecessary as the board callback is not
linked in the test build.
BRANCH=None
BUG=b:194922043
TEST=Build all the images.
Change-Id: I73d381730f35b80eff69399cdfc5fb54f839aee0
Signed-off-by: Wai-Hong Tam <waihong@google.com>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3069175
Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
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Add keyboard_factory_scan_pins and keyboard_factory_scan_pins_used to
keyboard_scan header so they do not need to be declared as extern by
individual boards. These constants need to be defined if
CONFIG_KEYBOARD_FACTORY_TEST is enabled.
BUG=None
TEST=Build
BRANCH=None
Change-Id: I1a100f626b3cea251ca72703d17b2d27db0f8f28
Signed-off-by: Rob Barnes <robbarnes@google.com>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3053101
Commit-Queue: Diana Z <dzigterman@chromium.org>
Reviewed-by: Diana Z <dzigterman@chromium.org>
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The naming string should be DYNAPACK.
BUG=none
BRANCH=none
TEST=make buildall
Signed-off-by: Devin Lu <Devin.Lu@quantatw.com>
Change-Id: I32f2498d4e51a83bd323d313a862622b6e69967d
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3038017
Reviewed-by: Tommy Chung <tommy.chung@quanta.corp-partner.google.com>
Reviewed-by: caveh jalali <caveh@chromium.org>
Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org>
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SSFC bit definition started diverging between coreboot and EC. To
avoid conflicts move the definitions of SSFC bits within EC to per
board instead of at a baseboard level.
Base sensor and Lid sensor components are common across all boards
Base Sensor - bits 0-2
Lid Sensor - bits 3-5
In addition, Sasuke uses bits 6-8 for usb superspeed mux
Cret board uses bits 9-11 in coreboot for audio codec
BRANCH=firmware-dedede-13606.B
BUG=b:187694527
TEST=make buildall
Signed-off-by: Parth Malkan <parthmalkan@google.com>
Change-Id: Ib0f732e5d41668135ff180c545ff4bb6a1cb1427
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3021932
Reviewed-by: YH Lin <yueherngl@chromium.org>
Reviewed-by: Marco Chen <marcochen@chromium.org>
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Enable CONFIG_ASSERT_CCD_MODE_ON_DTS_CONNECT on all dedede boards. This
will assert GPIO_CCD_MODE_ODL when a debug device is connected to a CCD
port. GPIO_CCD_MODE_ODL must be configured as an open drain so EC and
Cr50 don't drive fight.
BUG=b:190189242
TEST=Build dedede
BRANCH=None
Change-Id: I2d71312967f2d4a693ac9753279f49478e8c092c
Signed-off-by: Rob Barnes <robbarnes@google.com>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2976759
Reviewed-by: Diana Z <dzigterman@chromium.org>
Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
Tested-by: Diana Z <dzigterman@chromium.org>
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On dedede and keeby boards, the thermistors are powered by the EC's
GPIO_EN_PP3300_A pin. If the thermistors are read before they are
powered then the EC may force a thermal shutdown due to the bad reading.
This commit simply defines CONFIG_TEMP_SENSOR_POWER_GPIO along with a
CONFIG_TEMP_SENSOR_FIRST_READ_DELAY_MS to ensure we don't get any false
positive thermal shutdowns.
BUG=b:192053176
BRANCH=dedede
TEST=Build and flash lalala. Unplug AC charger from DUT, press
refresh+power button to reset DUT, verify that DUT boots up
automatically.
TEST=Repeat above test with madoo.
Signed-off-by: Aseda Aboagye <aaboagye@google.com>
Change-Id: I2a49e2f896c4120a8f01f440ea22c9b3763c6589
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2988364
Tested-by: Aseda Aboagye <aaboagye@chromium.org>
Auto-Submit: Aseda Aboagye <aaboagye@chromium.org>
Reviewed-by: Diana Z <dzigterman@chromium.org>
Commit-Queue: Diana Z <dzigterman@chromium.org>
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BUG=b:191726915
BRANCH=dedede
TEST=Make sure battery charging, battery cutoff works.
Signed-off-by: Tommy Chung <tommy.chung@quanta.corp-partner.google.com>
Change-Id: Ie5895499df9baea80b5966736c6d42a504ad68b1
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2977863
Reviewed-by: Devin Lu <Devin.Lu@quantatw.com>
Reviewed-by: Diana Z <dzigterman@chromium.org>
Commit-Queue: Diana Z <dzigterman@chromium.org>
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Update fw_config_db to meet cbi_fw_config table on drawcia.
BUG=b:186393848
BRANCH=dedede
TEST=on drawcia, make sure that all DB configs act correctly.
Signed-off-by: Tommy Chung <tommy.chung@quanta.corp-partner.google.com>
Change-Id: I1d123f6119911840f3ffae9d3746820ca3e5511d
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2902071
Reviewed-by: Henry Sun <henrysun@google.com>
Reviewed-by: Devin Lu <Devin.Lu@quantatw.com>
Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
Commit-Queue: Henry Sun <henrysun@google.com>
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Since the SM5803 shares an interrupt line with the TCPC, allow the
PD_INT task for C1 to process interrupts for this chip. This will
ensure that any interrupts from the charger are handled at a high
priority and cannot leave the shared IRQ line low for extended periods.
BRANCH=None
BUG=b:182534117,b:173056845
TEST=on drawcia, confirm charger attach to C1 works reliably
Signed-off-by: Diana Z <dzigterman@chromium.org>
Change-Id: I6670c62ca6d59fc3f5db4151cf7142b2da1fec38
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2803462
Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
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This function prototype is defined in lots of files, none of which is
visible to Zephyr.
Add a prototype in one place and remove the others.
BUG=b:183296099
BRANCH=none
TEST=make buildall
Signed-off-by: Simon Glass <sjg@chromium.org>
Change-Id: Ia324327a69b117483ab9ee5c85eba93c0fb5ad9c
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2789799
Reviewed-by: Jack Rosenthal <jrosenth@chromium.org>
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Use board-specific override files when generating VIFs for boards.
BUG=b:172276715
TEST=make buildall
BRANCH=none
Signed-off-by: Abe Levkoy <alevkoy@chromium.org>
Change-Id: I197365018ceb8197c22d631cebf4cbce1c0119f7
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2785506
Reviewed-by: Denis Brockus <dbrockus@chromium.org>
Commit-Queue: Denis Brockus <dbrockus@chromium.org>
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This commit adds a new GPIO, GPIO_EC_ENTERING_RW2 which does the same
thing as GPIO_EC_ENTERING_RW. However, it's on a pin that's more well
behaved around init time.
This commit also overrides the board_pulse_ec_entering_rw() function
such that both lines can be pulsed.
BUG=b:180965428,b:181051734,b:181085178
BRANCH=dedede
TEST=Build and flash draw*, verify it boots.
Signed-off-by: Aseda Aboagye <aaboagye@google.com>
Change-Id: Ia9cfba97b8fcad5975e412523686a7ba53ea7399
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2719104
Reviewed-by: Diana Z <dzigterman@chromium.org>
Tested-by: Aseda Aboagye <aaboagye@chromium.org>
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CTS tests are failing because sensor values from axis 1 and 2 are
negated. When the test expects 360 degrees, -360 degrees gets reported.
Set the standard base translation matrix to resolve this.
BUG=b:175996778
TEST=Try CTS
BRANCH=None
Signed-off-by: Evan Green <evgreen@chromium.org>
Change-Id: I9ede658cef042caf72b81d08e4c47de4c7b5e820
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2648730
Tested-by: Kazuhiro Inaba <kinaba@chromium.org>
Reviewed-by: Diana Z <dzigterman@chromium.org>
Reviewed-by: Kazuhiro Inaba <kinaba@chromium.org>
Commit-Queue: Kazuhiro Inaba <kinaba@chromium.org>
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CtsSensorTestCases is failing on Drawcia because it requests 100
events from accelerometer and gyroscope but gets zero. We can
read sensor events just fine, but they never seem to push to the
kernel. Add CONFIG_MKBP_EVENT into the baseboard, and then clean up
all the one-off variants that have added this themselves. Also, add
some accel commands specific to drawcia for easier debugging.
BUG=b:171939568
BRANCH=none
TEST=Use amstan's script, which amounts to cat /dev/iio:deviceN
Signed-off-by: Evan Green <evgreen@chromium.org>
Change-Id: Ia796ec2f9a08d3628dcabb4b5fca425693af4099
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2638636
Reviewed-by: Diana Z <dzigterman@chromium.org>
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The Pen detection is detecting by interrupt. However, it will
miss the event on init if stylus already into garage. This patch
adds checking pen detection on init.
BUG=none
BRANCH=firmware-dedede-13606.B-master
TEST=On Drawcia, Resume from battery cutoff.
Make sure stylus is charging.
Signed-off-by: Devin Lu <Devin.Lu@quantatw.com>
Change-Id: I2bdc3bf028d466ad1b6e391fdb6ee7ec9d00cb6a
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2626787
Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
Commit-Queue: Aseda Aboagye <aaboagye@chromium.org>
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This header cannot currently be accessed by Zephyr since it is in a
driver directory, not an include directory. This header has quite a
bit of public stuff in it, so it seems reasonable to consider
everything public.
Move the header file and update all users.
BUG=b:175434113
BRANCH=none
TEST=make buildall -j30
build volteer on zephyr
Signed-off-by: Simon Glass <sjg@chromium.org>
Change-Id: Ibba37f47a06783fafb5095f853f2a68d92b6df87
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2607745
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Now that the DPM will be handling source-out decisions for TCPMv2,
remove references to its old configuration options from TCPMv2 boards in
order to avoid any confusion as to what code is running now. Also
remove the charge manager notifications of sink attach/detach since the
policy is being centralized into the DPM.
Note that the previous configuration options only ever allocated one 3.0
A port, and so the default number of 3.0 A ports has been set to 1.
BRANCH=None
BUG=b:168862110,b:141690755
TEST=make -j buildall
Signed-off-by: Diana Z <dzigterman@chromium.org>
Change-Id: Ie452e3da32b04226503539daa67b6b9f4a58aa58
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2597431
Reviewed-by: Keith Short <keithshort@chromium.org>
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There is an option in the task_set_event function which force
the calling task to wait for an event. However, the option is never
used thus remove it.
This also will help in the Zephyr migration process.
BUG=b:172360521
BRANCH=none
TEST=make buildall
Signed-off-by: Dawid Niedzwiecki <dn@semihalf.com>
Change-Id: Ic152fd3d6862d487bcc0024c48d136556c0b81bc
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2521599
Reviewed-by: Jett Rink <jettrink@chromium.org>
Reviewed-by: Tom Hughes <tomhughes@chromium.org>
Reviewed-by: Jack Rosenthal <jrosenth@chromium.org>
Commit-Queue: Jack Rosenthal <jrosenth@chromium.org>
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After running the analyzestack target, I noticed that some of
drawcia's stack usage may exceed the currently defined sizes. This
commit simply increases those that were under the usage shown by the
tool.
BUG=None
BRANCH=dedede
TEST=Build and flash drawlat, verify that new task stacks sizes are
present and that there is plenty of free RAM left.
Signed-off-by: Aseda Aboagye <aaboagye@google.com>
Change-Id: I813ffe2463f9bece5047a9a633db22f2e1c61fa4
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2587794
Tested-by: Aseda Aboagye <aaboagye@chromium.org>
Reviewed-by: Diana Z <dzigterman@chromium.org>
Commit-Queue: Aseda Aboagye <aaboagye@chromium.org>
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This commit updates the PID constants for drawcia to help minimize the
overshoot and to decrease steady state error more quickly.
BUG=b:174167890
BRANCH=dedede
TEST=Build and flash drawlat; verify that at low SOC, charging from
the sub board results in lower overshoot and reduced time to correct
steady state error.
TEST=Cutoff battery, verify that battery is able to be revived from
sub board.
TEST=Verify DUT can still boot off of AC only.
Signed-off-by: Aseda Aboagye <aaboagye@google.com>
Change-Id: Id15c226f9ac7bf85f4b427348640419565253d45
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2567036
Commit-Queue: Aseda Aboagye <aaboagye@chromium.org>
Tested-by: Aseda Aboagye <aaboagye@chromium.org>
Reviewed-by: Diana Z <dzigterman@chromium.org>
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This commit enlarge keyboard scan task stack to prevent stack
overflow.
BUG=b:174190303
BRANCH=firmware-dedede-13606.B-master
TEST=On drawcia. Make sure KEYSCAN is not overflow with volup+H+alt
keys.
Signed-off-by: Devin Lu <Devin.Lu@quantatw.com>
Change-Id: I99e180eca8e6665c5ab9f52d8bc7dcd5ec55e678
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2557772
Reviewed-by: Diana Z <dzigterman@chromium.org>
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Ensure all reasonable values for the DB can be handled in the current
board code. Note this does not cover a 2C DB, as supporting 3 type-c
OCPC ports would require additional board and OCPC development.
BRANCH=None
BUG=b:171742626
TEST=load on drawcia and confirm correct number of PD ports up
Signed-off-by: Diana Z <dzigterman@chromium.org>
Change-Id: I781c40951a426766e346767447f6824f10655e4e
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2548269
Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
Commit-Queue: Aseda Aboagye <aaboagye@chromium.org>
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Drawcia has progressed enough in development that we no longer need to
force an unlocked state on the EC.
BRANCH=None
BUG=b:171741987
TEST=make -j buildall
Signed-off-by: Diana Z <dzigterman@chromium.org>
Change-Id: I3d3df9392c52652a17a0bb563990cceed73b7020
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2546027
Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
Commit-Queue: Aseda Aboagye <aaboagye@chromium.org>
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This commit add the charge FET (CFET) field for OCPC.
BUG=b:173174333
BRANCH=none
TEST=On Drawcia. Cutoff battery and verify that CFET disable status
is reflected after attached charger.
Signed-off-by: Devin Lu <Devin.Lu@quantatw.com>
Change-Id: Ifcd6fcedd8422e3b7af292c473a17328edf3d5c6
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2539228
Reviewed-by: Diana Z <dzigterman@chromium.org>
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BUG=b:173174333
BRANCH=none
TEST=Test on charging/discharging/battery cut off pass.
Signed-off-by: Devin Lu <Devin.Lu@quantatw.com>
Change-Id: Ide3560ccbbbc0c65d5c3c72d8ed184d21271b860
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2537523
Reviewed-by: Diana Z <dzigterman@chromium.org>
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BUG=b:172173517
BRANCH=none
TEST=On drawcia. Plug in CDP, SDP, DCP, type-C and PD charger:
1. EC console chgsup to make sure voltage/current is indeed.
2. PDtrace to make sure we ramp current to a reasonable value.
Signed-off-by: Devin Lu <Devin.Lu@quantatw.com>
Change-Id: Ie8f2816cb1df1f6c885fe1d6c6d8bb8f0db84570
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2512628
Reviewed-by: Diana Z <dzigterman@chromium.org>
Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
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The volume buttons require an internal pull-up, so add this to the GPIO
configuration.
BRANCH=None
BUG=b:172471103
TEST=on drawcia, verify number of volume up and down prints match number
of times the buttons are pressed
Signed-off-by: Diana Z <dzigterman@chromium.org>
Change-Id: Iea2338629693a95c845d2992c85ad81416894d65
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2520099
Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
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This patch add for factory keyboard connector test.
BUG=b:170699805
BRANCH=none
TEST=Short keyboard pins and make sure "ectool kbfactorytest" works.
Signed-off-by: Devin Lu <Devin.Lu@quantatw.com>
Change-Id: I7da348a36611f06da700787774bf1521360a0c66
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2469639
Reviewed-by: Diana Z <dzigterman@chromium.org>
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PP5000_U shouldn't be turned off until G3, so if a sysjump occurs during
S5 leave this rail on.
BRANCH=None
BUG=b:166787955,b:167996216
TEST=on drawcia, run full resets with a forced sysjump in S5 and ensure
that the DUT can get to S0 after the reset
Signed-off-by: Diana Z <dzigterman@chromium.org>
Change-Id: I00fb44903aa109bbc525fb512ab4035a94649c68
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2458841
Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
Commit-Queue: Aseda Aboagye <aaboagye@chromium.org>
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For variants using the charger Vbus ADC, add a check versus
vSinkDisconnect to determine if the TC layer connection has been broken.
BRANCH=None
BUG=b:168831161
TEST=on waddledee, confirm we can reliably source 5V from a charger
without erroneously detecting disconnect
Signed-off-by: Diana Z <dzigterman@chromium.org>
Change-Id: Icd06d91cd28db068c8cfa646152596d6eab80375
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2436581
Reviewed-by: Denis Brockus <dbrockus@chromium.org>
Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
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The default combined Rbatt resistance is actually higher than what was
currently specified. The wrong Rds(on) value was used as well as the
sense resistor was missed.
This commit updates the default resistances for these boards.
BUG=none
BRANCH=none
TEST=Build and flash drawlat, verify default resistance is updated.
Signed-off-by: Aseda Aboagye <aaboagye@google.com>
Change-Id: I6b669dfcd1ec11cb2f456b19e83ac4c2783c0b8a
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2441803
Tested-by: Aseda Aboagye <aaboagye@chromium.org>
Auto-Submit: Aseda Aboagye <aaboagye@chromium.org>
Reviewed-by: Diana Z <dzigterman@chromium.org>
Commit-Queue: Diana Z <dzigterman@chromium.org>
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For boards which are using the SM charger chips, they will have a Psys
offset register to generate the OCPC Psys output.
BRANCH=None
BUG=b:168783892
TEST=make -j buildall
Signed-off-by: Diana Z <dzigterman@chromium.org>
Change-Id: Ib963ed11f73a76dfeffa11d5ab4a81ccbbd71102
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2435746
Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
Commit-Queue: Aseda Aboagye <aaboagye@chromium.org>
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Since changing the approach of charging via the sub board on systems
that use the SM5803, we need to update the PID constants to work with
this new approach. This commit updates the constants for drawcia.
BUG=b:168253008
BRANCH=None
TEST=Build and flash drawcia and verify charging is working as
expected.
Change-Id: I8073aa240f90a0ba1ba3d2adabdc0e9fd12dfc6d
Signed-off-by: Aseda Aboagye <aaboagye@google.com>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2415512
Tested-by: Aseda Aboagye <aaboagye@chromium.org>
Commit-Queue: Aseda Aboagye <aaboagye@chromium.org>
Reviewed-by: Diana Z <dzigterman@chromium.org>
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There is an external pull-up on this signal, and so the EC pull-up is
unnecessary and may cause an intermediate voltage when the system enters
G3.
BRANCH=None
BUG=b:169179804
TEST=make -j buildall, boot to S0 on drawlat
Signed-off-by: Diana Z <dzigterman@chromium.org>
Change-Id: I82a513777018eb9a6cd86450612a5c943d7bd357
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2429385
Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
Commit-Queue: Aseda Aboagye <aaboagye@chromium.org>
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Remove VSYNC sensor, and related GPIOs and configs.
BRANCH=None
BUG=b:169056723
TEST=make -j buildall
Signed-off-by: Diana Z <dzigterman@chromium.org>
Change-Id: Ib37e648ea04b5da3ed9ce6a660fcd60f2bfe264a
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2424891
Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
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add function to turn on/off features in SM5803 charger
during S0ix state to save power. we are seeing ~8mW power
saving per charger.
BRANCH=None
BUG=b:168591511
TEST=Check power saving in S0ix state and check charger and device
functionality after resume.
Signed-off-by: Divagar Mohandass <divagar.mohandass@intel.com>
Change-Id: I3ea32219040263f0abef8b9dd4c52edb31289fd7
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2409485
Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
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The SM charger chip has a Vbus ADC which we may use to precisely
evaluate vSafe0V and vSafe5V for waddledee and drawlat. Correct
evaluation of vSafe0V creates more robust power role swap behavior.
BRANCH=None
BUG=b:167666781,b:160996247
TEST=on drawlat, confirm monitor power role swap from SRC to SNK now
completes correctly
Signed-off-by: Diana Z <dzigterman@chromium.org>
Change-Id: Iaf5e9c1203005cfba10da0ff2863f9c109d8b1a3
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2406342
Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
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Enable SM5803 hibernation and restore registers after booting back from
z-state.
BRANCH=None
BUG=b:166648029
TEST=on drawlat, z-state power usage is reduced and booting after
z-state the charger chips can sink and source as expected
Signed-off-by: Diana Z <dzigterman@chromium.org>
Change-Id: I6e9f9f29a184fa6177e589b3b7810f51a1b3345b
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2393225
Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
Commit-Queue: Aseda Aboagye <aaboagye@chromium.org>
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define CONFIG_USB_PD_TCPC_LOW_POWER to enable TCPC low
power mode for draw* family of hardware.
BUG=b:165030094
BRANCH=none
TEST=Build/flash the fw and check the port C1 low power mode prints
Cq-Depend: chromium:2362372
Signed-off-by: Divagar Mohandass <divagar.mohandass@intel.com>
Change-Id: I82c427be551344983527612ce90ff056bf6ee4a9
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2381570
Commit-Queue: Aseda Aboagye <aaboagye@chromium.org>
Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
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Now that the charger_* interfaces take charge indexes appropriately,
clean up the board code to no longer use chg_chip structure directly.
BRANCH=None
BUG=b:147440290
TEST=on drawlat, confirm sourcing out on both ports works
Signed-off-by: Diana Z <dzigterman@chromium.org>
Change-Id: I92925e487f90bc3965b868f3f7fc0d3175dc3df9
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2376470
Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
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This change adds a new Vbus sink enable command which will be called on
initial sink connection and detach. This will separate out most of the
FLOW1 and FLOW2 register control from the set_mode() driver API which is
regularly called from the charger task. This means that, if charging on
a port fails, the charging will no longer be automatically re-enabled by
the charger task.
Additionally, this folds the verification that we aren't disabling
sourcing into the sink enable so board files no longer need to verify
this before calling the sink enable/disable API. It also allows the OTG
disable to fully clear the FLOW1 mode since calls to OTG are more
targeted than the sink enable/disable, which happens any time another
charge port is set.
BRANCH=None
BUG=b:163511546,b:165677311
TEST=on waddledee and drawlat, confirm expected FLOW1 contents and Vbus
level:
- sinking C0 or C1
- sourcing C0 or C1
- sourcing both C0 and C1
- sinking C0 while sourcing C1
- sinking C1 while sourcing C0
- battery cutoff with charger in C0 or C1
- no battery boot with charger in C0 or C1
- power role swap with HooToo hub in C0 and C1
Signed-off-by: Diana Z <dzigterman@chromium.org>
Change-Id: Ifdc7786243bdf0a634d8db99b4deb53457232ad3
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2372738
Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
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Drawman don't have auxiliary charger on DB, this patch turns off i2c
traffic on auxiliary charger base on board_get_charger_chip_count().
BUG=none
BRANCH=none
TEST=Make sure no i2c traffic on i2ctrace enable 4 0x30 to 0x36.
Signed-off-by: Devin Lu <Devin.Lu@quantatw.com>
Change-Id: I08f4682093461f39f2b909ffc97345db5e3ccc27
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2367422
Reviewed-by: Diana Z <dzigterman@chromium.org>
Commit-Queue: Diana Z <dzigterman@chromium.org>
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Move the PWM related defines and arrays into the board level, to allow
customization of what PWM channels boards use (if they choose to use the
PWM at all).
BRANCH=None
BUG=None
TEST=make -j buildall
Signed-off-by: Diana Z <dzigterman@chromium.org>
Change-Id: Id417a7be079511c17de9f2e5d03c729467435804
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2358899
Commit-Queue: Aseda Aboagye <aaboagye@chromium.org>
Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
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Drawcia has garage stylus, this patch enables stylus charging when
stylus present.
BUG=b:163146414
BRANCH=none
TEST=Make sure EN_PP5000_PEN turn on when stylus detected.
Signed-off-by: Devin Lu <Devin.Lu@quantatw.com>
Change-Id: I53f181ae381a33a87d7c2c312f7528cddccf49e3
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2364344
Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
Commit-Queue: Aseda Aboagye <aaboagye@chromium.org>
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Due to thermal concerns, current on C1 will be limited to 2.0 A on board
version 0.
BRANCH=None
BUG=b:161942987
TEST=on drawcia, plug charger into C1 and verify that the input current
limit is set to 2.0 A
Signed-off-by: Diana Z <dzigterman@chromium.org>
Change-Id: I66ca0cb095f62c05a7e649b018e4b7b72aa36726
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2341650
Commit-Queue: Aseda Aboagye <aaboagye@chromium.org>
Tested-by: Aseda Aboagye <aaboagye@chromium.org>
Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
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This commit enables OCPC for the Draw* boards. Default constants and
resistances are the same as waddledee.
BUG=b:161863872
BRANCH=None
TEST=Build and flash on drawlat. Verify that DUT can charge from the
sub board.
Signed-off-by: Aseda Aboagye <aaboagye@google.com>
Change-Id: I6b95fc0e9fdb6c758fda5509c29da9059d75642e
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2330818
Reviewed-by: Diana Z <dzigterman@chromium.org>
Tested-by: Diana Z <dzigterman@chromium.org>
Commit-Queue: Aseda Aboagye <aaboagye@chromium.org>
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Drawlat and Drawman are clamshell, disable motion sensors base on
FW_CONFIG.
BUG=none
BRANCH=none
TEST=Set FW_CONFIG to 0x0, check no sensors initial on boot.
Signed-off-by: Devin Lu <Devin.Lu@quantatw.com>
Change-Id: I9638c681c5c436aa45fce1f12e8bb7bcaf4257b0
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2341084
Reviewed-by: Diana Z <dzigterman@chromium.org>
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BUG=none
BRANCH=none
TEST=On Drawcia mockup, check the screen rotation was normally.
Make sure x-y-z axis direction is indeed.
Signed-off-by: Devin Lu <Devin.Lu@quantatw.com>
Change-Id: I383a00d69e2a4ceec22a12bb0b9b15d262c39336
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2341082
Reviewed-by: Diana Z <dzigterman@chromium.org>
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BUG=none
BRANCH=none
TEST=Set FW_CONFIG to 0x0100 and make sure "ectool inventory"
had keyboard backlight present.
Signed-off-by: Devin Lu <Devin.Lu@quantatw.com>
Change-Id: I7e0fd3ee42d5829dd6c81427c6ecbb359a5c385c
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2331977
Reviewed-by: Diana Z <dzigterman@chromium.org>
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On drawcia, we have a LED indicator with following:
System S0: White.
System S0ix: Blinking white (1 sec on, 1 sec off)
System S5/G3: Off.
BUG=none
BRANCH=none
TEST=make sure led is showing white on system S0.
make sure led is blinking white on S0ix.
make sure led is OFF on S5/G3.
Signed-off-by: Devin Lu <Devin.Lu@quantatw.com>
Change-Id: I38f8c4c06b5da1f050b9542667a54a26923ca222
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2331436
Reviewed-by: Diana Z <dzigterman@chromium.org>
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