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* keyboard: Use __override for keyboard_scan_configDaisuke Nojiri2021-07-231-1/+1
| | | | | | | | | | | | | | | | | Currently keyboard_scan_config is defined by each board using CONFIG_KEYBOARD_BOARD_CONFIG. This patch makes it defined as __override hence removes CONFIG_KEYBOARD_BOARD_CONFIG. BUG=None BRANCH=None TEST=buildall Change-Id: I53a356741ba4d00e829ca59b74ee6dc704188728 Signed-off-by: Daisuke Nojiri <dnojiri@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3044403 Tested-by: Gwendal Grignou <gwendal@chromium.org> Commit-Queue: Gwendal Grignou <gwendal@chromium.org> Reviewed-by: Gwendal Grignou <gwendal@chromium.org>
* system: Clean up system_get_board_version()Philip Chen2021-07-091-1/+0
| | | | | | | | | | | | | | | | | | | Refactor system_get_board_version() a bit so that we can remove CONFIG_BOARD_VERSION_CUSTOM and CONFIG_BOARD_VERSION from config.h. BRANCH=None BUG=b:186264627 TEST=make buildall -j TEST=zmake testall Cq-Depend: chromium:3015243 Change-Id: Id5ab809493c297b7d330ea13dcd6934ec00042a6 Signed-off-by: Philip Chen <philipchen@google.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3004112 Commit-Queue: Philip Chen <philipchen@chromium.org> Tested-by: Philip Chen <philipchen@chromium.org> Reviewed-by: Keith Short <keithshort@chromium.org> Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org>
* chgstv2: Unify power-on and shutdown battery thresholdsDaisuke Nojiri2021-06-231-1/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Currently, power-on battery SoC and shutdown battery SoC are independently configured by each board. This patch will unify the setting as follows: CONFIG_CHARGER_MIN_BAT_PCT_FOR_POWER_ON = 2 (don't boot if soc < 2%) CONFIG_BATT_HOST_SHUTDOWN_PERCENTAGE = 2 (shutdown if soc <= 2%) BATTERY_LEVEL_SHUTDOWN = 3 (shutdown if soc < 3%) CONFIG_BATTERY_EXPORT_DISPLAY_SOC = Y (removed) CONFIG_CHARGER_MIN_BAT_PCT_FOR_POWER_ON_WITH_AC = 1 This allows us to show the low battery alert whenever we can because EC doesn't inhibit power-on even if it knows the host would immediately shut down. With CONFIG_BATTERY_EXPORT_DISPLAY_SOC, boards will start using the CONFIG_BATT_HOST_SHUTDOWN_PERCENTAGE = 2% as the low battery threshold (and the SoC will be agreed between the EC and Powerd). Boards with CONFIG_CHARGER_MIN_BAT_PCT_FOR_POWER_ON = 1 will keep the same threshold. This is for avoiding degrading the UX by increasing the power-on threshold (even though a question that 1% may not be enough for soft sync to finish consistently remains to be answered). Boards with CONFIG_CHARGER_MIN_BAT_PCT_FOR_POWER_ON > 2 will have a lower threshold but we think 2% is enough to finish the software sync. A lower threshold also improves the UX by showing the low battery alert in the situation where otherwise the system would leave the user uninformed by not responding to a power button press. BUG=b:191837893 BRANCH=None TEST=buildall Change-Id: If6ff733bc181f929561a3fffb8a84e760668ce37 Signed-off-by: Daisuke Nojiri <dnojiri@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2981468 Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
* config: Provide default VCONN Swap delayAbe Levkoy2021-01-221-1/+0
| | | | | | | | | | | | | | | | | Almost every relevant board copy-pastes 5000 us. Make that the default and get rid of the redundant definitions. This is the approximate result of this command: find . -type f -name *.h | xargs sed -i -E \ '/#define CONFIG_USBC_VCONN_SWAP_DELAY_US[[:space:]]+5000[[:space:]]/d' BUG=b:144165680 TEST=make buildall BRANCH=none Change-Id: Ife86f9752971abcd7ab5ad5a5e607eb2ccbde2ba Signed-off-by: Abe Levkoy <alevkoy@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2628132 Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
* config: Make VCONN Swap delay a documented optionAbe Levkoy2021-01-221-1/+1
| | | | | | | | | | | | | | | | | | | | | Replace PD_VCONN_SWAP_DELAY with CONFIG_USBC_VCONN_SWAP_DELAY_US. This is the approximate result of the following command, run from platform/ec: find . -type f -\( -name '*.c' -o -name '*.h' -\) | \ xargs sed -iE 's/PD_VCONN_SWAP_DELAY/CONFIG_USBC_VCONN_SWAP_DELAY/g' Fix some latent formatting errors in usb_pd_protocol.c, because they were preventing pre-upload hooks from passing. BUG=b:144165680 TEST=make buildall BRANCH=none Signed-off-by: Abe Levkoy <alevkoy@chromium.org> Change-Id: Icaf3b309c08fdcd162e960cf5dc88185016b5d2d Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2628131 Reviewed-by: Aseda Aboagye <aaboagye@chromium.org> Commit-Queue: Aseda Aboagye <aaboagye@chromium.org>
* Refactor CONFIG_FLASH_SIZE to CONFIG_FLASH_SIZE_BYTESYuval Peress2021-01-151-1/+1
| | | | | | | | | | | | | | | | | | | | | In Zephyr CONFIG_FLASH_SIZE is a Kconfig value that is used throughout. The issue is that the units don't match. In Zephyr the value is in KiB instead of bytes. This refactor simply renames CONFIG_FLASH_SIZE in platform/ec to include the unit (via _BYTES). BRANCH=none BUG=b:174873770 TEST=make buildall be generated by the build instead of per board Signed-off-by: Yuval Peress <peress@chromium.org> Change-Id: I44bf3c7a20fcf62aaa9ae15715be78db4210f384 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2627638 Reviewed-by: Jack Rosenthal <jrosenth@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Hughes <tomhughes@chromium.org> Commit-Queue: Jack Rosenthal <jrosenth@chromium.org>
* TCPMv2: Update source-out configsDiana Z2020-12-241-1/+0
| | | | | | | | | | | | | | | | | | | | Now that the DPM will be handling source-out decisions for TCPMv2, remove references to its old configuration options from TCPMv2 boards in order to avoid any confusion as to what code is running now. Also remove the charge manager notifications of sink attach/detach since the policy is being centralized into the DPM. Note that the previous configuration options only ever allocated one 3.0 A port, and so the default number of 3.0 A ports has been set to 1. BRANCH=None BUG=b:168862110,b:141690755 TEST=make -j buildall Signed-off-by: Diana Z <dzigterman@chromium.org> Change-Id: Ie452e3da32b04226503539daa67b6b9f4a58aa58 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2597431 Reviewed-by: Keith Short <keithshort@chromium.org>
* motion: Use empty CONFIG_ variable to use IS_ENABLED()Gwendal Grignou2020-11-061-3/+3
| | | | | | | | | | | | | | | | Split information in a boolean variable and another variable that contains a property. For instance, CONFIG_GESTURE_SENSOR_DOUBLE_TAP becomes: CONFIG_GESTURE_SENSOR_DOUBLE_TAP : boolean variable CONFIG_GESTURE_TAP_SENSOR : property that contains the sensor number. BUG=chromium:1140877 BRANCH=none TEST=buildall Signed-off-by: Gwendal Grignou <gwendal@chromium.org> Change-Id: I27ba462f8a12b14882104b9f983f2dc17f917314 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2488937
* COIL: Rename CONFIG_I2C_CONTROLLERDiana Z2020-11-051-1/+1
| | | | | | | | | | | | | Rename CONFIG_I2C_CONTROLLER and related comments. BRANCH=None BUG=None TEST=make -j buildall Signed-off-by: Diana Z <dzigterman@chromium.org> Change-Id: Ied6a1829bf54a5c9a32e6772982a4b8aa31aaf23 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2518659 Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org>
* eve: Enable TCPMv2 supportPatryk Duda2020-10-201-1/+5
| | | | | | | | | | | | | | | This patch enables TCPMv2 support on eve BUG=b:162254118 BRANCH=none TEST=Flash firmware on eve. Run FAFT_PD test suite. All tests should pass except PDTrySrc (b:170136583 b:170289846) Signed-off-by: Patryk Duda <pdk@semihalf.com> Change-Id: I17363ab981db774fdc8bf8f831d5ed5fad983d21 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2453257 Reviewed-by: Jett Rink <jettrink@chromium.org>
* eve: save some RAM for TCPMv2/PD2.0 supportPatryk Duda2020-10-201-2/+6
| | | | | | | | | | | | | | | This patch changes buffer sizes and number of entries in command line history to save RAM. BUG=b:162254118 BRANCH=none TEST=Flash firmware on eve. Run CtsSensorTestCases test module. All tests should pass. Signed-off-by: Patryk Duda <pdk@semihalf.com> Change-Id: Ib27a005bac7e2284962fecaae97ac62a2e71ff9b Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2453256 Reviewed-by: Gwendal Grignou <gwendal@chromium.org>
* eve: Don't wake up on any MKBP eventAseda Aboagye2020-09-071-0/+2
| | | | | | | | | | | | | | | | | | | | | | Eve will now be able to wake up from suspend on any MKBP event, however we don't want to do that by default. Defining CONFIG_MKBP_EVENT_WAKEUP_MASK will allow the host to define which MKBP events it wants to be woken up for. BUG=chromium:985228 BRANCH=firmware-eve-9584.B TEST=Flash eve, verify that no MKBP events wake the system from suspend. Change-Id: I9677011dac63eb6e5dafe65ed20ead64ce9a9a48 Signed-off-by: Aseda Aboagye <aaboagye@google.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1719753 Tested-by: Aseda Aboagye <aaboagye@chromium.org> Reviewed-by: Duncan Laurie <dlaurie@google.com> Commit-Queue: Aseda Aboagye <aaboagye@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2320267 Commit-Queue: Patryk Duda <pdk@semihalf.com> Tested-by: Patryk Duda <pdk@semihalf.com> Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
* Revert "eve: Use PCH ACOK signal to control Deep Sleep entry"Duncan Laurie2020-09-071-1/+0
| | | | | | | | | | | | | | | | | | | | | | This reverts commit a49f19a1aa9ad3f4951490f96f0320fa646b572e. Battery life in S3 (not Deep S3) is terrible, so reverting this change until we determine if improvements can be made. BUG=b:79346372 BRANCH=eve TEST=none Change-Id: I570c5ea1b2b74f17fb41cd46424bfe2a5749d49a Reviewed-on: https://chromium-review.googlesource.com/1047845 Reviewed-by: Duncan Laurie <dlaurie@google.com> Commit-Queue: Duncan Laurie <dlaurie@google.com> Tested-by: Duncan Laurie <dlaurie@google.com> Trybot-Ready: Duncan Laurie <dlaurie@google.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2320266 Commit-Queue: Patryk Duda <pdk@semihalf.com> Tested-by: Patryk Duda <pdk@semihalf.com> Reviewed-by: Jett Rink <jettrink@chromium.org>
* eve: Provide batteryparam implementation to disable CTOScott Collyer2020-09-051-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The charger timeout threshold settings are not correct. This can lead to the CTOS (charge timeout suspend) safety alert getting set. Until the batteries flash can be updated, disable this check by clearing bit 4 of the protect_c register. This CL implements battery_set_vendor_param() and battery_get_vendor_param() where param of 0 means to disable the CTO bit in the protect_c flash register (bit 4 of 0x482c). BUG=b:66457399 BRANCH=eve TEST=Sent 'ectool batteryparam set 0 <key>' and verifed that new value of this register is 0x5. Also, used debug console command to write the value back to 0x15 and repeated the test. Change-Id: Ia77a505fddfbcedfe31a92caae37e09e0a7f17a1 Signed-off-by: Scott Collyer <scollyer@google.com> Reviewed-on: https://chromium-review.googlesource.com/696436 Tested-by: Scott Collyer <scollyer@chromium.org> Reviewed-by: Shawn N <shawnn@chromium.org> Reviewed-by: Duncan Laurie <dlaurie@google.com> Commit-Queue: Scott Collyer <scollyer@chromium.org> Trybot-Ready: Scott Collyer <scollyer@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2320261 Commit-Queue: Patryk Duda <pdk@semihalf.com> Tested-by: Patryk Duda <pdk@semihalf.com> Reviewed-by: Jett Rink <jettrink@chromium.org>
* eve: Enable optimized SHA256 implementationDuncan Laurie2020-09-051-0/+1
| | | | | | | | | | | | | | | BRANCH=eve BUG=b:64196191 TEST=boot eve and check hash done time Change-Id: I48e64d126b67c3f58fc3a8cd4f0aa3226ce89f33 Signed-off-by: Duncan Laurie <dlaurie@google.com> Reviewed-on: https://chromium-review.googlesource.com/664164 Reviewed-by: Scott Collyer <scollyer@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2320260 Tested-by: Patryk Duda <pdk@semihalf.com> Commit-Queue: Patryk Duda <pdk@semihalf.com> Reviewed-by: Jett Rink <jettrink@chromium.org>
* eve: Re-enable discharge-on-ac for all boardsDuncan Laurie2020-09-041-0/+2
| | | | | | | | | | | | | | | | | Enable discharge on ac when battery is full. BUG=b:64913617 BRANCH=eve TEST=test that when on AC and battery is full it goes into discharge mode Change-Id: I71397e7f0b24e449b13c00da87c8f81cfd806c2c Signed-off-by: Duncan Laurie <dlaurie@google.com> Reviewed-on: https://chromium-review.googlesource.com/662907 Reviewed-by: Scott Collyer <scollyer@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2320259 Tested-by: Patryk Duda <pdk@semihalf.com> Commit-Queue: Patryk Duda <pdk@semihalf.com> Reviewed-by: Jett Rink <jettrink@chromium.org>
* eve: Update hibernate delayDuncan Laurie2020-09-031-0/+6
| | | | | | | | | | | | | | | | | | Hibernate after 7 days, or 1 day if battery is less than 10%. BUG=b:35584895 BRANCH=eve TEST=check that hibernate delay by default is 604800 seconds, but only 86400 seconds if the battery is less than 10%. Change-Id: I826b6df170f296afb2af8c053c05521383030cb1 Signed-off-by: Duncan Laurie <dlaurie@google.com> Reviewed-on: https://chromium-review.googlesource.com/611017 Reviewed-by: Scott Collyer <scollyer@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2320254 Tested-by: Patryk Duda <pdk@semihalf.com> Commit-Queue: Patryk Duda <pdk@semihalf.com> Reviewed-by: Jett Rink <jettrink@chromium.org>
* eve: Clean up board version definesDuncan Laurie2020-09-021-0/+2
| | | | | | | | | | | | | | | | | | Add missing defines and use this enum instead of numbers throughout board.c. BUG=b:35581264 BRANCH=eve TEST=make -j BOARD=eve Change-Id: I5bbe1f67748942ed3a62db9f5d47ef9753cfb16d Signed-off-by: Duncan Laurie <dlaurie@google.com> Reviewed-on: https://chromium-review.googlesource.com/611015 Reviewed-by: Scott Collyer <scollyer@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2320252 Tested-by: Patryk Duda <pdk@semihalf.com> Commit-Queue: Patryk Duda <pdk@semihalf.com> Reviewed-by: Jett Rink <jettrink@chromium.org>
* eve: Move board level TCPC init to happen in pd_task initDuncan Laurie2020-08-311-0/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | When the board level TCPC run as an init hook it will frequently lead to an EC reset when we are trying to recovery a disconnected battery, potentially even a reboot loop with the most unlucky timing. If we instead call it from the pd_task before tcpc_init is called then the board init hook can stall the pd_task init until the battery is out of disconnect mode, or giving up after 2 seconds in case the battery never seems to recover. This accomplishes two goals: ensure the PD chips are not reset until the battery is out of disconnect and delay start of the pd_task (and PD negotiation) until the battery is out of disconnect state. With this change I never see an EC reset when recovering from a disconnected battery state. BUG=b:63957122 BRANCH=eve TEST=manual testing on Eve with 50+ battery disconnect and battery cutoff cycles to ensure it never triggers an unexpected EC reset. Change-Id: Ie1604e82916ea203a32cbdde98f6697e344bba4c Signed-off-by: Duncan Laurie <dlaurie@google.com> Reviewed-on: https://chromium-review.googlesource.com/592716 Reviewed-by: Furquan Shaikh <furquan@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2320248 Commit-Queue: Patryk Duda <pdk@semihalf.com> Tested-by: Patryk Duda <pdk@semihalf.com> Reviewed-by: Jett Rink <jettrink@chromium.org>
* eve: add motion lid checkGwendal Grignou2020-08-291-0/+2
| | | | | | | | | | | | | | | | | | | | | | In case the GMR does not work, we do not send (SW_TABLET_MODE), value 0, when the lid is against the base (tablet mode). Use lid angle calculation to help. In practice it triggers tablet mode earlier (at around 300) and exists later (240 degree). BUG=b:63702771 BRANCH=eve TEST=Check tablet mode is mostly driven by accels. Change-Id: I832629bfaedcd2154c2839a8fda03248509662ec Signed-off-by: Gwendal Grignou <gwendal@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/580334 Reviewed-by: Duncan Laurie <dlaurie@google.com> Reviewed-by: Aaron Durbin <adurbin@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2320005 Commit-Queue: Patryk Duda <pdk@semihalf.com> Tested-by: Patryk Duda <pdk@semihalf.com> Reviewed-by: Jett Rink <jettrink@chromium.org>
* eve: Check physical battery presence before inhibiting powerDuncan Laurie2020-08-281-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | In order to satisfy factory testing requirements we need to boot a bare board with just an AC adapter without requiring a power button. However we also don't want to always allow booting of the battery is present but cut-off (which will indicate BP_NO so we can't use the existing battery_is_present function) or has critically low level as it may not immediately boot. To accomplish this add a function that allows the board to specify a custom "hardware presence" for the battery that is separate from the battery presence check. This could also likely be accomplished by adding another state to "enum battery_present" but that could alter other behavior in the current charge state machine.. BUG=b:63957122 BRANCH=eve TEST=manual testing on Eve to ensure a board without a battery is allowed to power-up when power is first applied without requiring a power button press. Also ensure that a critically low or cut-off battery that does not try to immediately power up. Change-Id: Ia7c6b5ad5043aab15dbc99be7816353d6b92e720 Signed-off-by: Duncan Laurie <dlaurie@google.com> Reviewed-on: https://chromium-review.googlesource.com/582544 Reviewed-by: Furquan Shaikh <furquan@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2320004 Tested-by: Patryk Duda <pdk@semihalf.com> Commit-Queue: Patryk Duda <pdk@semihalf.com> Reviewed-by: Jett Rink <jettrink@chromium.org>
* eve: Cut off critically low batteryDuncan Laurie2020-08-271-0/+1
| | | | | | | | | | | | | | | | | | | | | | | Instead of going to hibernate when the battery is critically low we should cut off power entirely. Even with the PMIC shut down the H1 chip consumes more power than is healthy when the battery is already critically low, depleting it to dangerously low voltage levels faster than it should. BUG=b:63957122 BRANCH=eve TEST=manual testing on Eve with critically low battery to ensure that it is cut off instead of going into hibernate. Change-Id: I2eaba3623385a4eb3daa39a2fa8aa08d3ec6366e Signed-off-by: Duncan Laurie <dlaurie@google.com> Reviewed-on: https://chromium-review.googlesource.com/582543 Reviewed-by: Furquan Shaikh <furquan@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2320003 Tested-by: Patryk Duda <pdk@semihalf.com> Reviewed-by: Jett Rink <jettrink@chromium.org> Commit-Queue: Patryk Duda <pdk@semihalf.com>
* eve: Enable USB_PD_COMM_LOCKEDDuncan Laurie2020-08-271-0/+1
| | | | | | | | | | | | | | | | | | | | | Removing CONFIG_SYSTEM_UNLOCKED is not enough to lock down PD communication in RO when the system is write protected, this option must also be enabled. BUG=b:63957122 BRANCH=eve TEST=manual testing with WP enabled system to ensure that it does not do PD negotiation in RO Change-Id: I8fbfaa0a3fb2d97b9484688ed6767bf70e8f4759 Signed-off-by: Duncan Laurie <dlaurie@google.com> Reviewed-on: https://chromium-review.googlesource.com/582541 Reviewed-by: Scott Collyer <scollyer@chromium.org> Reviewed-by: Furquan Shaikh <furquan@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2320001 Tested-by: Patryk Duda <pdk@semihalf.com> Reviewed-by: Jett Rink <jettrink@chromium.org> Commit-Queue: Patryk Duda <pdk@semihalf.com>
* eve: Set minimum battery percentage for booting to 2%Duncan Laurie2020-08-271-1/+1
| | | | | | | | | | | | | | | | | | | | | | With a battery that has 1% charge there may not be enough to boot the AP, resulting in a brown-out. Raise this to 2% to get more consistent behavior to let the battery charge before booting. BUG=b:63957122 BRANCH=eve TEST=manual testing with depleted batteries to ensure that the AP does not boot until it has 2% charge Change-Id: I7e64925c480993d37754cd51a1dd24fcdc7ba2ec Signed-off-by: Duncan Laurie <dlaurie@google.com> Reviewed-on: https://chromium-review.googlesource.com/582540 Reviewed-by: Scott Collyer <scollyer@chromium.org> Reviewed-by: Furquan Shaikh <furquan@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2320000 Tested-by: Patryk Duda <pdk@semihalf.com> Reviewed-by: Jett Rink <jettrink@chromium.org> Commit-Queue: Patryk Duda <pdk@semihalf.com>
* eve: Remove the LIMIT_POWER config optionsDuncan Laurie2020-08-261-2/+0
| | | | | | | | | | | | | | | | | | | | | | These config options change the behavior of charge_prevent_power_on and ignore the minimum battery percentage for booting. Since we do not have any AP code to actually handle this state we don't want it to always boot the AP or it might brown out with a battery that is critically low. BUG=b:63957122 BRANCH=eve TEST=manual testing with low battery to ensure it does not always attempt to boot the AP. Change-Id: Ic7be3f4d07570e00ea3afa1124af083da0e789c3 Signed-off-by: Duncan Laurie <dlaurie@google.com> Reviewed-on: https://chromium-review.googlesource.com/582539 Reviewed-by: Furquan Shaikh <furquan@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2319999 Tested-by: Patryk Duda <pdk@semihalf.com> Reviewed-by: Jett Rink <jettrink@chromium.org> Commit-Queue: Patryk Duda <pdk@semihalf.com>
* eve: Remove CONFIG_BATTERY_REVIVE_DISCONNECTDuncan Laurie2020-08-261-1/+0
| | | | | | | | | | | | | | | | | | | | | | | | | Since Eve has a custom battery presence function we do not need the disconnect behavior as it will recover better by letting the state machine handle it with precharge directly. Without this change I would sometimes see the first boot after a cut-off battery get stuck with "battery found in disconnect state" and not able to boot up the AP. BUG=b:63957122 BRANCH=eve TEST=manual testing on Eve with cut-off batteries shows more consistent behavior to boot the AP after plugging in adapter. Change-Id: I2d115788c1f9f6171a01525970285abb9f3467a2 Signed-off-by: Duncan Laurie <dlaurie@google.com> Reviewed-on: https://chromium-review.googlesource.com/582538 Reviewed-by: Scott Collyer <scollyer@chromium.org> Reviewed-by: Furquan Shaikh <furquan@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2319998 Tested-by: Patryk Duda <pdk@semihalf.com> Reviewed-by: Jett Rink <jettrink@chromium.org> Commit-Queue: Patryk Duda <pdk@semihalf.com>
* eve: Remove CONFIG_SYSTEM_UNLOCKEDDuncan Laurie2020-08-251-6/+0
| | | | | | | | | | | | | | | | | | Remove this debug feature on the Eve firmware branch. BUG=b:35582164 BRANCH=eve TEST=manual testing on Eve Change-Id: I620e42b118a40492c9db664b208ad5ce78bf4f0c Signed-off-by: Duncan Laurie <dlaurie@google.com> Reviewed-on: https://chromium-review.googlesource.com/573144 Reviewed-by: Shawn N <shawnn@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2319996 Tested-by: Patryk Duda <pdk@semihalf.com> Reviewed-by: Jett Rink <jettrink@chromium.org> Reviewed-by: Jack Rosenthal <jrosenth@chromium.org> Commit-Queue: Patryk Duda <pdk@semihalf.com>
* usb_pd: Rename CONFIG_CMD_PD_CONTROL to CONFIG_HOSTCMD_PD_CONTROLVijay Hiremath2020-05-151-1/+1
| | | | | | | | | | | | BUG=none BRANCH=none TEST=make buildall -j Change-Id: I33a63d6ac45bbd46da74db34a21d1bb130476362 Signed-off-by: Vijay Hiremath <vijay.p.hiremath@intel.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2196946 Reviewed-by: Sooraj Govindan <sooraj.govindan@intel.corp-partner.google.com> Reviewed-by: Keith Short <keithshort@chromium.org>
* Various boards: Shrink UART Tx buffer to save spaceAbe Levkoy2020-05-011-0/+2
| | | | | | | | | | | | | | | | Future USB-PD discovery changes will need that space. In each case, reduce the size of the buffer by half (must be a power of 2). Note: This change is only to save shared memory space in the ToT build. It should not be picked onto release branches. BUG=b:152420269,b:152419795 TEST=make buildall BRANCH=none Change-Id: Ia26c1cdd7eb4068d410b81bb4a3335d2c9142049 Signed-off-by: Abe Levkoy <alevkoy@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2163795
* driver: Replace BMI160 to BMI in board configChing-Kang Yen2020-04-231-1/+1
| | | | | | | | | | | | | | | | | Replace some macro of BMI160 to BMI version for common function of BMI series. Make board config include the accelgyro_bmi_common.h instead of accel_gyro_bmi160.h. BRANCH=None BUG=b:146144827 TEST=make buildall -j Change-Id: I043ff8a92f15295ead3fa5c1e292319e2b4fa21a Signed-off-by: Ching-Kang Yen <chingkang@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2156525 Reviewed-by: Gwendal Grignou <gwendal@chromium.org>
* common/keyboard_vivaldi: New keyboard framework for custom layoutRajat Jain2020-04-211-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Vivaldi is a new keyboard that allows individual boards to have additional or different top row keys and/or to reorder those keys. The primary agenda of vivaldi is to allow customization of the top row keys. However, as a secondary objective, it also allows coreboot to send a keymap to the kernel, for only the keys that are actually present on the keyboard. As part of enabling vivaldi, another feature that get enabled is to start sending action codes instead of function codes for the top row of the keyboard. go/vivaldi-prd go/vivaldi-design go/vivaldi-fw-design With this patch, things remain unchanged for any boards that do not provide board_set_vivaldi_keybd_config(). For boards that do provide it: * EC begins to send action scancodes instead of function scancodes for the top row when top row keys are pressed. * EC responds to an EC command from the coreboot, that asks for the layout for the keyboard. Coreboot uses this to expose corresponding keycodes to the kernel. BUG=b:146501925 TEST=Check on Jinlon the (new) expected scancodes are output from EC. BRANCH=firmware-hatch-12672.B Signed-off-by: Rajat Jain <rajatja@google.com> Change-Id: I1f45ce6eee138a984f8d4caef1ec76c9538dd30b Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2135566
* common: Make scancode table always mutableRajat Jain2020-04-211-1/+0
| | | | | | | | | | | | | | | | Since the vivaldi requires the scancode to be mutable, and vivaldi shall be enabled by default for all boards, thus make the scancode table to be always mutable and get rid of the config option it hides behind. BUG=b:146501925 TEST=Build BRANCH=firmware-hatch-12672.B Signed-off-by: Rajat Jain <rajatja@google.com> Change-Id: Iaedcd6d84caf31c91a61854f96414bcea38f5c2a Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2133825 Reviewed-by: Jett Rink <jettrink@chromium.org>
* TCPMV1/2: Make the PD Config Flags more consistentSam Hurst2020-02-221-0/+1
| | | | | | | | | | | | | | | | | | | | The current use of the PD Config Flags are a bit confusing and has been changed to the following: The CONFIG_USB_POWER_DELIVERY flag is used to enable and disable the TCPMv1 and TCPMv2 stacks. And when CONFIG_USB_POWER_DELIVERY is enabled, one of the following must be enabled: CONFIG_USB_PD_TCPMV1 - legacy power delivery state machine CONFIG_USB_PD_TCPMV2 - current power delivery state machine BUG=b:149993808 BRANCH=none TEST=make -j buildall Change-Id: Ie3f8615a75b15b4f1c703f57f3db9e152a471238 Signed-off-by: Sam Hurst <shurst@google.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2068519 Reviewed-by: Diana Z <dzigterman@chromium.org>
* Clean up double tap related definitionHeng-Ruey Hsu2019-11-131-2/+2
| | | | | | | | | | | | | | | | Fixes: commit 2f2a81079191ca "Add double tap and make motion sense wake up ap" CONFIG_GESTURE_DETECTION_MASK includes significant motion in activity list. We cannot use it for double tap. Add more flags to distinguish it. BUG=b:135575671 BRANCH=kukui TEST=AP can receive mkbp event when double tap is triggered Change-Id: I13776a01b14dc251396a615c8c97353f2d0477d4 Signed-off-by: Heng-Ruey Hsu <henryhsu@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1911263 Reviewed-by: Gwendal Grignou <gwendal@chromium.org>
* Rename CONFIG_USB_PD_PORT_COUNT as CONFIG_USB_PD_PORT_MAX_COUNTKarthikeyan Ramasubramanian2019-11-011-1/+1
| | | | | | | | | | | | | | | | | Certain SKUs of certain boards have lesser number of USB PD ports than defined by CONFIG_USB_PD_PORT_COUNT. Hence rename CONFIG_USB_PD_PORT_COUNT as CONFIG_USB_PD_PORT_MAX_COUNT. BUG=b:140816510, b:143196487 BRANCH=octopus TEST=make -j buildall; Boot to ChromeOS Change-Id: I7c33b27150730a1a3b5813b7b4a72fd24ab73c6a Signed-off-by: Karthikeyan Ramasubramanian <kramasub@google.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1879337 Tested-by: Karthikeyan Ramasubramanian <kramasub@chromium.org> Reviewed-by: Jett Rink <jettrink@chromium.org> Commit-Queue: Jett Rink <jettrink@chromium.org>
* eSPI: Configure SLP_S3, SLP_S4 separatelyAbe Levkoy2019-10-301-1/+2
| | | | | | | | | | | | | | | | | | Split the configuration option CONFIG_HOSTCMD_ESPI_VW_SLP_SIGNALS into separate options controlling SLP_S3 and SLP_S4. Allow volteer to configure SLP_S3 as a GPIO and SLP_S4 as an eSPI virtual wire. Cause a build error if virtual wires are configured, but eSPI is not. BUG=b:139553375,b:143288478 TEST=make buildall TEST=Build volteer with CONFIG_HOSTCMD_ESPI_VW_S4 defined but CONFIG_HOSTCMD_ESPI undefined; observe build error BRANCH=none Change-Id: I8c6737e2ccb1a77a882e5fa65c6eddb342209b61 Signed-off-by: Abe Levkoy <alevkoy@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1881758 Reviewed-by: Keith Short <keithshort@chromium.org>
* config: Merge CONFIG_CHARGER_V2 into CONFIG_CHARGERKeith Short2019-09-181-1/+0
| | | | | | | | | | | | | | | | For all boards that defined CONFIG_CHARGER, CONFIG_CHARGER_V2 is also defined. Remove references to CONFIG_CHARGER_V2 from board header files. Replace CONFIG_CHARGER_V2 in common C modules with CONFIG_CHARGER when appropriate. BUG=b:139699769 BRANCH=none TEST=make buildall -j Change-Id: I6b54baf4ad2406bbed629b6b272dad9ea6a81280 Signed-off-by: Keith Short <keithshort@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1789420 Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org>
* config: Refactor CONFIG_ACCEL_FIFO to enable use of IS_ENABLEDYuval Peress2019-09-031-3/+4
| | | | | | | | | | | | | | | This change allows us to use the IS_ENABLED condition to replace the various ifdef guards around the CONFIG_ACCEL_FIFO BUG=b:137758297,chromium:981990 BRANCH=None TEST=buildall and CTS tests on Arcada Change-Id: I65d36bac19855e51c830a33e6f3812575e8d15d9 Signed-off-by: Yuval Peress <peress@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1704164 Reviewed-by: Jack Rosenthal <jrosenth@chromium.org> Reviewed-by: Gwendal Grignou <gwendal@chromium.org>
* Remove __7b, __8b and __7bfDenis Brockus2019-07-201-3/+3
| | | | | | | | | | | | | | | | | | | The extentions were added to make the compiler perform most of the verification that the conversion was being done correctly to remove 8bit addressing as the standard I2C/SPI address type. Now that the compiler has verified the code, the extra extentions are being removed BUG=chromium:971296 BRANCH=none TEST=make buildall -j TEST=verify sensor functionality on arcada_ish Change-Id: I36894f8bb9daefb5b31b5e91577708f6f9af2a4f Signed-off-by: Denis Brockus <dbrockus@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1704792 Reviewed-by: Jack Rosenthal <jrosenth@chromium.org>
* Use 7bit I2C/SPI slave addresses in ECDenis Brockus2019-07-191-3/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Opt for 7bit slave addresses in EC code. If 8bit is expected by a driver, make it local and show this in the naming. Use __7b, __7bf and __8b as name extensions for i2c/spi addresses used in the EC codebase. __7b indicates a 7bit address by itself. __7bf indicates a 7bit address with optional flags attached. __8b indicates a 8bit address by itself. Allow space for 10bit addresses, even though this is not currently being used by any of our attached devices. These extensions are for verification purposes only and will be removed in the last pass of this ticket. I want to make sure the variable names reflect the type to help eliminate future 7/8/7-flags confusion. BUG=chromium:971296 BRANCH=none TEST=make buildall -j Change-Id: I2fc3d1b52ce76184492b2aaff3060f486ca45f45 Signed-off-by: Denis Brockus <dbrockus@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1699893 Reviewed-by: Jack Rosenthal <jrosenth@chromium.org>
* intel_x86/power: Consolidate chipset specific power signals arrayVijay Hiremath2019-06-131-10/+0
| | | | | | | | | | | | | | | Currently chipset specific power signals are defined at board/baseboard level. These power signals are moved to chipset specific file to minimize the redundant power signals array defined for each board/baseboard. BUG=b:134079574 BRANCH=none TEST=make buildall -j Change-Id: I351904f7cd2e0f27844c0711beb118d390219581 Signed-off-by: Vijay Hiremath <vijay.p.hiremath@intel.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1636837 Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
* common: motion_sense: Require CONFIG_MOTION_SENSOR_MAX_COUNTYuval Peress2019-06-051-0/+1
| | | | | | | | | | | | | | | This changes requires all boards to define the maximum number of sensors they support. This will allow us to later create static arrays with the appropriate length. BUG=chromium:966506 BRANCH=None TEST=make buildall Change-Id: I5a2fa8f0fdcaef69065dfd4c2bfea4e3f371e986 Signed-off-by: Yuval Peress <peress@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1637414 Reviewed-by: Jett Rink <jettrink@chromium.org>
* common: bit change 1 << constants with BIT(constants)Gwendal Grignou2019-03-261-2/+2
| | | | | | | | | | | | | | | | | Mechanical replacement of bit operation where operand is a constant. More bit operation exist, but prone to errors. Reveal a bug in npcx: chip/npcx/system-npcx7.c:114:54: error: conversion from 'long unsigned int' to 'uint8_t' {aka 'volatile unsigned char'} changes value from '16777215' to '255' [-Werror=overflow] BUG=None BRANCH=None TEST=None Change-Id: I006614026143fa180702ac0d1cc2ceb1b3c6eeb0 Signed-off-by: Gwendal Grignou <gwendal@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/1518660 Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org>
* motion: Define macros for custom eventsGwendal Grignou2019-03-201-3/+4
| | | | | | | | | | | | | | Define macros to define custom events used by sensor interrupt handlers. Remove CONFIG_ for activity events. BUG=none BRANCH=none TEST=compile, sensors work on eve. Change-Id: I08ef6ed2a004466ebc5f7650d6952a150b9de713 Signed-off-by: Gwendal Grignou <gwendal@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/1272189 Reviewed-by: Jett Rink <jettrink@chromium.org>
* eve: Set BMI160 INT2 as outputGwendal Grignou2019-02-281-0/+1
| | | | | | | | | | | | | This pin is not used, set it as output to clean FIFO messages. BUG=chromium:917868 BRANCH=eve TEST=Check fifo headers. Change-Id: Ib2b783ea65b1ecb56e831440367d043b86022e51 Signed-off-by: Gwendal Grignou <gwendal@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/1390939 Commit-Ready: ChromeOS CL Exonerator Bot <chromiumos-cl-exonerator@appspot.gserviceaccount.com>
* config: Add magnetometer definitionsGwendal Grignou2019-02-081-1/+1
| | | | | | | | | | | | | | | | | | | Add all possible supported or soon-to-be supported configuration of magnetometer behind accelerometers. Use a more generic variable to indicate the i2c address of the secondary device. BUG=b:110143516,b:115587004 BRANCH=none TEST=compile Change-Id: Ic00c413f2ec5fa0e6bf1c98861daa02f00769a65 Signed-off-by: Gwendal Grignou <gwendal@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/1361989 Commit-Ready: Karthikeyan Ramasubramanian <kramasub@chromium.org> Tested-by: Justin TerAvest <teravest@chromium.org> Reviewed-by: Karthikeyan Ramasubramanian <kramasub@chromium.org> Reviewed-by: Diana Z <dzigterman@chromium.org>
* eve: Enable support for multi-profile DPTFFurquan Shaikh2018-11-151-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | This change enables support for multi-profile DPTF on eve, which uses a hall sensor. Thus the following changes are made: 1. Select config CONFIG_DPTF_MULTI_PROFILE 2. Set profile number based on the TABLET_MODE_L GPIO state (input from the hall sensor indicating completely flipped mode). This change is being done only as a reference for future boards with hall sensors to enable multi-profile DPTF. DO NOT cherry-pick this to any eve branch. CQ-DEPEND=CL:1295851,CL:1295852 BUG=b:117844490 BRANCH=None (Do not cherry-pick to any eve branch) TEST=make -j buildall Change-Id: I71e2078d8f63cc4d5939b76ffca962f041a48e42 Signed-off-by: Furquan Shaikh <furquan@google.com> Reviewed-on: https://chromium-review.googlesource.com/1313471 Commit-Ready: Furquan Shaikh <furquan@chromium.org> Tested-by: Furquan Shaikh <furquan@chromium.org> Reviewed-by: Duncan Laurie <dlaurie@google.com>
* dptf: Get rid of CONFIG_DPTF_DEVICE_ORIENTATIONFurquan Shaikh2018-10-301-1/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | CONFIG_DPTF_DEVICE_ORIENTATION was added to indicate mode change to the host to allow it to read the tablet mode flag from shared EC memory and select the right DPTF table to load (if supported). However, this config seems unnecessary because of the following reasons: 1. Host sets SCI mask to indicate to the EC which events it wants to process. Thus, even if the EC sets mode change flag, it will not be notified to the host unless it supports mode change event. 2. Additionally, if host supports mode change event, but does not support multiple DPTF tables, then EC ACPI code takes care of ensuring that there is a thermal event handler present to reload tables. 3. CONFIG_DPTF_DEVICE_ORIENTATION was defined for almost all new x86 boards. BUG=b:117844490 BRANCH=None TEST=make -j buildall Change-Id: Ic4097ae047e2d559673a321da4df86514f902993 Signed-off-by: Furquan Shaikh <furquan@google.com> Reviewed-on: https://chromium-review.googlesource.com/1292359 Commit-Ready: Furquan Shaikh <furquan@chromium.org> Tested-by: Furquan Shaikh <furquan@chromium.org> Reviewed-by: Gwendal Grignou <gwendal@chromium.org>
* eve: Delay charge port selection until VBUS is stable or 1s has passedSam Hurst2018-08-011-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | When a charge port is selected and VBUS is 5V, the inrush current causes VBUS to droop which could signal a sink disconnection. To mitigate this problem, charge port selection is delayed until VBUS is stable or 1s has passed. Before 1s has passed, PD will hopefully have negotiated a VBUS voltage of at least 9V. This CL is also a workaround for the issue outlined in b:74753447 Signed-off-by: Sam Hurst <shurst@chromium.org> BUG=b:69439094 BRANCH=None TEST=`make -j buildall` Manual tested with Belkin Express Dock and Moshi audio adapter. Test Belkin with following configuration: PORT0: PORT1: Belkin OPEN OPEN Belkin Belkin Blackcat Blackcat Belkin Belkin EC terminal output: Port 0: [654.645288 TCPC p0 Exit Low Power Mode] C0 st14 C0 st15 C0 st17 C0 st18 C0 st19 Requested 5000 V 3000 mA (for 900/900 mA) C0 st20 C0 st21 C0 st22 C0 st23 C0 st24 C0 st23 C0 st26 C0 st27 C0 st28 C0 st29 [655.375668 New chg p0] C0 st5 [655.380708 Ramp reset: st1] [655.381704 CL: p0 s8 i500 v5000] [655.392598 New chg p0] [655.393574 Ramp reset: st1] [655.394504 CL: p0 s2 i3000 v5000] C0 Req [4] 15000mV 3000mA [655.512126 New chg p0] [655.514456 Ramp reset: st1] C0 st715219 CL: p0 s0 ] C0 st8 [655.639762 Ramp reset: st1] [655.640301 CL: p0 s0 i3000 v15000] [656.688735 AC on] [657.385539 Ramp p0 st5 3000mA 3000mA] [657.471108 Battery 70% / 7h:36 to empty] [659.721858 charge_request(8800mV, 5376mA)] [660.973258 charge_request(8800mV, 3712mA)] [697.506594 Battery 71% / 1h:1 to full] Port 1: [729.384242 TCPC p1 Exit Low Power Mode] C1 st2 C1 st3 C1 st14 C1 st15 C1 st17 C1 st18 C1 st19 Requested 5000 V 3000 mA (for 900/900 mA) C1 st20 C1 st21 C1 st22 C1 st23 C1 st24 C1 st23 C1 st26 C1 st27 C1 st28 C1 st29 [730.339719 New chg p1] [730.340602 Ramp reset: st1] [C1 st5 730.341457 CL: p1 s8 i500 v5000] [730.356552 New chg p1] [730.357311 Ramp reset: st1] [730.358095 CL: p1 s2 i3000 v5000] C1 Req [4] 15000mV 3000mA [730.478577 New chg p1] [730.480986 Ramp reset: st1] [730.481829 CL:Cp1 s0 i500 v15] C1 st8 [730.607116 Ramp reset: st1] [730.607813 CL: p1 s0 i3000 v15000] [731.654877 AC on] [732.345420 Ramp p1 st5 3000mA 3000mA] [732.589802 Battery 71% / 10h:28 to empty] [734.340030 charge_request(8800mV, 5376mA)] [735.091263 charge_request(8800mV, 3712mA)] [767.879314 Battery 72% / 1h:1 to full] Tested Moshi with followint configuration: Port0: Port1: Moshi-pwr OPEN OPEN Moshi-pwr Moshi-pwr Blackcat Blackcat Moshi-pwr Moshi-audio OPEN OPEN Moshi-audio Moshi-audio Blackcat Blackcat Moshi-pwr Moshi-pwr-audio OPEN OPEN Moshi-pwr-audio Moshi-pwr-audio Blackcat Blackcat Moshi-pwr-audio Moshi EC terminal output: [2330.883267 TCPC p0 Low Power Mode] [2330.883664 TCPC p0 reset!] [2330.916049 TCPC p0 Low Power Mode] [2330.916475 TCPC p0 reset!] [2330.934010 TCPC p0 Exit Low Power Mode] C0 st14 C0 st15 C0 st17 C0 st18 C0 st19 Requested 5000 V 3000 mA (for 3000/3000 mA) C0 st20 C0 st21 C0 st22 C0 st23 C0 st24 C0 st23 C0 st26 C0 st23 C0 st27 C0 st28 C0 st29 [2332.398132 New chg p0] [2332.398883 Ramp reset: st1] [2332.399745 CL: p0 s8 i500 v5000] C0 st5 [2332.476132 New chg p0] [2332.476933 Ramp reset: st1] [2332.477705 CL: p0 s2 i3000 v5000] C0 Req [4] 15000mV 2970mA [2332.493597 New cCg p0C0 st7 ] [2332[2332.5001C0 st8 [2332.674727 Ramp reset: st1] [2332.675510 CL: p0 s0 i2970 v15000] [2333.668216 AC on] [2334.403481 Ramp p0 st5 2970mA 2970mA] [2334.450155 Battery 80% / 11h:18 to empty] [2335.448877 charge_request(8800mV, 5376mA)] [2336.699875 charge_request(8800mV, 3712mA)] [2356.466385 Battery 81% / 1h:1 to full] Change-Id: Iba909c252094c0e5ca4cf974aabcfe1eaf002efd Reviewed-on: https://chromium-review.googlesource.com/1130000 Commit-Ready: Sam Hurst <shurst@google.com> Tested-by: Sam Hurst <shurst@google.com> Reviewed-by: Duncan Laurie <dlaurie@google.com>
* espi: Rename CONFIG_HOSTCMD_ESPI_VW_SIGNALS to ↵Furquan Shaikh2018-07-271-1/+1
| | | | | | | | | | | | | | | | | | | | | CONFIG_HOSTCMD_ESPI_VW_SLP_SIGNALS This change renames CONFIG_HOSTCMD_ESPI_VW_SIGNALS to CONFIG_HOSTCMD_ESPI_VW_SIGNALS in order to make it clear that this config option indicates that chipset sleep signals (SLP_S3 and SLP_S4) are tranmitted over virtual wires instead of physical lines with eSPI. BUG=b:111859300 BRANCH=None TEST=make -j buildall Change-Id: Iab4423abc9102164d4f43296a279c24355445341 Signed-off-by: Furquan Shaikh <furquan@google.com> Reviewed-on: https://chromium-review.googlesource.com/1151048 Commit-Ready: Furquan Shaikh <furquan@chromium.org> Tested-by: Furquan Shaikh <furquan@chromium.org> Reviewed-by: Aaron Durbin <adurbin@chromium.org> Reviewed-by: Jett Rink <jettrink@chromium.org>
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