| Commit message (Collapse) | Author | Age | Files | Lines |
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This patch adds 2nd ppc source syv682x base on GPIO97 status.
BUG=b:160139798
BRANCH=octopus
TEST=The GPIO97 high can switch PPC from NPX to syv682x code.
Change-Id: If813ed6993338981417d7271bf0920f15bdb5e1a
Signed-off-by: Matt_Wang <Matt_Wang@compal.corp-partner.google.com>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2291451
Reviewed-by: Elthan Huang <elthan_huang@compal.corp-partner.google.com>
Reviewed-by: Marco Chen <marcochen@chromium.org>
Reviewed-by: Jett Rink <jettrink@chromium.org>
Tested-by: Elthan Huang <elthan_huang@compal.corp-partner.google.com>
Commit-Queue: Matt Wang <matt_wang@compal.corp-partner.google.com>
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BRANCH=octopus
BUG=b:142953493
TEST=verify that later modification of gpio flag will no allow driving
signal high.
Change-Id: I0b8c1503ba8c03afa3eb6fa4f921b3480106f05b
Signed-off-by: Jett Rink <jettrink@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1869407
Commit-Queue: Edward Hill <ecgh@chromium.org>
Reviewed-by: Edward Hill <ecgh@chromium.org>
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GMR sensors can be used to
(1) detect clamshell/tablet mode
(2) detect lid open/closed
But hall sensors can only do (2).
Therefore the naming related to "hall sensor" for tablet mode
application is incorrect.
This patch performs the following renaming to better reflect the reality:
config:
CONFIG_HALL_SENSOR -> CONFIG_GMR_TABLET_MODE
CONFIG_HALL_SENSOR_CUSTOM -> CONFIG_GMR_TABLET_MODE_CUSTOM
CONFIG_DPTF_MOTION_LID_NO_HALL_SENSOR ->
CONFIG_DPTF_MOTION_LID_NO_GMR_SENSOR
GPIO:
HALL_SENSOR_GPIO_L -> GMR_TABLET_MODE_GPIO_L
functions:
hall_sensor_disable() -> gmr_tablet_switch_disable()
hall_sensor_isr() -> gmr_tablet_switch_isr()
hall_sensor_int() -> gmr_tablet_switch_init()
variable:
hall_sensor_at_360 -> gmr_sensor_at_360
BUG=b:139378190
BRANCH=none
TEST=make buildall
Change-Id: I28393d056ddd128d8ffafc16a1f9fefee5455ccc
Signed-off-by: Philip Chen <philipchen@google.com>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1757275
Reviewed-by: Furquan Shaikh <furquan@chromium.org>
Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
Commit-Queue: Philip Chen <philipchen@chromium.org>
Tested-by: Philip Chen <philipchen@chromium.org>
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First wave projects don't have any board with keyboard backlight so the
GPIO - KB_BL_PWR_EN should be configured by macro of UNIMPLEMENTED
instead of output direction.
BRANCH=octopus
BUG=b:130329644
TEST=buildall
Change-Id: I5c37b4b5ec3eb3f629c6d494064a6a27a3a1417c
Signed-off-by: Marco Chen <marcochen@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/1564493
Commit-Ready: ChromeOS CL Exonerator Bot <chromiumos-cl-exonerator@appspot.gserviceaccount.com>
Reviewed-by: Diana Z <dzigterman@chromium.org>
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At this point, support can be removed for board version 0. This leaves
the board code cleaner and provides a better starting point for any
follower projects.
BUG=b:128413812
BRANCH=octopus
TEST=builds
Change-Id: Ibdf9cdea5ef930ae3ff566679e5ecff9c9c78959
Signed-off-by: Diana Z <dzigterman@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1525065
Reviewed-by: Karthikeyan Ramasubramanian <kramasub@chromium.org>
Reviewed-by: Jett Rink <jettrink@chromium.org>
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Recent kernel changes expect the EC to use a dedicated interrupt pin
from the EC to the AP to notify the AP of pending sensor data (instead
of using an eSPI "interrupt").
The octopus boards have this hardware support, we just need to enable
the EC use it.
BRANCH=octopus
BUG=b:122552125,b:120679547
TEST=perform sensor tests on various octopus boards
Change-Id: I2bd3ffe14947d5f1ec71acbb53fcac962b007cf9
Signed-off-by: Jett Rink <jettrink@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/1403103
Reviewed-by: Enrico Granata <egranata@chromium.org>
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This will help with using the hardware support to reset the RTC on the
SoC.
BUG=b:119678692
BRANCH=octopus
TEST=make -j buildall && Boot to ChromeOS. Create a forced scenario to
trigger an RTC reset and ensure that EC does not get reset while the SoC
boots to ChromeOS. Execute warm reboot from AP, cold reboot from EC and
wake from ec hibernate (10 iterations each) and suspend_stress_test for
50 iterations successfully.
Change-Id: Ib79012b43e397d4c27ca829b135115bebf77dedb
Signed-off-by: Karthikeyan Ramasubramanian <kramasub@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/1354493
Reviewed-by: Furquan Shaikh <furquan@chromium.org>
Reviewed-by: Jett Rink <jettrink@chromium.org>
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Set the unused pins as input with an internal pull-up if there is no
external pull-up/pull-down. This helps save some power. Update the name
for CCD_MODE_EC_L pin. Add configuration for USB_C_OC and
TRACKPAD_INT_1V8_ODL pins.
BRANCH=None
BUG=b:110192175
TEST=make -j buildall && Bootup to chromeos. Also verified that power
stayed the same or slightly lower(18.67mW on PP3300_ec_mw to 18.23 mW over
10 sec average on Grabitter).
Change-Id: Icad1da2f76e119f2571769e3e953ff80c714817e
Signed-off-by: Karthikeyan Ramasubramanian <kramasub@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/1336733
Commit-Ready: ChromeOS CL Exonerator Bot <chromiumos-cl-exonerator@appspot.gserviceaccount.com>
Reviewed-by: Jett Rink <jettrink@chromium.org>
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This change performs the following renaming:
1. CONFIG_TABLET_SWITCH -> CONFIG_HALL_SENSOR
Indicates if a device has hall sensor
2. TABLET_MODE_GPIO_L -> HALL_SENSOR_GPIO_L
Provides the interrupt line from hall sensor to EC.
3. tablet_mode_isr -> hall_sensor_isr
Interrupt routine that gets control on hall sensor interrupt.
4. tablet_mode_init -> hall_sensor_init
Init routine for initializing hall sensor interrupt.
5. tablet_switch_disable -> hall_sensor_disable
Disable hall sensor interrupt and tablet mode sub-system.
This is done to separate hall sensor interrupt from tablet mode
handling. It is another step towards aligning tablet mode detection on
EC with Chrome. Hall sensor interrupt occurs when the lid is in
360-degree flipped mode. If tablet mode is not already triggered by
lid motion driver, then hall_sensor_isr will set tablet mode and take
necessary actions to disable input peripherals.
CQ-DEPEND=CL:1351518
BUG=b:120050761
BRANCH=octopus
TEST=make -j buildall
Change-Id: I5841f6875d538a624cb888bc048f252397ab457c
Signed-off-by: Furquan Shaikh <furquan@google.com>
Reviewed-on: https://chromium-review.googlesource.com/1350469
Commit-Ready: Furquan Shaikh <furquan@chromium.org>
Tested-by: Furquan Shaikh <furquan@chromium.org>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-by: Jett Rink <jettrink@chromium.org>
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No functional changes. Update names to BOARD_ID=2 version of the
schematics.
BRANCH=none
BUG=none
TEST=builds
Change-Id: I05d49aa436e9d08c0f61da3de7032c2875b3054c
Signed-off-by: Jett Rink <jettrink@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/1332467
Reviewed-by: Karthikeyan Ramasubramanian <kramasub@chromium.org>
Reviewed-by: Diana Z <dzigterman@chromium.org>
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All boards but yorp have added the ADC hardware support back for VBUS
ADC measurements. Move code to common baseboard
BRANCH=none
BUG=none
TEST=ADC measurements still works on phaser and fleex
Change-Id: I36a7ba92df21de4c1188613c6a12da83fdba6eb6
Signed-off-by: Jett Rink <jettrink@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/1337456
Commit-Ready: ChromeOS CL Exonerator Bot <chromiumos-cl-exonerator@appspot.gserviceaccount.com>
Reviewed-by: Karthikeyan Ramasubramanian <kramasub@chromium.org>
Reviewed-by: Diana Z <dzigterman@chromium.org>
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This change adds a call to the C0 TCPC reset for standalone TCPC boards
which have that pin hooked up in hardware, and adds the GPIO as
unimplemented for boards which do not have this yet.
BRANCH=None
BUG=b:112756630
TEST=Added a log print and rebooted EC on bobba to verify TCPC C0 reset,
then verified that charging on C0 worked. Also imaged yorp proto 2 and
rebooted, verifying C0 reset was not attempted.
Change-Id: I615861f0d9ce9b5a89692e3982ed2e19c7e0b237
Signed-off-by: Diana Z <dzigterman@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/1257647
Reviewed-by: Jett Rink <jettrink@chromium.org>
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This change adds CCD_MODE_ODL as an input for all octopus boards so it
will be present in the "gpioget" output for debugging.
BRANCH=None
BUG=b:116849648
TEST=builds, confirmed net showed up on bip and yorp proto 2
Change-Id: I0da194e433444f160f10573c27e5e463694adf38
Signed-off-by: Diana Z <dzigterman@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/1254923
Reviewed-by: Jett Rink <jettrink@chromium.org>
Reviewed-by: Justin TerAvest <teravest@chromium.org>
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This change enables PSL hibernate mode on fleex by:
1. Selecting CONFIG_HIBERNATE_PSL
2. Configure alternate mode on PSL pins
3. Configuring EC_RST_ODL for wake
BUG=b:115660922
BRANCH=None
TEST=make -j buildall
Change-Id: Ic0e31f7fd1cc18061a819a61a5d5a8badcaed2ab
Signed-off-by: Furquan Shaikh <furquan@google.com>
Reviewed-on: https://chromium-review.googlesource.com/1225351
Commit-Ready: Jett Rink <jettrink@chromium.org>
Tested-by: Jett Rink <jettrink@chromium.org>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
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This change sets GPIO83 to the new USB_C0_PD_RST. The GPIO flags are
set according to whether the board is a proto (where it is acting as
USB_OTG and needs to be open drain) or EVT (where it is an active-high
signal). This also adds CAM_SOC_EC_SYNC as an input for now.
BRANCH=None
BUG=b:112458646
TEST=Loaded onto fleex proto to verify proto board was detected and
USB_OTG set to open drain
Change-Id: Iffa4762f46d545a0431a27f2c1893f219695d367
Signed-off-by: Diana Z <dzigterman@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/1180354
Commit-Ready: Furquan Shaikh <furquan@chromium.org>
Reviewed-by: Furquan Shaikh <furquan@chromium.org>
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This change adds the charger LED behavior for fleex. Since fleex isn't
actually using a power LED, removed the GPIO referencing it.
BRANCH=none
BUG=b:109872754
TEST=ran through all charger and power states on the fleex to confirm
correct LED behavior
Change-Id: Ia0952587075026c6e2cbe20dcd7ccc6746442df1
Signed-off-by: Diana Z <dzigterman@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/1159355
Reviewed-by: Jett Rink <jettrink@chromium.org>
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Add define EC_VOLUP_BTN and EC_VOLDN_BTN
in gpio.inc and enable CONFIG_VOLUME_BUTTONS
function in board.h
BUG=b:111670874
BRANCH=none
TEST=Verify volume control bar can be pop
up and down.
Change-Id: I0ef527b0023238c080c130ad86f98b88b03cfec2
Signed-off-by: Raymond Chou <raymond_chou@compal.corp-partner.google.com>
Reviewed-on: https://chromium-review.googlesource.com/1145149
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-by: Furquan Shaikh <furquan@chromium.org>
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USB2_OTG_ID is 3.3V pin on the EC whereas the SoC expects
USB2_DUALROLE and USB2_VBUS_SNS to be 1.8V. Since there is an
internal pull-up on USB2_DUALROLE from the SoC side, this change
configures USB2_OTG_ID to be open drain so that it is actively
driven from the EC when it wants to pull it low. Otherwise, the
pin would be tri-stated from the EC side allowing it to be pulled
up to 1.8V because of the SoC internal pull-up.
BUG=None
BRANCH=None
TEST=None
Change-Id: Icfe9f4ca6982d70f0e42bee589b68b7c4b768d9f
Signed-off-by: Furquan Shaikh <furquan@google.com>
Reviewed-on: https://chromium-review.googlesource.com/1140501
Commit-Ready: Furquan Shaikh <furquan@chromium.org>
Tested-by: Furquan Shaikh <furquan@chromium.org>
Reviewed-by: Jett Rink <jettrink@chromium.org>
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The is based off of current yorp (V1) on ToT without the LED
implementation.
BRANCH=none
BUG=b:110085182
TEST=builds
Change-Id: Ic95fdf19be60637cf9effa8b34cb4659ad45952a
Signed-off-by: Jett Rink <jettrink@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/1098020
Reviewed-by: Furquan Shaikh <furquan@chromium.org>
Reviewed-by: Justin TerAvest <teravest@chromium.org>
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