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* board: Sort header filesJeremy Bettis2022-12-011-3/+3
| | | | | | | | | | | | | | | | | | | | Sort all includes in board with the clang-format rules used by the zephyr project. BRANCH=None BUG=b:247100970 TEST=zmake build -a TEST=./twister --clobber -v -i TEST=make -j72 buildall_only runtests TEST=zmake compare-builds -a Signed-off-by: Jeremy Bettis <jbettis@google.com> Change-Id: I6ad72b167cbb768a64c338fa633eb4bf5a401897 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/4060360 Reviewed-by: Tom Hughes <tomhughes@chromium.org> Reviewed-by: Paul Fagerburg <pfagerburg@chromium.org> Tested-by: Jeremy Bettis <jbettis@chromium.org> Commit-Queue: Jeremy Bettis <jbettis@chromium.org>
* Add default implementation of board_set_charge_limitPeter Marheine2022-11-241-10/+0
| | | | | | | | | | | | | | | | | | | The majority of boards simply call charge_set_input_current_limit() from board_set_charge_limit() now that the minimum current limit and derating are available as config options. Make this the default behavior of the charge manager, overridable by boards as needed. Boards that have existing custom behavior retain it, with their versions of board_set_charge_limit() marked as __override as necessary. BUG=b:163093572 TEST=make buildall; zmake build -a BRANCH=none Signed-off-by: Peter Marheine <pmarheine@chromium.org> Change-Id: I72475ca0e8381596cafbcda4b042c7f884ae0432 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/4022857 Reviewed-by: Keith Short <keithshort@chromium.org>
* Add CONFIG_CHARGER_MIN_INPUT_CURRENT_LIMITPeter Marheine2022-11-231-3/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This splits the dual use of CONFIG_CHARGER_INPUT_CURRENT into two different symbols, changing the uses of that which are used to set a minimum current limit to be CONFIG_CHARGER_MAX_INPUT_CURRENT_LIMIT. Most boards implement this in the same way within either the board or baseboard, so handling of the new option is moved into charge_set_input_current_limit (which is called by every user of the option) and every board which repeated this pattern has the new symbol set to the same value as the old one, with the duplicated code deleted. One functional change to the charge manager is made: when charging stops, the input current limit is set to the default value (CONFIG_CHARGER_INPUT_CURRENT) rather than 0. This captures the intent that the default current is appropriate at any time, which was previously configured by individual boards' implementation of board_set_charge_limit() while still allowing the limit to be set lower as needed. To verify that all changes are appropriate, the following has been manually checked: * All boards with a change to a .c file also have a .h change * All boards without a changed .h file have a changed baseboard.h * For Zephyr projects, those with a changed .c file have config added for the minimum limit and others (only corsola) are unchanged to leave it off. This is intended to verify that each board that duplicated the MAX() logic has its configuration updated to use the shared copy, and that boards with that code in the baseboard also update their configuration. BUG=b:163093572 TEST=make buildall; zmake build -a BRANCH=none LOW_COVERAGE_REASON=added lines will soon be deleted Change-Id: Ia460a16293c1fb82aac3784fd9be57ba0985f2fe Signed-off-by: Peter Marheine <pmarheine@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/4019703 Reviewed-by: Keith Short <keithshort@chromium.org> Code-Coverage: Zoss <zoss-cl-coverage@prod.google.com>
* dedede: usb_mux: Split struct usb_mux in dedede boardsTomasz Michalec2022-09-131-14/+25
| | | | | | | | | | | | | | | | Update dedede boards to use new struct usb_mux_chain. BUG=b:236274003 TEST=make buildall BRANCH=None Cq-Depend: chromium:3748785 Signed-off-by: Tomasz Michalec <tm@semihalf.com> Change-Id: Ie73f5bc250c436a2d72fdfb4c8f8707f05fba9f6 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3779623 Commit-Queue: Tomasz Michalec <tmichalec@google.com> Reviewed-by: Keith Short <keithshort@chromium.org> Tested-by: Tomasz Michalec <tmichalec@google.com>
* Update license boilerplate text in source code filesMike Frysinger2022-09-1210-10/+10
| | | | | | | | | | | | | | | Normally we don't do this, but enough changes have accumulated that we're doing a tree-wide one-off update of the name & style. BRANCH=none BUG=chromium:1098010 TEST=`repo upload` works Change-Id: Icd3a1723c20595356af83d190b2c6a9078b3013b Signed-off-by: Mike Frysinger <vapier@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3891203 Reviewed-by: Jeremy Bettis <jbettis@chromium.org> Reviewed-by: Jack Rosenthal <jrosenth@chromium.org>
* dedede: limit PD voltage to 15V for boards with SM5803Peter Marheine2022-07-211-0/+1
| | | | | | | | | | | | | | | | | | | | | | Silicon Mitus have stated that the SM5803 may be damaged by voltage spikes on VBUS in excess of 20V, and recommended that VBUS above 15V not be used to prevent damage. Although dedede configures the max PD power to 45W which will usually result in 15V@3A maximum, 20V@2.25A is also a valid choice that would be dangerous. Boards that do not use the SM5803 are unchanged, but the setting must now be specified for each board because it is not uniform across all dedede boards. BUG=b:230712704 TEST=make buildall BRANCH=none Signed-off-by: Peter Marheine <pmarheine@chromium.org> Change-Id: I5b2359fc2720ef0b5a7f2480ff67e0e821c378ad Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3778900 Reviewed-by: Aseda Aboagye <aaboagye@chromium.org> Reviewed-by: Diana Z <dzigterman@chromium.org>
* board/galtic/board.h: Format with clang-formatJack Rosenthal2022-07-071-2/+3
| | | | | | | | | | | | BUG=b:236386294 BRANCH=none TEST=none Tricium: disable Change-Id: Icbc347a2f9aeb84608ccd416931676b15cee4136 Signed-off-by: Jack Rosenthal <jrosenth@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3749379 Reviewed-by: Jeremy Bettis <jbettis@chromium.org>
* board/galtic/cbi_ssfc.h: Format with clang-formatJack Rosenthal2022-07-011-1/+1
| | | | | | | | | | | BUG=b:236386294 BRANCH=none TEST=none Change-Id: I39fec967e0daff7203c8e53d3c8e12b3501150da Signed-off-by: Jack Rosenthal <jrosenth@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3728386 Reviewed-by: Jeremy Bettis <jbettis@chromium.org>
* board/galtic/cbi_ssfc.c: Format with clang-formatJack Rosenthal2022-07-011-3/+3
| | | | | | | | | | | BUG=b:236386294 BRANCH=none TEST=none Change-Id: I6e6adf207248354f881ae167c4b88baaea13053c Signed-off-by: Jack Rosenthal <jrosenth@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3728385 Reviewed-by: Jeremy Bettis <jbettis@chromium.org>
* board/galtic/board.h: Format with clang-formatJack Rosenthal2022-07-011-22/+18
| | | | | | | | | | | BUG=b:236386294 BRANCH=none TEST=none Change-Id: Ib6e10b96e31a5f2f33d1e66cbda9cd984b7a66e2 Signed-off-by: Jack Rosenthal <jrosenth@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3728384 Reviewed-by: Jeremy Bettis <jbettis@chromium.org>
* board/galtic/board.c: Format with clang-formatJack Rosenthal2022-07-011-99/+71
| | | | | | | | | | | BUG=b:236386294 BRANCH=none TEST=none Change-Id: I9e15c6df5b55812894a00a654d4ea7db5ab1892c Signed-off-by: Jack Rosenthal <jrosenth@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3728383 Reviewed-by: Jeremy Bettis <jbettis@chromium.org>
* board/galtic/led.c: Format with clang-formatJack Rosenthal2022-06-291-17/+26
| | | | | | | | | | | BUG=b:236386294 BRANCH=none TEST=none Change-Id: Icc5c6b5ddfeb2ef12f7db75279733ff1a6ded4d7 Signed-off-by: Jack Rosenthal <jrosenth@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3728387 Reviewed-by: Jeremy Bettis <jbettis@chromium.org>
* board/galtic/usb_pd_policy.c: Format with clang-formatJack Rosenthal2022-06-281-2/+2
| | | | | | | | | | | BUG=b:236386294 BRANCH=none TEST=none Change-Id: I2a7b81ffd9fb0ecf0331c726eb540f3af117cf0b Signed-off-by: Jack Rosenthal <jrosenth@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3728388 Reviewed-by: Jeremy Bettis <jbettis@chromium.org>
* usbc: wrap task_set_event to have an explicit port argumentFabio Baltieri2022-05-271-2/+2
| | | | | | | | | | | | | | | | | Define an explicit function to set events for the usb charger tasks, so that the caller is not coupled to the internal task implementation, and we can use a single task on a later patch. BRANCH=none BUG=b:226411332 TEST=make buildall TEST=zmake testall TEST=cq dry run Signed-off-by: Fabio Baltieri <fabiobaltieri@google.com> Change-Id: I7a1223642b800568bf4f9864f75b2b647c84d29f Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3663746 Reviewed-by: Jeremy Bettis <jbettis@chromium.org>
* board/baseboard: Remove ACCEL_INTERRUPTSGwendal Grignou2022-05-231-1/+0
| | | | | | | | | | | | | | Use a finer grain set of define, to allow some sensors to use interrupt when wired properly and some use force mode when not using interrupt. BUG=b:230401133 BRANCH=asurada,dedede,brya TEST=Build all. Check Zephyr with herobrine. Check on bugzzy. Signed-off-by: Gwendal Grignou <gwendal@chromium.org> Change-Id: I9c7d50b88a0eaec017f4e5e2ccfdb80761d71fb3 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3609121 Reviewed-by: Yuval Peress <peress@google.com>
* galtic: Modify board active charge port setting.stabilize-14771.B-mainJacky Wang2022-05-031-1/+1
| | | | | | | | | | | | | | | | | | | | | If the charge port does not change, we don’t need to stop the charge IC. BUG=b:229953914 BRANCH=firmware-dedede-13606.B TEST=make BOARD=galtic 1. system battery cutoff (Run command ectool batterycutoff) 2. wait about 5 min 3. Plug-AC on TypeC port1. 4. Run ectool battery and check present current. Signed-off-by: Jacky Wang <jacky5_wang@pegatron.corp-partner.google.com> Change-Id: I8afeee2974752aa891c54662a9341c53c651148a Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3621595 Tested-by: Michael5 Chen <michael5_chen1@pegatron.corp-partner.google.com> Reviewed-by: Michael5 Chen <michael5_chen1@pegatron.corp-partner.google.com> Commit-Queue: Ivan Chen <yulunchen@google.com> Reviewed-by: Ivan Chen <yulunchen@google.com>
* galnat: Adding 2nd source TypeC redriver PS8743Michael5 Chen12022-03-094-2/+50
| | | | | | | | | | | | | | | | 1. Add 2nd source typeC redriver ps8743 2. Setting RX EQ 16.7db. BUG=b:213481747 BRANCH=dedede TEST=manual EE verify typeC function and meausure signals. Signed-off-by: Michael5 Chen1 <michael5_chen1@pegatron.corp-partner.google.com> Change-Id: Ie56e01ad6d04218818e03be786b50c5160d07aa3 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3509334 Reviewed-by: Ivan Chen <yulunchen@google.com> Commit-Queue: Ivan Chen <yulunchen@google.com>
* tree: Work around clang bugTom Hughes2021-11-051-30/+49
| | | | | | | | | | | | | | | | | | | | clang warns: error: initializer element is not a compile-time constant There is an upstream LLVM review with proposed fix: https://reviews.llvm.org/D76096. In the meantime, we will work around it. BRANCH=none BUG=b:172020503, b:202062363 TEST=./util/compare_builds.sh -b all -j 120 => MATCH Signed-off-by: Tom Hughes <tomhughes@chromium.org> Change-Id: I066e082870bcd726555a5f2461f09988d4e6ce55 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3237042 Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
* tree: Files should end with single newlineTom Hughes2021-10-181-1/+0
| | | | | | | | | | | | | | | | | | | | | | | One of the checks that runs as part of "repo upload" looks for a single newline at the end of each file. I'm getting warnings about this when I touch files that do not follow this, even though I didn't add the extra newlines. This commit fixes all files by running the following: for f in $(find . -name '*.[ch]'); do printf '%s\n' "$(cat ${f})" > ${f}; done BRANCH=none BUG=b:172020503 TEST=./util/compare_build.sh -b all -j 120 => MATCH Signed-off-by: Tom Hughes <tomhughes@chromium.org> Change-Id: Ia3ece5b64b549d21ca11708791368002bb6e9b0e Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3229797 Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
* galtic360: Add battery 50wh(3S1P)Michael5 Chen12021-10-133-0/+77
| | | | | | | | | | | | | | | | | | Add battery 50wh for galtic360 BUG=b:194961842 BRANCH=dedede TEST=manual 1. Check battery found on EC console 2. Check battery cutoff function on EC console 3. Check battery charging FET status when battery full 4. Battery charge from 0% to 100%. Signed-off-by: Michael5 Chen1 <michael5_chen1@pegatron.corp-partner.google.com> Change-Id: I87381fb585a0a82af5280a04867df4c98ee4d528 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3161856 Reviewed-by: Aseda Aboagye <aaboagye@chromium.org> Commit-Queue: Aseda Aboagye <aaboagye@chromium.org>
* galtic/galtic360: Modify keyboard config.Michael5 Chen12021-09-251-1/+1
| | | | | | | | | | | | | | | | Base on keyboard printing, modify keyboard function key define. BUG=b:175857578 BRANCH=dedede TEST=manual Check keyboard function key behavior. Signed-off-by: Michael5 Chen1 <michael5_chen1@pegatron.corp-partner.google.com> Change-Id: Ie63a338a8f08d6d1541f53bdfc34da83753823af Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3162474 Reviewed-by: Henry Sun <henrysun@google.com> Reviewed-by: Diana Z <dzigterman@chromium.org> Commit-Queue: Henry Sun <henrysun@google.com>
* galtic360/galith360: Implement gyro sensor function.Michael5 Chen12021-09-143-28/+152
| | | | | | | | | | | | | | | | Base gyro sensor: ICM40608 and BMI160 Lid accel sensor: KX022 and BMA253 BUG=b:198254720 BRANCH=dedede TEST=manual Run command "watch ectool motionsense lid_angle" Signed-off-by: Michael5 Chen1 <michael5_chen1@pegatron.corp-partner.google.com> Change-Id: I640a76d3164914eda8439b6dd4af53f6f09fd7f5 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3159425 Reviewed-by: Aseda Aboagye <aaboagye@chromium.org> Commit-Queue: Aseda Aboagye <aaboagye@chromium.org>
* lid_angle: Create a common callback for lid angle changesWai-Hong Tam2021-08-051-3/+1
| | | | | | | | | | | | | | | | | | | | | | Each board defines its own callback lid_angle_peripheral_enable(). The implementation is very similar. Create a common implementation and reduce the duplicated code. This CL removes the board callbacks which are identifical to the common callback. If it is slightly different, keep it and add the __override tag. The check of TEST_BUILD is unnecessary as the board callback is not linked in the test build. BRANCH=None BUG=b:194922043 TEST=Build all the images. Change-Id: I73d381730f35b80eff69399cdfc5fb54f839aee0 Signed-off-by: Wai-Hong Tam <waihong@google.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3069175 Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
* dedede: Make scope of SSFC definition per boardParth Malkan2021-07-193-1/+97
| | | | | | | | | | | | | | | | | | | | | | SSFC bit definition started diverging between coreboot and EC. To avoid conflicts move the definitions of SSFC bits within EC to per board instead of at a baseboard level. Base sensor and Lid sensor components are common across all boards Base Sensor - bits 0-2 Lid Sensor - bits 3-5 In addition, Sasuke uses bits 6-8 for usb superspeed mux Cret board uses bits 9-11 in coreboot for audio codec BRANCH=firmware-dedede-13606.B BUG=b:187694527 TEST=make buildall Signed-off-by: Parth Malkan <parthmalkan@google.com> Change-Id: Ib0f732e5d41668135ff180c545ff4bb6a1cb1427 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3021932 Reviewed-by: YH Lin <yueherngl@chromium.org> Reviewed-by: Marco Chen <marcochen@chromium.org>
* dedede: Enable CONFIG_ASSERT_CCD_MODE_ON_DTS_CONNECTRob Barnes2021-07-021-1/+1
| | | | | | | | | | | | | | | | | | Enable CONFIG_ASSERT_CCD_MODE_ON_DTS_CONNECT on all dedede boards. This will assert GPIO_CCD_MODE_ODL when a debug device is connected to a CCD port. GPIO_CCD_MODE_ODL must be configured as an open drain so EC and Cr50 don't drive fight. BUG=b:190189242 TEST=Build dedede BRANCH=None Change-Id: I2d71312967f2d4a693ac9753279f49478e8c092c Signed-off-by: Rob Barnes <robbarnes@google.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2976759 Reviewed-by: Diana Z <dzigterman@chromium.org> Reviewed-by: Aseda Aboagye <aaboagye@chromium.org> Tested-by: Diana Z <dzigterman@chromium.org>
* keeby/dedede: Gate temp sensor access by GPIOAseda Aboagye2021-06-291-1/+0
| | | | | | | | | | | | | | | | | | | | | | | | On dedede and keeby boards, the thermistors are powered by the EC's GPIO_EN_PP3300_A pin. If the thermistors are read before they are powered then the EC may force a thermal shutdown due to the bad reading. This commit simply defines CONFIG_TEMP_SENSOR_POWER_GPIO along with a CONFIG_TEMP_SENSOR_FIRST_READ_DELAY_MS to ensure we don't get any false positive thermal shutdowns. BUG=b:192053176 BRANCH=dedede TEST=Build and flash lalala. Unplug AC charger from DUT, press refresh+power button to reset DUT, verify that DUT boots up automatically. TEST=Repeat above test with madoo. Signed-off-by: Aseda Aboagye <aaboagye@google.com> Change-Id: I2a49e2f896c4120a8f01f440ea22c9b3763c6589 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2988364 Tested-by: Aseda Aboagye <aaboagye@chromium.org> Auto-Submit: Aseda Aboagye <aaboagye@chromium.org> Reviewed-by: Diana Z <dzigterman@chromium.org> Commit-Queue: Diana Z <dzigterman@chromium.org>
* galtic: Remove config for firmware qualJacky Wang2021-04-261-3/+0
| | | | | | | | | | | | | | | 1.Remove CONFIG_SYSTEM_UNLOCKED BUG=b:183560885 BRANCH=firmware-dedede-13606.B TEST=BOARD=galtic Signed-off-by: Jacky Wang <jacky5_wang@pegatron.corp-partner.google.com> Change-Id: Idf644f7fe13f449f931af33fc4d7fb5ac663a4c1 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2850295 Reviewed-by: Michael5 Chen <michael5_chen1@pegatron.corp-partner.google.com> Reviewed-by: Aseda Aboagye <aaboagye@chromium.org> Commit-Queue: Aseda Aboagye <aaboagye@chromium.org>
* LED On/Off: Make battery LED optionalDiana Z2021-04-221-4/+5
| | | | | | | | | | | | | | | Currently, all boards using the LED On/Off module have battery LEDs. However, if we'd like to expand support to Chromeboxes then the battery LED must become optional. BRANCH=None BUG=b:185508707 TEST=make -j buildall Signed-off-by: Diana Z <dzigterman@chromium.org> Change-Id: Ieae098829ebe6c8b103f23d5abdbf70e7bcbdf2d Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2832692 Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
* galtic: Update the EC battery config setting.Jacky Wang2021-04-082-0/+30
| | | | | | | | | | | | | | | | | Config the EC battery setting depend on battery spec. BUG=b:175350831 BRANCH=firmware-dedede-13606.B TEST=BOARD=galtic 1. Check battery found on EC log. 2. Check battery cutoff function on EC console. 3. Check battery charging FET status when battery full. Signed-off-by: Jacky Wang <jacky5_wang@pegatron.corp-partner.google.com> Change-Id: Ifcfcf0f14f89d4ce2fea1f1abd7db89f0d26fbb0 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2809778 Reviewed-by: Aseda Aboagye <aaboagye@chromium.org> Commit-Queue: Aseda Aboagye <aaboagye@chromium.org>
* dedede/raa489000: Enable ASGATE when sourcingAseda Aboagye2021-04-011-0/+5
| | | | | | | | | | | | | | | | | | | | With the previous change to disable the ASGATE from the charger side, this actually ended up breaking sourcing VBUS. This commit enables the ASGATE when we are attempting to source VBUS. BUG=b:183220414 BRANCH=dedede TEST=Build and flash madoo, plug in a Type-C sink, verify that VBUS is sourced. TEST=Verify that DUT can PR_Swap with peripheral. Signed-off-by: Aseda Aboagye <aaboagye@google.com> Change-Id: I1938f2b827e57a04ef72e2ad35ad6ff29ce18712 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2795073 Reviewed-by: Diana Z <dzigterman@chromium.org> Commit-Queue: Aseda Aboagye <aaboagye@chromium.org> Tested-by: Aseda Aboagye <aaboagye@chromium.org>
* Reland "dedede/raa489000: Disable ASGATE from READY state"Aseda Aboagye2021-04-011-7/+12
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This is a reland of f7fbc629f0655229cc7ffdadfb18c9e13118e3d2 Original change's description: > dedede/raa489000: Disable ASGATE from READY state > > On the boards which use the RAA489000, we keep the ADC enabled while > giving VBUS control to the charger side. This can cause a situation > where VBUS is not quite zero volts when a charger is removed. This > commit uses the charger side registers to control the ASGATE when > selecting our active charge port. This is done in addition to the > existing implementation which uses the TCPCI registers to control > ASGATE. When we place the parts into low power mode, we move the VBUS > control from the TCPC side of the IC to the charger side. It should > be safe to issue both commands as if the TCPC side has control, the IC > ignores the setting from the charger side registers. > > BUG=b:183220414 > BRANCH=dedede > TEST=Build and flash madoo, plug in charger to port, unplug, verify > that VBUS falls to < 200mV and decays from there. > > Signed-off-by: Aseda Aboagye <aaboagye@google.com> > Change-Id: I8e8c8cc32575d18c9d3d1210ed3c5cf69ad5ca4b > Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2793058 > Tested-by: Aseda Aboagye <aaboagye@chromium.org> > Reviewed-by: Diana Z <dzigterman@chromium.org> > Commit-Queue: Aseda Aboagye <aaboagye@chromium.org> Bug: b:183220414 Change-Id: I36db53f3e13ba848308cd7e0c94a1b5a3551c600 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2797549 Reviewed-by: Diana Z <dzigterman@chromium.org> Commit-Queue: Aseda Aboagye <aaboagye@chromium.org> Tested-by: Aseda Aboagye <aaboagye@chromium.org>
* Add a common header for board_is_sourcing_vbus()Simon Glass2021-03-311-2/+0
| | | | | | | | | | | | | | | | This function prototype is defined in lots of files, none of which is visible to Zephyr. Add a prototype in one place and remove the others. BUG=b:183296099 BRANCH=none TEST=make buildall Signed-off-by: Simon Glass <sjg@chromium.org> Change-Id: Ia324327a69b117483ab9ee5c85eba93c0fb5ad9c Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2789799 Reviewed-by: Jack Rosenthal <jrosenth@chromium.org>
* Revert "dedede/raa489000: Disable ASGATE from READY state"Aseda Aboagye2021-03-311-12/+7
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This reverts commit f7fbc629f0655229cc7ffdadfb18c9e13118e3d2. Reason for revert: Breaks sourcing of VBUS. Original change's description: > dedede/raa489000: Disable ASGATE from READY state > > On the boards which use the RAA489000, we keep the ADC enabled while > giving VBUS control to the charger side. This can cause a situation > where VBUS is not quite zero volts when a charger is removed. This > commit uses the charger side registers to control the ASGATE when > selecting our active charge port. This is done in addition to the > existing implementation which uses the TCPCI registers to control > ASGATE. When we place the parts into low power mode, we move the VBUS > control from the TCPC side of the IC to the charger side. It should > be safe to issue both commands as if the TCPC side has control, the IC > ignores the setting from the charger side registers. > > BUG=b:183220414 > BRANCH=dedede > TEST=Build and flash madoo, plug in charger to port, unplug, verify > that VBUS falls to < 200mV and decays from there. > > Signed-off-by: Aseda Aboagye <aaboagye@google.com> > Change-Id: I8e8c8cc32575d18c9d3d1210ed3c5cf69ad5ca4b > Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2793058 > Tested-by: Aseda Aboagye <aaboagye@chromium.org> > Reviewed-by: Diana Z <dzigterman@chromium.org> > Commit-Queue: Aseda Aboagye <aaboagye@chromium.org> Bug: b:183220414 Change-Id: Ibf6c161adca9981a065e969b6c3b73dd408ef1ba Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2796411 Reviewed-by: Aseda Aboagye <aaboagye@chromium.org> Commit-Queue: Aseda Aboagye <aaboagye@chromium.org> Tested-by: Aseda Aboagye <aaboagye@chromium.org> Bot-Commit: Rubber Stamper <rubber-stamper@appspot.gserviceaccount.com>
* dedede/raa489000: Disable ASGATE from READY stateAseda Aboagye2021-03-301-7/+12
| | | | | | | | | | | | | | | | | | | | | | | | | On the boards which use the RAA489000, we keep the ADC enabled while giving VBUS control to the charger side. This can cause a situation where VBUS is not quite zero volts when a charger is removed. This commit uses the charger side registers to control the ASGATE when selecting our active charge port. This is done in addition to the existing implementation which uses the TCPCI registers to control ASGATE. When we place the parts into low power mode, we move the VBUS control from the TCPC side of the IC to the charger side. It should be safe to issue both commands as if the TCPC side has control, the IC ignores the setting from the charger side registers. BUG=b:183220414 BRANCH=dedede TEST=Build and flash madoo, plug in charger to port, unplug, verify that VBUS falls to < 200mV and decays from there. Signed-off-by: Aseda Aboagye <aaboagye@google.com> Change-Id: I8e8c8cc32575d18c9d3d1210ed3c5cf69ad5ca4b Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2793058 Tested-by: Aseda Aboagye <aaboagye@chromium.org> Reviewed-by: Diana Z <dzigterman@chromium.org> Commit-Queue: Aseda Aboagye <aaboagye@chromium.org>
* genvif: Use VIF overrides by defaultAbe Levkoy2021-03-301-0/+3
| | | | | | | | | | | | | | Use board-specific override files when generating VIFs for boards. BUG=b:172276715 TEST=make buildall BRANCH=none Signed-off-by: Abe Levkoy <alevkoy@chromium.org> Change-Id: I197365018ceb8197c22d631cebf4cbce1c0119f7 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2785506 Reviewed-by: Denis Brockus <dbrockus@chromium.org> Commit-Queue: Denis Brockus <dbrockus@chromium.org>
* galtic: Add GPIO_EC_ENTERING_RW2Michael5 Chen12021-03-262-1/+16
| | | | | | | | | | | | | | | | | | | | This commit add a new GPIO, GPIO_EC_ENTERING_RW2 which does the same thing as GPIO_EC_ENTERING_RW. However, it's on a pin that's more will behaved around init time. This commit also overrides the board_pulse_ec_entering_rw() function such that both lines can be pulsed. BUG=b:181740591 BRANCH=dedede TEST=make board=galtic Signed-off-by: Michael5 Chen1 <michael5_chen1@pegatron.corp-partner.google.com> Change-Id: Ibc65bafed0374e6356311b0e4c2133ea3be7d4f6 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2786885 Reviewed-by: Jacky Wang <jacky5_wang@pegatron.corp-partner.google.com> Reviewed-by: Aseda Aboagye <aaboagye@chromium.org> Commit-Queue: Aseda Aboagye <aaboagye@chromium.org>
* dedede/raa489000: Set LPM exit debounce to 100msAseda Aboagye2021-03-111-0/+2
| | | | | | | | | | | | | | | | | | | | | | | | For some reason, when the RAA489000 TCPC exits low power mode, CC status doesn't appear changed when using a servo v4. This causes us to think no connection is present and immediately but the IC back into low power mode. If we wait 100ms before querying the CC status reg, it seems that then the right values are reported. This commit adds a workaround by setting the LPM exit debounce time to 100ms. BUG=b:182429150,b:181308089 BRANCH=dedede TEST=Build and flash a board, verify that servo v4 with an external charger is detected. Signed-off-by: Aseda Aboagye <aaboagye@google.com> Change-Id: Ic0c2406fa20d0dad82adee865cd87c46d7126b9f Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2752250 Tested-by: Aseda Aboagye <aaboagye@chromium.org> Auto-Submit: Aseda Aboagye <aaboagye@chromium.org> Reviewed-by: Diana Z <dzigterman@chromium.org> Commit-Queue: Diana Z <dzigterman@chromium.org>
* Galtic: Correct active charge port selectionDiana Z2021-03-051-1/+1
| | | | | | | | | | | | | | | | | | During active charge port selection, any port which is not the new active port should have sinking disabled. The current code could leave sinking enabled on C0 when a better charger is inserted into C1, and also shuts off C1 when it is selected with no battery. BRANCH=None BUG=b:176214112 TEST=on galtic, sysjump with no battery and a charger in C1. Observe no brown outs Signed-off-by: Diana Z <dzigterman@chromium.org> Change-Id: Ic07a9c5ab35a9edd29717beb7acc9e1c51159b04 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2738055 Reviewed-by: Aseda Aboagye <aaboagye@chromium.org> Commit-Queue: Aseda Aboagye <aaboagye@chromium.org>
* galtic: Enable AP throttlingJacky Wang2021-03-041-0/+1
| | | | | | | | | | | | | | | | | | Add the CONFIG_THROTTLE_AP define to compile common code for throttling the CPU based on the temp sensors. BUG=b:177628854 BRANCH=firmware-dedede-13606.B TEST=make BOARD=galtic 1. Use "watch ectool temps all" to check temperature. 2. Verified pass with EE team. Signed-off-by: Jacky Wang <jacky5_wang@pegatron.corp-partner.google.com> Change-Id: I1e79a38f16afeb54791260e6ad2d486164ebadaf Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2734064 Reviewed-by: Diana Z <dzigterman@chromium.org> Reviewed-by: Aseda Aboagye <aaboagye@chromium.org> Commit-Queue: Aseda Aboagye <aaboagye@chromium.org>
* galtic: Fine tune tusb544 EQ settingJacky Wang2021-03-041-0/+103
| | | | | | | | | | | | | | | | Modify strength value setting of tusb544. BUG=b:179224587 BRANCH=firmware-dedede-13606.B TEST=make BOARD=galtic 1. Verified pass by EE. 2. Use "ectool i2cread" to check setting value. Signed-off-by: Jacky Wang <jacky5_wang@pegatron.corp-partner.google.com> Change-Id: I06849c9d94584e484a58cc5e614ce7d4fb60fce6 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2726784 Reviewed-by: Michael5 Chen <michael5_chen1@pegatron.corp-partner.google.com> Reviewed-by: Diana Z <dzigterman@chromium.org>
* galtic: Update EC thermal tableJacky Wang2021-02-231-0/+34
| | | | | | | | | | | | | | Update EC thermal table for throttle and shutdown point. BUG=b:177628854 BRANCH=firmware-dedede-13606.B TEST=make BOARD=galtic 1. Verified pass by thermal team. Signed-off-by: Jacky Wang <jacky5_wang@pegatron.corp-partner.google.com> Change-Id: Icaaad93cdf933f5351cda7192e4b14c90f326d35 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2710129 Reviewed-by: Diana Z <dzigterman@chromium.org>
* magolor and friends: Adjust OCPC PID constantsAseda Aboagye2021-02-171-8/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | Thus far, it seems that boards that use the same OCPC PID constants behave similarly. Therefore, this commit updates the constants that were most recently used on madoo to the other OCPC boards that use the same charger IC such that the behaviour meets the criteria at go/ocpc-testing. - Converges around the target current. - Average steady state error is less than 4% of target. - Current is reduced to target level in less than 5s when load is suddenly released. BUG=None BRANCH=dedede TEST=Build and flash magolor. Verify that battery can charge to 100%. Verify that it meets or exceeds the constraints above. TEST=Verify that DUT can come out of battery cutoff from sub board. Signed-off-by: Aseda Aboagye <aaboagye@google.com> Change-Id: I206854c097c307b941a64547f9b74c8259a7d499 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2691585 Tested-by: Aseda Aboagye <aaboagye@chromium.org> Auto-Submit: Aseda Aboagye <aaboagye@chromium.org> Reviewed-by: Diana Z <dzigterman@chromium.org> Commit-Queue: Diana Z <dzigterman@chromium.org>
* Dedede: Add RAA489000 output current settingDiana Z2021-01-291-6/+2
| | | | | | | | | | | | | | | | | Boards using the RAA489000 TCPC should set output current on their ports through the TCPC driver. This commit adds a board function to do this for every dedede board currently using the RAA489000. BRANCH=None BUG=b:178064507 TEST=on madoo, verify OCP occurs if more than 1.5A is drawn on a non-PD port, verify register is set to allow 3.0A for port partners requesting that current in their sink capabilities Signed-off-by: Diana Z <dzigterman@chromium.org> Change-Id: Ieb7df916c122d5de1adaa7371a58ad5cf2954ee4 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2658377 Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
* Galtic: Add TCPC dump commandDiana Z2021-01-291-0/+1
| | | | | | | | | | | | | Galtic has plenty of flash space, so add TCPC dump command. BRANCH=None BUG=None TEST=make -j buildall Signed-off-by: Diana Z <dzigterman@chromium.org> Change-Id: If570484a5e043fa372c553c656ee97469000a6bc Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2653795 Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
* Madoo: Fix main board charger can't wake from hibernateKo_Ko2021-01-221-2/+2
| | | | | | | | | | | | | | | | | | | | | | | In madoo's design, there is a protection IC between USB connector and TCPC. When EC is hibernate, the CC lines will be disconnected, which cause the result that TCPC can't detect AC power and Chromebook won't wake the system. Enalbing ADC for all modes by setting 0x4C bit 0 to 1 (to be more precise is that we don't clear bit 0 during hibernation) can prevent issue mention above. BUG=b:174971576 BRANCH=dedede TEST=flash code and make sure ac in can wake system from hibernation Signed-off-by: Ko_Ko <Ko_Ko@compal.corp-partner.google.com> Change-Id: I2a83c69e34cbc4bfdff90d760f32817a7924dc26 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2626803 Reviewed-by: Aseda Aboagye <aaboagye@chromium.org> Reviewed-by: Diana Z <dzigterman@chromium.org> Reviewed-by: Ko Ko <ko_ko@compal.corp-partner.google.com> Tested-by: Ko Ko <ko_ko@compal.corp-partner.google.com> Commit-Queue: Aseda Aboagye <aaboagye@chromium.org>
* Galtic: Increase stack sizesDiana Z2021-01-151-4/+4
| | | | | | | | | | | | | | | | The keyscan task may overflow during the hibernate key sequence, so increase its stack size. Additionally, align stack sizes with the larger ones chosen previously for drawcia. BRANCH=dedede BUG=b:177479440 TEST=make -j buildall, galtic can successfully enter hibernate with alt+h+volume up Signed-off-by: Diana Z <dzigterman@chromium.org> Change-Id: Ic25eebf4c2a29542a642e73dcab1f69c049fdae5 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2628895 Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
* galtic: Config the EC GPIO settingJacky Wang2021-01-153-33/+15
| | | | | | | | | | | | | | Base on schematics, config the EC GPIO related setting. BUG=b:177181431 BRANCH=firmware-dedede-13606.B TEST=BOARD=galtic Signed-off-by: Jacky Wang <jacky5_wang@pegatron.corp-partner.google.com> Change-Id: Iaa294965a4e6e8d34b816fa96c69b974b7368fbe Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2620727 Reviewed-by: Michael5 Chen <michael5_chen1@pegatron.corp-partner.google.com> Reviewed-by: Diana Z <dzigterman@chromium.org>
* galtic: Config the thermal sensor settingJacky Wang2021-01-103-4/+16
| | | | | | | | | | | | | | | | | Update thermal sensor configuration setting. BUG=b:176525921 BRANCH=firmware-dedede-13606.B TEST=BOARD=galtic Use "ectool temps all" to check thermal sensor temperature. Signed-off-by: Jacky Wang <jacky5_wang@pegatron.corp-partner.google.com> Change-Id: Ide95e7be7d21bab979a53aa0d2b06f7a8b88cf7a Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2612311 Reviewed-by: Michael5 Chen <michael5_chen1@pegatron.corp-partner.google.com> Reviewed-by: Diana Z <dzigterman@chromium.org> Tested-by: Henry Sun <henrysun@google.com> Commit-Queue: Henry Sun <henrysun@google.com>
* Move tcpic.h header into include/driverSimon Glass2021-01-071-1/+1
| | | | | | | | | | | | | | | | | | This header cannot currently be accessed by Zephyr since it is in a driver directory, not an include directory. This header has quite a bit of public stuff in it, so it seems reasonable to consider everything public. Move the header file and update all users. BUG=b:175434113 BRANCH=none TEST=make buildall -j30 build volteer on zephyr Signed-off-by: Simon Glass <sjg@chromium.org> Change-Id: Ibba37f47a06783fafb5095f853f2a68d92b6df87 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2607745
* TCPMv2: Update source-out configsDiana Z2020-12-241-10/+0
| | | | | | | | | | | | | | | | | | | | Now that the DPM will be handling source-out decisions for TCPMv2, remove references to its old configuration options from TCPMv2 boards in order to avoid any confusion as to what code is running now. Also remove the charge manager notifications of sink attach/detach since the policy is being centralized into the DPM. Note that the previous configuration options only ever allocated one 3.0 A port, and so the default number of 3.0 A ports has been set to 1. BRANCH=None BUG=b:168862110,b:141690755 TEST=make -j buildall Signed-off-by: Diana Z <dzigterman@chromium.org> Change-Id: Ie452e3da32b04226503539daa67b6b9f4a58aa58 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2597431 Reviewed-by: Keith Short <keithshort@chromium.org>
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