| Commit message (Collapse) | Author | Age | Files | Lines |
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In the interest of making long-term branch maintenance incur as little
technical debt on us as possible, we should not maintain any files on
the branch we are not actually using.
This has the added effect of making it extremely clear when merging CLs
from the main branch when changes have the possibility to affect us.
The follow-on CL adds a convenience script to actually pull updates from
the main branch and generate a CL for the update.
BUG=b:204206272
BRANCH=ish
TEST=make BOARD=arcada_ish && make BOARD=drallion_ish
Signed-off-by: Jack Rosenthal <jrosenth@chromium.org>
Change-Id: I17e4694c38219b5a0823e0a3e55a28d1348f4b18
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3262038
Reviewed-by: Jett Rink <jettrink@chromium.org>
Reviewed-by: Tom Hughes <tomhughes@chromium.org>
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pd_timer was changed to use bitmask_uint64 to
create the equivalent of BIT(o) for uint64_t
bitmasks
BUG=none
BRANCH=none
TEST=make buildall
Signed-off-by: Denis Brockus <dbrockus@google.com>
Change-Id: I7cc6a24771a9c5e1050fa1c3ff1391ef77518b80
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3182631
Tested-by: Denis Brockus <dbrockus@chromium.org>
Auto-Submit: Denis Brockus <dbrockus@chromium.org>
Commit-Queue: Yuval Peress <peress@google.com>
Reviewed-by: Yuval Peress <peress@google.com>
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This CL adds an override function for
typec_get_default_current_limit_rp() for gingerbread. This allows port
C0 to have a 3.0A current limit as desired, and still limit C1 to
1.5A.
A new macro BOARD_C1_1A5_LIMIT was added to allow this feature to be
used for honeybuns variants. This macro is also used to adjust the
USB-PD SRC CAP current limit to 1.5A
BUG=b:191793195
BRANCH=quiche
TEST=verfied on Gingerbread that Rp = 3.0A is selected for C0 and Rp =
1.5A is selected for port C1.
C0:
> ucpd info
cc1 = Rp
cc2 = Open
Rp = Rp_3.0
cc1_v = 2
cc2_v = 0
rx_en = 1
pol = 0
C1:
> tcpc 1 dump
ROLE_CTRL (0x1a) = 0x15
Signed-off-by: Scott Collyer <scollyer@google.com>
Change-Id: I2853ddcbc7b1d76320e480bd4c11ad555dd52bad
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2980440
Commit-Queue: Scott Collyer <scollyer@chromium.org>
Tested-by: Scott Collyer <scollyer@chromium.org>
Reviewed-by: Diana Z <dzigterman@chromium.org>
Reviewed-by: Abe Levkoy <alevkoy@chromium.org>
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This CL changes the stm32gx TCPM driver to allow
CONFIG_USB_PD_VBUS_DETECT_TCPC to still be defined on boards that also
use the stm32gx TCPM driver. This is required for gingerbread which
has a PPC on C0 for VBUS detection, but relies on the TCPC to detect
VBUS on port C1.
BUG=b:159330563
BRANCH=quiche
TEST=validated that can attach as SRC/DFP on C1
> pd 1 state
Port C1 CC2, Enable - Role: SRC-DFP-VC TC State: Attached.SRC,
[10.435540 C1: PE_SRC_Ready]
[10.436511 pin_mode: 4, mf: 0, mux: 2]
[10.442645 C1: PE_VDM_Request_DPM]
[10.470346 C1: Entered DP mode]
[10.470480 C1: PE_SRC_Ready]
Signed-off-by: Scott Collyer <scollyer@google.com>
Change-Id: I986d504b1306c02132869abe7cbd630a966e0acd
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2949954
Commit-Queue: Scott Collyer <scollyer@chromium.org>
Tested-by: Scott Collyer <scollyer@chromium.org>
Reviewed-by: Diana Z <dzigterman@chromium.org>
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This CL adds gingerbread specific functions to control and detect VBUS
for port C1. This port does not have a PPC, but port C0 does which
means PPC related configs are defined.
A NULL PPC driver is added so any calls into PPC functions from common
code will be correctly handled by the check for NULL functions. The
functions which are needed are related to controlling and dectecting
VBUS presence.
BUG=b:159330563
BRANCH=quiche
TEST=verfied that C1 attaches as a SRC/DFP
[10.367330 C1: PE_SRC_Ready]
[10.368772 C1: Attempting to enter DP mode]
[10.374422 C1: PE_VDM_Request_DPM]
[10.401563 C1: PE_SRC_Ready]
[10.408082 C1: PE_VDM_Request_DPM]
[10.435540 C1: PE_SRC_Ready]
[10.436511 pin_mode: 4, mf: 0, mux: 2]
[10.442645 C1: PE_VDM_Request_DPM]
[10.470346 C1: Entered DP mode]
[10.470480 C1: PE_SRC_Ready]
>
> pd 1 state
Port C1 CC2, Enable - Role: SRC-DFP-VC TC State: Attached.SRC,
Signed-off-by: Scott Collyer <scollyer@google.com>
Change-Id: I3027b2904592063294f0258da5e153db15ae0d6e
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2949953
Commit-Queue: Scott Collyer <scollyer@chromium.org>
Tested-by: Scott Collyer <scollyer@chromium.org>
Reviewed-by: Diana Z <dzigterman@chromium.org>
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This CL moves the configs that are needed to be changed for an MP
release to the board.h files from baseboard.h.
BUG=b:183686750
BRANCH=quiche
TEST=make BOARD=quiche/gingerbread/baklava
Signed-off-by: Scott Collyer <scollyer@google.com>
Change-Id: I7c602ecb2f2af02638be080613bb83dee568c332
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2911737
Tested-by: Scott Collyer <scollyer@chromium.org>
Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
Reviewed-by: Diana Z <dzigterman@chromium.org>
Commit-Queue: Scott Collyer <scollyer@chromium.org>
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This CL modifies both power button press/release polairty and power
button LED control signals to be board specific instead of platform
specific.
Previously there were platform specific macros for
BUTTON_PRESSED_LEVEL and BUTTON_RELEASED_LEVEL. But, these levels will
depend on how the power button circuit is designed. This CL moves
these macros to board.h.
In addition, macros are added to for the GPIO signals used for
green/red LED control. This allows for boards that don't support the
power button LED at all.
BUG=b:164157329
BRANCH=quiche
TEST=Verfied power button works on both quiche and
gingerbread. Previously, this was only working on quiche because
gingerbread has opposite polarity for the power button signal. Also,
verfied that power button/status LED turns off when dock is off.
Signed-off-by: Scott Collyer <scollyer@google.com>
Change-Id: Iee838ee158d23252e8b429f51a1dd1a71d8e94a0
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2868225
Commit-Queue: Scott Collyer <scollyer@chromium.org>
Tested-by: Scott Collyer <scollyer@chromium.org>
Reviewed-by: Diana Z <dzigterman@chromium.org>
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This CL adds support for new GPIO signals used by the EC to notify
usb/mst hubs about type-c attach and over current protection events.
The usb3 only port on quiche/baklava uses a PPC, and previously the
PPC was only being used to enable/disable VBUS and did not have
interrupt support. However, there can still protection events that
must be handled.
This CL also adds a simple usbc state machine to be able to determine
attached.src state while in RO. The USB hub needs to be notified when
VBUS is present (BPWRDET) otherwise it will just go into suspend state
and there can be USB enumeration issues.
BUG=b:185066262
BRANCH=quiche
TEST=manual
For OCP, I set the PPC source current limit to 1.5A and connected to a
chromebook. This triggers the OCP event.
For BPWRDET/UFP_PLUG_DET verified that when attached, these signals
are high, when detached, are low as expected.
Signed-off-by: Scott Collyer <scollyer@google.com>
Change-Id: Ia147b970ea3dc298545aec4dedaa035ad2a1db30
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2818522
Tested-by: Scott Collyer <scollyer@chromium.org>
Reviewed-by: Sam Hurst <shurst@google.com>
Commit-Queue: Scott Collyer <scollyer@chromium.org>
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This CL adds support for the power button including a new task to
allow for power sequencing delays.
The power button is used for two purposes. First, to turn the dock on
or off, and second, to allow for a user set preference of the MF for
DP 2 or 4 lane selection. If the dock is off, the dock will be turned
on as soon as the short press timer expires. If the dock is already
on, then a short press action is only recognized on the release so a
long press will only change the MF preference.
BUG=b:164157329
BRANCH=quiche
TEST=manaual
short press -> turns dock on off as expected
long press -> toggles MF preference and flashes LED
Signed-off-by: Scott Collyer <scollyer@google.com>
Change-Id: I8519c072a7f10657c369344ead6149fc7d31bb36
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2718268
Tested-by: Scott Collyer <scollyer@chromium.org>
Reviewed-by: Sam Hurst <shurst@google.com>
Commit-Queue: Scott Collyer <scollyer@chromium.org>
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This CL adds support for honeybuns C1, which is the user facing usbc
port that also support ALT-DP mode. This CL adds support for both
gingergread and quiche.
Note that gingerbread is being checked in with a TODO for specifying
the PPC driver for C1. This is necessary to allow gingerbread to still
build while the solution for asymmetric port hardware is finalized.
BUG=b:183289386
BRANCH=None
TEST=Verified port C1 attaches to display adapters, usbpd hubs, and
type-c monitors
Signed-off-by: Scott Collyer <scollyer@google.com>
Change-Id: Iafbd5a38917601fc5055857662dd0e893d503948
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2699456
Tested-by: Scott Collyer <scollyer@chromium.org>
Reviewed-by: Diana Z <dzigterman@chromium.org>
Commit-Queue: Scott Collyer <scollyer@chromium.org>
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This CL adds config options and board level structs to fully support
USB-PD on port C0 for both gingerbread and quiche.
This includes all the svdm response functions required for support of
DP Alt-mode as a UFP_D. This also includes honeybuns specific version
of usb-pd policy functions.
BUG=b:175660576
BRANCH=None
TEST=Verify that C0 port can establish PD contract, enter ALT-DP mode
and extend display over DP/HDMI connectors.
Signed-off-by: Scott Collyer <scollyer@google.com>
Change-Id: I11edee85e63381f00114e9fbe012a37fd8174279
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2699455
Tested-by: Scott Collyer <scollyer@chromium.org>
Reviewed-by: Diana Z <dzigterman@chromium.org>
Commit-Queue: Scott Collyer <scollyer@chromium.org>
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This CL adds configs/structs required for USB-EP support for both
quiche and gingerbread. This CL also adds usbc support code to RO so
that Rd is being presented on both CC lines in RO.
In addition, there is some clean up for I2C port names and the debug
gpio utility function.
BUG=b:172493899
BRANCH=None
TEST=tested on quiche and verified that the USB-EP was enumerated
RST EP0 3220
RST EP0 3220
RST EP0 3220
RST EP0 3220
SETAD ae
[8.069004 Jumping to image RW]
Signed-off-by: Scott Collyer <scollyer@google.com>
Change-Id: I8d65ba55eecc2b82047a8cd433611f639af0c5ed
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2699453
Tested-by: Scott Collyer <scollyer@chromium.org>
Reviewed-by: Sam Hurst <shurst@google.com>
Commit-Queue: Scott Collyer <scollyer@chromium.org>
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This CL adds boards specific parts required to enable TCPMv2.0 for
both quiche and gingerbread. TCPMv2 configs are included, though, only
type-c support is being selected.
The reason for this intermediate point is an attempt to have more
manageable amounts of changes for CL reviews.
BUG=b:167601672
BRANCH=None
TEST=verfied type-c attaches properly on quiche
Signed-off-by: Scott Collyer <scollyer@google.com>
Change-Id: I2a4c3bf4089fb3e167d06921b177d8c4e61a021f
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2215424
Tested-by: Scott Collyer <scollyer@chromium.org>
Commit-Queue: Scott Collyer <scollyer@chromium.org>
Reviewed-by: Diana Z <dzigterman@chromium.org>
Auto-Submit: Scott Collyer <scollyer@chromium.org>
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This CL contains a skelton image. It is a derivative of honeybuns.
BUG=b:154667178
BRANCH=none
TEST=make BOARD=Gingerbread and verify that image builds successfully
Signed-off-by: Udaya Kiran Ammu <udaykiran@google.com>
Change-Id: I63a0e07956ed4cf430c09b94c9cd221fae3c4dd4
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2161461
Reviewed-by: Scott Collyer <scollyer@chromium.org>
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