| Commit message (Collapse) | Author | Age | Files | Lines |
|---|
| |
|
|
|
|
|
|
|
|
|
|
|
|
|
|
| |
For all boards that defined CONFIG_CHARGER, CONFIG_CHARGER_V2 is also
defined. Remove references to CONFIG_CHARGER_V2 from board header files.
Replace CONFIG_CHARGER_V2 in common C modules with CONFIG_CHARGER when
appropriate.
BUG=b:139699769
BRANCH=none
TEST=make buildall -j
Change-Id: I6b54baf4ad2406bbed629b6b272dad9ea6a81280
Signed-off-by: Keith Short <keithshort@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1789420
Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org>
|
| |
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
| |
The extentions were added to make the compiler perform most
of the verification that the conversion was being done correctly
to remove 8bit addressing as the standard I2C/SPI address type.
Now that the compiler has verified the code, the extra
extentions are being removed
BUG=chromium:971296
BRANCH=none
TEST=make buildall -j
TEST=verify sensor functionality on arcada_ish
Change-Id: I36894f8bb9daefb5b31b5e91577708f6f9af2a4f
Signed-off-by: Denis Brockus <dbrockus@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1704792
Reviewed-by: Jack Rosenthal <jrosenth@chromium.org>
|
| |
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
| |
Opt for 7bit slave addresses in EC code. If 8bit is
expected by a driver, make it local and show this in
the naming.
Use __7b, __7bf and __8b as name extensions for i2c/spi
addresses used in the EC codebase. __7b indicates a
7bit address by itself. __7bf indicates a 7bit address
with optional flags attached. __8b indicates a 8bit
address by itself.
Allow space for 10bit addresses, even though this is
not currently being used by any of our attached
devices.
These extensions are for verification purposes only and
will be removed in the last pass of this ticket. I want
to make sure the variable names reflect the type to help
eliminate future 7/8/7-flags confusion.
BUG=chromium:971296
BRANCH=none
TEST=make buildall -j
Change-Id: I2fc3d1b52ce76184492b2aaff3060f486ca45f45
Signed-off-by: Denis Brockus <dbrockus@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1699893
Reviewed-by: Jack Rosenthal <jrosenth@chromium.org>
|
| |
|
|
|
|
|
|
|
|
|
|
|
|
|
| |
Currently chipset specific power signals are defined at board/baseboard
level. These power signals are moved to chipset specific file to minimize
the redundant power signals array defined for each board/baseboard.
BUG=b:134079574
BRANCH=none
TEST=make buildall -j
Change-Id: I351904f7cd2e0f27844c0711beb118d390219581
Signed-off-by: Vijay Hiremath <vijay.p.hiremath@intel.com>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1636837
Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
|
| |
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
| |
Currently, tcpc_config assumes TCPCs are on I2C bus. ITE's EC has an
embedded TCPC.
This patch adds bus_type field to struct tcpc_config_t so that a TCPC
location on other type of bus can be specified.
Signed-off-by: Daisuke Nojiri <dnojiri@chromium.org>
BUG=none
BRANCH=none
TEST=buildall
Change-Id: Ieac733011700b351e6323f46070dcf46d9e1154b
Reviewed-on: https://chromium-review.googlesource.com/1640305
Commit-Ready: Daisuke Nojiri <dnojiri@chromium.org>
Tested-by: Daisuke Nojiri <dnojiri@chromium.org>
Legacy-Commit-Queue: Commit Bot <commit-bot@chromium.org>
Reviewed-by: Jett Rink <jettrink@chromium.org>
|
| |
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
| |
tcpc_config contained a field for both the alert polarity and open
drain/push pull configuration. There is also a possible difference in TCPC
reset polarity. Instead of adding yet another field to describe this
configuration, it would be better to convert alert polairty, open
drain and reset polarity into a single flags field.
This CL modifies the tcpc_config struct to use a single flags field
and adds defines for what existing flag options can be.
BUG=b:130194031
BRANCH=none
TEST=make -j buildall
Change-Id: Ifb7e7604edb7021fb2d36ee279049eb52fefc99e
Signed-off-by: Scott Collyer <scollyer@google.com>
Signed-off-by: Furquan Shaikh <furquan@google.com>
Reviewed-on: https://chromium-review.googlesource.com/1551581
Commit-Ready: Furquan Shaikh <furquan@chromium.org>
Tested-by: Furquan Shaikh <furquan@chromium.org>
Reviewed-by: Jett Rink <jettrink@chromium.org>
Reviewed-by: Paul Fagerburg <pfagerburg@chromium.org>
|
| |
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
| |
It's simply a bad idea to describe a macro in multiple locations.
It'll make it hard to change. It'll be difficult to keep all
locations in sync.
This patch replaces the comment duplicated in all ec.tasklist with
a pointer to the CONFIG_TASK_LIST definition. The macro will be
described in a single place (just like all/most other macros).
Signed-off-by: Daisuke Nojiri <dnojiri@chromium.org>
BUG=none
BRANCH=none
TEST=buildall
Change-Id: Id658b9d68e742e4334c692b804d9c98c8de21313
Reviewed-on: https://chromium-review.googlesource.com/1551579
Commit-Ready: ChromeOS CL Exonerator Bot <chromiumos-cl-exonerator@appspot.gserviceaccount.com>
Tested-by: Daisuke Nojiri <dnojiri@chromium.org>
Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org>
Reviewed-by: Jett Rink <jettrink@chromium.org>
|
| |
|
|
|
|
|
|
|
|
|
|
|
|
|
|
| |
Requested for linux integration, use BIT instead of 1 <<
First step replace bit operation with operand containing only digits.
Fix an error in motion_lid try to set bit 31 of a signed integer.
BUG=None
BRANCH=None
TEST=compile
Change-Id: Ie843611f2f68e241f0f40d4067f7ade726951d29
Signed-off-by: Gwendal Grignou <gwendal@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/1518659
Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org>
|
| |
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
| |
Currently, charge_manager_update_charge does not handle NULL pointer
for struct charge_port_info any differently. It's not sanity-checked
either (thus memory access violation can occur).
This patch will make charge_manager_update_charge accept NULL pointer
and set available current and voltage to zero.
This also helps callers' intentions be clear because callers can
explicitly specify NULL (instead of passing a pointer to chg = {0},
which is initialized somewhere else).
Signed-off-by: Daisuke Nojiri <dnojiri@chromium.org>
BUG=none
BRANCH=none
TEST=buildall
Change-Id: I518662ab6a3a07f93da5d34cf62a6f856884f67d
Reviewed-on: https://chromium-review.googlesource.com/1226125
Commit-Ready: Daisuke Nojiri <dnojiri@chromium.org>
Tested-by: Daisuke Nojiri <dnojiri@chromium.org>
Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org>
|
| |
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
| |
Currently, available current is consistently set to zero when a supplier
is disconnected across BC 1.2 drivers, PD task, usb charger task but
voltage is set to zero only in some places.
This patch will set available voltage consistently to 0 on disconnected
ports.
This change should have no impact externally or internally because
currently ports are treated as a disconnected port as long as available
current is zero.
Signed-off-by: Daisuke Nojiri <dnojiri@chromium.org>
BUG=chromium:841944
BRANCH=none
TEST=Verify ectool usbpdpower 1 return 'Port 1: Disconnected' and
'Port 1: SNK (not charging)' without and with a BJ adapter connected
respectively on Fizz.
Verify ectool usbpdpower prints 'Disconnected' and 'SNK Charger PD'
on Vayne without and with USB-C charger, respectively.
Verify ectool usbpdpower prints 'Disconnected' and 'SNK Charger Type-C'
on Vayne without and with a phone USB-C charger, respectively.
Change-Id: I9aca575a4a4240ec1f669c55437decaedf758a77
Reviewed-on: https://chromium-review.googlesource.com/1222092
Commit-Ready: Daisuke Nojiri <dnojiri@chromium.org>
Tested-by: Daisuke Nojiri <dnojiri@chromium.org>
Reviewed-by: Jett Rink <jettrink@chromium.org>
|
| |
|
|
|
|
|
|
|
|
|
|
|
|
| |
Instead of tying together CONFIG_WP_ALWAYS and RDP protection,
separate the options.
BRANCH=nocturne
BUG=b:111330723
TEST=make buildall -j
Change-Id: I905b573a900ef4dd0431666c525c951582143e09
Signed-off-by: Nicolas Boichat <drinkcat@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/1222093
Reviewed-by: Randall Spangler <rspangler@chromium.org>
|
| |
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
| |
This adds support to configure dualrole setting
per port, so that servo v4 can adjust charge and
dut port separately.
servo will detect charge capability on CHG port
and choose source or sink as appropriate.
Fix null dereference bug in genvif duel to dynamic src_pdo.
"cc" command allows src, snk, srcdts, snkdts configurations.
BRANCH=None
BUG=b:72557427
TEST=charge through and also passive hub. Note Dru doesn't accept DTS hub.
TEST=make buildall -j
Change-Id: I19f1d1a5c37647fec72202191faa4821c06fb460
Signed-off-by: Nick Sanders <nsanders@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/1096654
Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
|
| |
|
|
|
|
|
|
|
|
|
|
|
| |
With this patch, we can use them in code.
BUG=none
BRANCH=none
TEST=make buildall -j
Change-Id: Id9646ef82f26bcb6bf55f2ce33a4647b5934c365
Signed-off-by: Dino Li <Dino.Li@ite.com.tw>
Reviewed-on: https://chromium-review.googlesource.com/1116632
Reviewed-by: Jett Rink <jettrink@chromium.org>
|
| |
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
| |
With this patch, EC will reset peripheral, OOB message,
virtual wire, and flash access channels to default settings
while the eSPI_reset# pin is asserted.
BUG=b:80250980
BRANCH=none
TEST=ran console command `hibernate` or 'apshutdown' during system boot
to kernel and then wake system up by power button x 100.
Change-Id: Iceb7ddf1a045937c004f429fc46a7346578b0cce
Signed-off-by: Dino Li <Dino.Li@ite.com.tw>
Reviewed-on: https://chromium-review.googlesource.com/1074672
Tested-by: Stephanie Payton <stephie0128@gmail.com>
Reviewed-by: Furquan Shaikh <furquan@chromium.org>
Reviewed-by: Jett Rink <jettrink@chromium.org>
|
| |
|
|
|
|
|
|
|
|
|
|
|
|
|
| |
Not all boards using ITE83XX use mouse LDN. This change adds a config
option to allow boards to explicity enable this device. Currently,
this device is enabled only for glkrvp_ite and it83xx_evb. It is
disabled for reef_ite and bip.
Change-Id: I7149fd0cb35cc9f49f2b7b80f6c2deefe2edda55
Signed-off-by: Furquan Shaikh <furquan@google.com>
Reviewed-on: https://chromium-review.googlesource.com/1070785
Commit-Ready: Furquan Shaikh <furquan@chromium.org>
Tested-by: Furquan Shaikh <furquan@chromium.org>
Reviewed-by: Jett Rink <jettrink@chromium.org>
Reviewed-by: Dino Li <dino.li@ite.corp-partner.google.com>
|
| |
|
|
|
|
|
|
|
|
|
|
|
|
| |
Convert all boards that use both CONFIG_ESPI and CONFIG_LPC to only use
the CONFIG_HOSTCMD_ESPI option.
BRANCH=none
BUG=chromium:818804
TEST=entire stack works with lpc and espi
Change-Id: Idd1519494a4f880b7b2018d059579d50c5461fcf
Signed-off-by: Jett Rink <jettrink@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/1067499
Reviewed-by: Randall Spangler <rspangler@chromium.org>
|
| |
|
|
|
|
|
|
|
|
|
|
|
|
|
|
| |
This change updates all APL/GLK boards to use
chipset_pre_init_callback instead of hook.
BUG=b:78259506
BRANCH=None
TEST=Verified that yorp still boots.
Change-Id: I71ab0f1111e89a254db83fc58abfdfe8eacd3575
Signed-off-by: Furquan Shaikh <furquan@google.com>
Reviewed-on: https://chromium-review.googlesource.com/1018734
Commit-Ready: Furquan Shaikh <furquan@chromium.org>
Tested-by: Furquan Shaikh <furquan@chromium.org>
Reviewed-by: Jett Rink <jettrink@chromium.org>
|
| |
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
| |
Now that board version can come from CBI, we can have a real error
reading it. We should pass that error to the console or to the
AP on the host command and let the AP firmware (or user) decided how to
handle that error case
Also update the CONFIG_BOARD_VERSION to be derived instead of needed
in most cases.
BRANCH=none
BUG=b:77972120
TEST=Error reported on EC console and AP console when CBI is
invalid on yorp
Change-Id: Ib8d80f610ea226265a61e68b61965150cdc9bb04
Signed-off-by: Jett Rink <jettrink@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/1015776
Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
|
|
|
Initial bring-up code for GLKRVP using ITE8320 MECC.
BUG=b:77798195
BRANCH=none
TEST=Able to boot to OS with host communication disabled
Coreboot image.
Change-Id: Iad0e22c9e7ef1c36889ef5e7f7e3f5a121f234e1
Signed-off-by: Vijay Hiremath <vijay.p.hiremath@intel.com>
Reviewed-on: https://chromium-review.googlesource.com/1003766
Commit-Ready: Vijay P Hiremath <vijay.p.hiremath@intel.com>
Tested-by: Vijay P Hiremath <vijay.p.hiremath@intel.com>
Reviewed-by: Jett Rink <jettrink@chromium.org>
|
