| Commit message (Collapse) | Author | Age | Files | Lines |
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This patch adds unit tests for Cros Board Info APIs.
BUG=b:163038871
BRANCH=none
TEST=buildall
Signed-off-by: Daisuke Nojiri <dnojiri@chromium.org>
Change-Id: I7b2fdb2c4f13da12f8c0dc2ab526332cbd46d849
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2339393
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Google is working to change its source code to use more inclusive
language. To that end, replace the term "dummy" with inclusive
alternatives.
BUG=b:162781382
BRANCH=None
TEST=make -j buildall
`grep -ir dummy *`
The only results are in "private/nordic_keyboard/sdk8.0.0"
which is not our code.
Signed-off-by: Sam Hurst <shurst@google.com>
Change-Id: I6a42183d998e4db4bb61625f962867fda10722e2
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2335737
Reviewed-by: Tom Hughes <tomhughes@chromium.org>
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Add a new test that runs a full set of TCPMv2 layers and state
machines, talking to a simulated TCPC via I2C.
Initial test cases:
1) Plug in a non-PD power supply -> we connect as sink.
2) AP S5 > S3 > S0 -> auto-toggle + low power.
BUG=b:161167893
BRANCH=none
TEST=make -j run-usb_tcpmv2_tcpci
Signed-off-by: Edward Hill <ecgh@chromium.org>
Change-Id: If8b8eb2cca722ed01cbe1d6000fb3e4f4b70149c
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2283911
Reviewed-by: Paul Fagerburg <pfagerburg@chromium.org>
Reviewed-by: Denis Brockus <dbrockus@chromium.org>
Reviewed-by: Jett Rink <jettrink@chromium.org>
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Different DB options may cause different numbers of charger chips to be
present on the system. Remove constant count for charger chips, and
instead always call into the overridable function to query the count.
BRANCH=None
BUG=b:155963446
TEST=make -j buildall
Signed-off-by: Diana Z <dzigterman@chromium.org>
Change-Id: I0e65b8af351ecabe6f7b823e0e56f1932cc280a6
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2277833
Commit-Queue: Aseda Aboagye <aaboagye@chromium.org>
Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
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A new hook HOOK_CHIPSET_SHUTDOWN_COMPLETE is introduced, which are
called from the chipset task, while the system has already shut down
and all the suspend rails are already off.
It will be used for executing pending EC reboot at the chipset shutdown.
The EC reboot should be executed when the chipset is completely off.
BRANCH=None
BUG=b:156981868
TEST=Built all boards.
Change-Id: I12f26957e46a1bb34ef079f127b0bddd133cd4e7
Signed-off-by: Wai-Hong Tam <waihong@google.com>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2228395
Reviewed-by: Paul Fagerburg <pfagerburg@chromium.org>
Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org>
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Add pd console commands that enables the device
to work with PD FAFT. Other pd commands such as
bist, vdm and ping will be added in another CL.
BUG=b:151481791
BUG=chromium:1021235
BRANCH=none
TEST=make -j buildall
manual:
Verified that system:
pd tryscr 0 - did not trysrc
pd tryscr 1 - did trysrc
pd tryscr 2 - normal trysrc operation
pd 0 tx - started as snk
pd 0 charger - started as src
pd 0 dev 5 - charged at 5V
pd 0 dev 12 - charged at 12V
pd 0 dev 15 - charged at 15V
pd 0 dev 20 - charged at 20V
pd 0 disable - pd was disabled
pd 0 enable - pd was enabled
pd 0 soft - sent soft reset
pd 0 hard - sent hard reset
pd 0 dualrole off - stayed in src and switched to snk on disconnect
pd 0 dualrole on - toggled from snk to src and vice versa
pd 0 dualrole sink - was a sink only
pd 0 dualrole source - was a source only
pd 0 dualrole freeze - stayed in current power role and switched
to snk on disconnect
pd 0 swap power - initiated a power role swap
pd 0 swap vconn - initiated a vconn swap
pd 0 swap data - initiated a data role swap
Change-Id: Id1542001c0e52d1d5bfbc5b9cb826b9a204e5b2e
Signed-off-by: Sam Hurst <shurst@google.com>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1962506
Commit-Queue: Denis Brockus <dbrockus@chromium.org>
Reviewed-by: Denis Brockus <dbrockus@chromium.org>
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BUG=b:149350081
BRANCH=none
TEST=build all, and emerged ec related packages for host and octopus.
$ make buildall -j
$ cros_workon --host list
chromeos-base/chromeos-cr50-dev
chromeos-base/chromeos-ec
chromeos-base/chromeos-ec-headers
chromeos-base/ec-devutils
chromeos-base/ec-utils
chromeos-base/ec-utils-test
dev-util/hdctools
$ sudo emerge chromeos-cr50-dev -j
$ sudo emerge chromeos-ec -j
$ sudo emerge chromeos-ec-headers -j
$ sudo emerge ec-devutils -j
$ sudo emerge ec-utils -j
$ sudo emerge ec-utils-test -j
$ sudo emerge hdctools -j
$ cros_workon-octopus list
chromeos-base/chromeos-ec
chromeos-base/chromeos-ec-headers
chromeos-base/ec-devutils
chromeos-base/ec-utils
chromeos-base/ec-utils-test
dev-util/hdctools
$ sudo emerge-octopus chromeos-ec -j
$ sudo emerge-octopus chromeos-ec-headers -j
$ sudo emerge-octopus ec-devutils -j
$ sudo emerge-octopus ec-utils -j
$ sudo emerge-octopus ec-utils-test -j
$ sudo emerge-octopus hdctools -j
Signed-off-by: Namyoon Woo <namyoon@chromium.org>
Change-Id: If751b26b0635b0021c077338e96eaa8e8dcf17a5
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2080631
Reviewed-by: Edward Hill <ecgh@chromium.org>
Reviewed-by: Vadim Bendebury <vbendeb@chromium.org>
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The action_delay_sec field hasn't actually been referenced by
any code since 2013. Removing the corresponding struct field.
BUG=None
BRANCH=None
TEST=builds
Change-Id: Ia7334c26b85d0161ff61bb51fbdda61bb921595a
Signed-off-by: Diana Z <dzigterman@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2054945
Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
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The HOOK_CHIPSET_RESET hook is called both on AP shutdown and startup,
so do not start fan unless the AP is being turned on.
BRANCH=none
BUG=b:146583266
TEST=Verified on puff
Signed-off-by: Andrew McRae <amcrae@google.com>
Change-Id: I2c5ae87245e260718c3fa9a979d0a1c3a0c0dd00
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1977066
Tested-by: Andrew McRae <amcrae@chromium.org>
Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org>
Commit-Queue: Andrew McRae <amcrae@chromium.org>
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With upcoming boards which use multiple charger chips, the EC codebase
needs to be changed to assume chargers may have different I2C ports.
This commit creates the driver structure and wrapper functions, which
for now are hard-coded to chip 0 for equivalent behavior with previous
code. A general charger config is created for all boards in charger.c
for now, which uses the build information to fill in the structure.
All boards will default to defining CONFIG_CHARGER_SINGLE_CHIP, which in
turn defines a CHARGER_SOLO which can be used by drivers which have code
that needs to determine charger numbers. For boards which have multiple
chips, they may undefine this config and should generate build errors if
their driver is still using the hardcoded charger reference of
CHARGER_SOLO. Older drivers may continue using CHARGER_SOLO in
non-static functions until they're needed in a multiple charger board.
For boards which may be supporting different I2C configurations for the
charger over board versions, they may define
CONFIG_CHARGER_RUNTIME_CONFIG to fill in these fields after boot.
BRANCH=none
BUG=b:147672225
TEST=builds, chargers on hatch and octopus work
Change-Id: I390ede494226252e512595c48099fa1288ffe93e
Signed-off-by: Diana Z <dzigterman@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2008451
Reviewed-by: Jett Rink <jettrink@chromium.org>
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This is the second half of b/147290482
Cleaning up to use pd_data_role instead of int
BUG=b:147314832
BRANCH=none
TEST=make buildall -j
Change-Id: I2445b06f5f5469fb1f3a968034a83e3ee792e7c7
Signed-off-by: Denis Brockus <dbrockus@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1991845
Reviewed-by: Jett Rink <jettrink@chromium.org>
Reviewed-by: Edward Hill <ecgh@chromium.org>
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pd_get_role in the TCPMv1 stack meant pd_get_power_role.
pd_get_role in the TCPMv2 stack meant pd_get_data_role.
This CL will clean that up and make them the correct naming.
pd_get_power_role will also return an enum pd_power_role
type instead of an int.
BUG=b:147290482
BRANCH=none
TEST=make buildall -j
Change-Id: I73ee465401ccd050c2bd151f2fc043a59d95e079
Signed-off-by: Denis Brockus <dbrockus@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1991844
Reviewed-by: Jett Rink <jettrink@chromium.org>
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There are a number of potential callers that care if there is a battery,
but for boards that don't support batteries (chromeboxes) we can let
them skip implementing this stub.
Tests default to battery present, but they can provide their own
per-test implementation if desired.
Some PD battery presence checks have been disabled when battery support
is disabled; these are irrelevant when there is no battery, and they
cause linking failures because they depend on both the charge manager
and battery presence.
BUG=b:146504182
BRANCH=none
TEST=buildall
Change-Id: Ifad6a9e356c8ac2146b09bc83b359a7c55adc1a7
Signed-off-by: Peter Marheine <pmarheine@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1980099
Reviewed-by: Scott Collyer <scollyer@chromium.org>
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Krane/Jacuzzi need a 100KHz SMBus port for battery, in addition to the
existing two i2c ports.
This CL adds a bit-bang driver that supports i2c/smbus bit-banging
through a set of pre-defined gpio pins.
BUG=b:138161741,b:138415463
TEST=On a reworked jacuzzi (battery i2c connected to other gpios),
1) `battery` shows reasonable output (this verifies i2c_readN,
i2c_read_string)
2) `i2cscan` works for port 3 (bitbang port)
3) `cutoff` (verifies i2c_writeN)
4) `i2ctest` stress test
BRANCH=master
Change-Id: I78020e5c51707c3d9f0fd54f2c299e2f29cabe2f
Signed-off-by: Ting Shen <phoenixshen@google.com>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1765110
Reviewed-by: Alexandru M Stan <amstan@chromium.org>
Commit-Queue: Ting Shen <phoenixshen@chromium.org>
Tested-by: Ting Shen <phoenixshen@chromium.org>
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There is a board specific usb_pd_policy.c file that contains a lot of
code for handling DisplayPort Alternate mode, Google Firmware Update
Alternate mode, as well as some PD policy functions such as deciding to
Accept or Reject a data role swap or a power role swap. Several boards
simply copy/paste this code from project to project as a lot of this
functionality is not actually board specific.
This commit tries to refactor this by pulling the functions that are not
mainly board specific into common code. The functions are made
overridable such that boards that truly do require a different
implementation may do so.
Additionally, this consolidation changes the policy behaviour for some
boards, but they should be for the better. Some examples include that
data swaps are always allowed if we are a UFP (no system image
requirement), power swaps are allowed to become a sink if we are no
longer dual role (e.g. - in suspend), and DisplayPort Alternate Mode is
not entered if the AP is off.
In order to facilitate this refactor, a couple CONFIG_* options were
introduced:
- CONFIG_USB_PD_DP_HPD_GPIO
/* HPD is sent to the GPU from the EC via a GPIO */
- CONFIG_USB_PD_CUSTOM_VDO
/*
* Define this if a board needs custom SNK and/or SRC PDOs.
*
* The default SRC PDO is a fixed 5V/1.5A with PDO_FIXED_FLAGS indicating
* Dual-Role power, USB Communication Capable, and Dual-Role data.
*
* The default SNK PDOs are:
* - Fixed 5V/500mA with the same PDO_FIXED_FLAGS
* - Variable (non-battery) min 4.75V, max PD_MAX_VOLTAGE_MV,
* operational current PD_MAX_CURRENT_MA,
* - Battery min 4.75V, max PD_MAX_VOLTAGE_MV, operational power
* PD_OPERATING_POWER_MW
*/
BUG=chromium:1021724,b:141458448
BRANCH=<as many as we can that are still supported>
TEST=`make -j buildall`
TEST=Flash a kohaku, verify that DP Alt Mode still works with a variety
of DP peripherals
TEST=Repeat above with a nocturne
TEST=Repeat above with an atlas
Change-Id: I18fd7e22dc77fe1dc6c21c38cd7f1bc53cae86cb
Signed-off-by: Aseda Aboagye <aaboagye@google.com>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1949052
Tested-by: Aseda Aboagye <aaboagye@chromium.org>
Reviewed-by: Paul Fagerburg <pfagerburg@chromium.org>
Reviewed-by: Diana Z <dzigterman@chromium.org>
Reviewed-by: Denis Brockus <dbrockus@chromium.org>
Commit-Queue: Aseda Aboagye <aaboagye@chromium.org>
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Code on Tot assumes that port count was the port to
discharge instead of port parameter
BRANCH=none
BUG=none
TEST=verified with unit test (in this CL)
Change-Id: I17658a0c555f9cea56fa4ec1652e0faf62e3d6cc
Signed-off-by: Jett Rink <jettrink@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1896125
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It was pointed out to me that the fans config list was non-const, but
there is only 2 boards that require non-const configuration, so
by default make it const, but allow an override.
BRANCH=none
BUG=None
TEST=EC compiles, make tests, buildall
Change-Id: I3ef8c72f6774e1a76584c47d89287f446199e0f2
Signed-off-by: Andrew McRae <amcrae@google.com>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1893025
Reviewed-by: Andrew McRae <amcrae@chromium.org>
Tested-by: Andrew McRae <amcrae@chromium.org>
Commit-Queue: Andrew McRae <amcrae@chromium.org>
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This CL enables the fpsensor task and adds the following
remaining fingerprint host commands to the fuzzer:
* EC_CMD_FP_PASSTHRU
* EC_CMD_FP_INFO
* EC_CMD_FP_FRAME
* EC_CMD_FP_STATS
* EC_CMD_FP_TEMPLATE
BRANCH=none
BUG=b:116065496
TEST=make buildall -j
TEST=make run-host_command_fuzz
TEST=# Pull in TEST_COVERAGE fix
git fetch "https://chromium.googlesource.com/chromiumos/platform/ec" \
refs/changes/86/1725186/1 && git cherry-pick FETCH_HEAD
make host-host_command_fuzz TEST_COVERAGE=1
timeout 5m ./build/host/host_command_fuzz/host_command_fuzz.exe
llvm-profdata merge -sparse default.profraw -o default.profdata
llvm-cov show build/host/host_command_fuzz/host_command_fuzz.exe \
--instr-profile=default.profdata --format=html --output-dir=cov
# Inspect cov/.../common/fpsensor/fpsensor_state.c.html to verify
Change-Id: Icad9493ba41cd4daa61a30246d01afd1dbe16c56
Signed-off-by: Craig Hesling <hesling@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1682945
Reviewed-by: Tom Hughes <tomhughes@chromium.org>
Commit-Queue: Sean Abraham <seanabraham@chromium.org>
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In fpsensor code, use always_memset() in place of memset().
BRANCH=nocturne
BUG=chromium:968809,chromium:989594,b:130238794
TEST=make -j buildall
TEST=tested enrollment, matching and multifinger on nocturne DUT
Change-Id: I29e32bd2838c1f240607799e61f29759aaee7600
Signed-off-by: Yicheng Li <yichengli@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1737206
Reviewed-by: Tom Hughes <tomhughes@chromium.org>
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The extentions were added to make the compiler perform most
of the verification that the conversion was being done correctly
to remove 8bit addressing as the standard I2C/SPI address type.
Now that the compiler has verified the code, the extra
extentions are being removed
BUG=chromium:971296
BRANCH=none
TEST=make buildall -j
TEST=verify sensor functionality on arcada_ish
Change-Id: I36894f8bb9daefb5b31b5e91577708f6f9af2a4f
Signed-off-by: Denis Brockus <dbrockus@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1704792
Reviewed-by: Jack Rosenthal <jrosenth@chromium.org>
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Opt for 7bit slave addresses in EC code. If 8bit is
expected by a driver, make it local and show this in
the naming.
Use __7b, __7bf and __8b as name extensions for i2c/spi
addresses used in the EC codebase. __7b indicates a
7bit address by itself. __7bf indicates a 7bit address
with optional flags attached. __8b indicates a 8bit
address by itself.
Allow space for 10bit addresses, even though this is
not currently being used by any of our attached
devices.
These extensions are for verification purposes only and
will be removed in the last pass of this ticket. I want
to make sure the variable names reflect the type to help
eliminate future 7/8/7-flags confusion.
BUG=chromium:971296
BRANCH=none
TEST=make buildall -j
Change-Id: I2fc3d1b52ce76184492b2aaff3060f486ca45f45
Signed-off-by: Denis Brockus <dbrockus@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1699893
Reviewed-by: Jack Rosenthal <jrosenth@chromium.org>
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This adds fake SPI Master and TRNG support to the
host target.
This change also adds the missing emulated gpio
interface function.
Although general purpose, these changes are setup for
allowing fuzzing of the FPMCU specific host commands.
Thus, they do not impact any outstanding code.
BRANCH=none
BUG=b:116065496
TEST=make buildall -j
Change-Id: Icfc40e7bf8ee421a4c3ad15377fd56ae68c763d7
Signed-off-by: Craig Hesling <hesling@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1684223
Reviewed-by: Randall Spangler <rspangler@chromium.org>
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Ran the following command:
git grep -l 'Copyright (c)' | \
xargs sed -i 's/Copyright (c)/Copyright/g'
BRANCH=none
BUG=none
TEST=make buildall -j
Change-Id: I6cc4a0f7e8b30d5b5f97d53c031c299f3e164ca7
Signed-off-by: Tom Hughes <tomhughes@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1663262
Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org>
Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
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Currently, supplier_priority is shared across boards. This patch makes
it weakly defined so that boards can customize it.
Signed-off-by: Daisuke Nojiri <dnojiri@chromium.org>
BUG=none
BRANCH=none
TEST=Verify BC12, PD work on Flapjack. buildall.
Change-Id: Ie1e73758c611414512425121164bf7d56cf02697
Reviewed-on: https://chromium-review.googlesource.com/1622889
Commit-Ready: Daisuke Nojiri <dnojiri@chromium.org>
Tested-by: Daisuke Nojiri <dnojiri@chromium.org>
Legacy-Commit-Queue: Commit Bot <commit-bot@chromium.org>
Reviewed-by: Jett Rink <jettrink@chromium.org>
Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
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According to USB-C spec 1.3 Table 4-17 "Precedence of power source
usage", the supplier's priority should be:
USB-C 3.0A/1.5A > BC1.2 > USB-C under 1.5A.
This CL propose to raise the BC1.2 priority to fix that
charge_manager won't choose BC1.2 when the port reports it can
supply both TYPEC 500ma and BC1.2 supplier. According to the
spec mentioned aboved, we should prefer BC1.2 rather than TYPEC.
Besdies, charge_manager is able to pick the supplier which provides
the higheste power. The CL simplifies the supplier priority a bit by
taking advantage of the feature.
TEST=Charge kukui with 5V/2A charger and see it can drain 1.34A (DCP
current bound of mt6370 is 1.5A) rather than 0.5A.
TEST=Charge kukui with Type-C 5V3A/CDP/DCP/SDP/PD charger randomly and see
that the current it drains is reasonable.
TEST=Charge soraka with 'A', and plug another port with 'B',
and see it can transist the sinking port from A to B.
Here (A, B) are:
1. (SDP 5V0.5A, Type-C 5V3A)
2. (CDP 5V1.5A, PD)
3. (SDP 5V0.5A, CDP 5V1.5A)
4. (CDP 5V1.5A, Type-C 5V3A)
5. (Type-C 5V3A, PD)
BUG=b:131126720
BRANCH=None
Change-Id: I46384e09d764aa926129358657d0593fca4923c2
Signed-off-by: Yilun Lin <yllin@google.com>
Reviewed-on: https://chromium-review.googlesource.com/1581859
Commit-Ready: ChromeOS CL Exonerator Bot <chromiumos-cl-exonerator@appspot.gserviceaccount.com>
Tested-by: Yilun Lin <yllin@chromium.org>
Reviewed-by: Jett Rink <jettrink@chromium.org>
Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org>
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It's simply a bad idea to describe a macro in multiple locations.
It'll make it hard to change. It'll be difficult to keep all
locations in sync.
This patch replaces the comment duplicated in all ec.tasklist with
a pointer to the CONFIG_TASK_LIST definition. The macro will be
described in a single place (just like all/most other macros).
Signed-off-by: Daisuke Nojiri <dnojiri@chromium.org>
BUG=none
BRANCH=none
TEST=buildall
Change-Id: Id658b9d68e742e4334c692b804d9c98c8de21313
Reviewed-on: https://chromium-review.googlesource.com/1551579
Commit-Ready: ChromeOS CL Exonerator Bot <chromiumos-cl-exonerator@appspot.gserviceaccount.com>
Tested-by: Daisuke Nojiri <dnojiri@chromium.org>
Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org>
Reviewed-by: Jett Rink <jettrink@chromium.org>
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Requested for linux integration, use BIT instead of 1 <<
First step replace bit operation with operand containing only digits.
Fix an error in motion_lid try to set bit 31 of a signed integer.
BUG=None
BRANCH=None
TEST=compile
Change-Id: Ie843611f2f68e241f0f40d4067f7ade726951d29
Signed-off-by: Gwendal Grignou <gwendal@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/1518659
Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org>
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These definitions provide the necessary dcrypto functionality for
fuzzing pinweaver. They can be built out as needed to support
further fuzzing.
BRANCH=none
BUG=chromium:876582
TEST=make -j buildfuzztests &&
./build/host/cr50_fuzz/cr50_fuzz.exe (with the cr50_fuzz CL)
Change-Id: I36ce874efab5dbc59825d126f6079b7b6d0da9ef
Signed-off-by: Allen Webb <allenwebb@google.com>
Reviewed-on: https://chromium-review.googlesource.com/1180573
Reviewed-by: Randall Spangler <rspangler@chromium.org>
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Provides a new EC host command 'uptime info' which gathers up some
information which may be useful for debugging spurious resets on the AP
(was the EC reset recently? Why was the EC reset? If the EC reset the
AP, why did it do so?, etc.). Provide ectool support for the same.
Example results of `ectool uptimeinfo`:
```
localhost ~ # ectool uptimeinfo
EC uptime: 475.368 seconds
AP resets since EC boot: 2
Most recent AP reset causes:
315.903: reset: console command
363.507: reset: keyboard warm reboot
EC reset flags at last EC boot: reset-pin | sysjump
```
BRANCH=none
TEST=Perform some `apreset` commands from the EC console and observe
their side-effects via the `ectool uptimeinfo` command on the AP side.
Test sequences include no-resets through 5 resets, observing that the
ring buffer handling was correct.
BUG=b:110788201, b:79529789
Signed-off-by: Jonathan Brandmeyer <jbrandmeyer@chromium.org>
Change-Id: I0bf29d69de471c64f905ee8aa070b15b4f34f2ba
Reviewed-on: https://chromium-review.googlesource.com/1139028
Commit-Ready: Jonathan Brandmeyer <jbrandmeyer@chromium.org>
Tested-by: Jonathan Brandmeyer <jbrandmeyer@chromium.org>
Reviewed-by: Jett Rink <jettrink@chromium.org>
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In order to be able to recover from the AP and Cr50 getting out of
sync, this logging functionality gives Cr50 a way to track the
state changes of the merkle tree so that the AP can be updated to
the current state as long as it has a recent enough copy.
This involves packing the important information so it can be stored
efficiently on flash, and adding the necessary messages for the
replay.
CQ-DEPEND=CL:895395,CL:929430
BRANCH=none
BUG=chromium:809729, chromium:809745
TEST=cd ~/src/platform/ec && V=1 make run-weaver_ng -j
Change-Id: I40f98de2c8e9706cccb5b922215699f2132fa121
Signed-off-by: Allen Webb <allenwebb@google.com>
Reviewed-on: https://chromium-review.googlesource.com/963773
Reviewed-by: Vadim Bendebury <vbendeb@chromium.org>
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This adds some of the ground work for hardware backed brute force
resistance on Cr50. The feature is called Pinweaver. It will
initially be used to enable PIN authentication on CrOS devices
without reducing the security of the platform. A Merkle tree is
used to validate encrypted metadata used to track login attempts.
The metadata tracks counts of failed attempts, a timestamp of the
last failed attempt, the secrets, and any associated parameters.
Instead of storing the metadata on Cr50 an AES-CTR is used with an
HMAC to encrypt the data so it can be stored off-chip and loaded
when needed.
The Merkle tree is used to track the current state of all the
metadata to prevent replay attacks of previously exported copies.
It is a tree of hashes whose root hash is stored on Cr50, and whose
leaves are the HMACs of the encrypted metadata.
BRANCH=none
BUG=chromium:809730, chromium:809741, chromium:809743, chromium:809747
TEST=cd ~/src/platform/ec && V=1 make run-pinweaver -j
Change-Id: Id10bb49d8ebc5a487dd90c6093bc0f51dadbd124
Signed-off-by: Allen Webb <allenwebb@google.com>
Reviewed-on: https://chromium-review.googlesource.com/895395
Reviewed-by: Vadim Bendebury <vbendeb@chromium.org>
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Majority of the chipsets do not have a dedicated GPIO to trigger
AP cold reset. Current code either ignores cold reset or does a warm
reset instead or have a work around to put AP in S5 and then bring
back to S0. In order to avoid the confusion, removed the cold reset
logic and only apreset is used hence forth.
BUG=b:72426192
BRANCH=none
TEST=make buildall -j
Manually tested on GLKRVP, apreset EC command can reset AP.
Change-Id: Ie32d34f2f327ff1b61b32a4d874250dce024cf35
Signed-off-by: Vijay Hiremath <vijay.p.hiremath@intel.com>
Reviewed-on: https://chromium-review.googlesource.com/991052
Commit-Ready: Vijay P Hiremath <vijay.p.hiremath@intel.com>
Tested-by: Vijay P Hiremath <vijay.p.hiremath@intel.com>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-by: Jett Rink <jettrink@chromium.org>
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This patch splits struct fan_t into two parts: base configuration
and RPM configuration. RPMs are expected to be different from
model to model while a base configuration is most likely shared.
BUG=b:73720175
BRANCH=none
TEST=make buildall
Change-Id: Iff17573f110e07e88d097dd848cf91ee98b83176
Signed-off-by: Daisuke Nojiri <dnojiri@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/949382
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
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Nearly every board had a buttons array defined in which its contents had
the standard volume buttons. This commit creates a single common
buttons array that can contain the standard volume buttons and recovery
buttons. If a board has volume up and down buttons, they can simply
define CONFIG_VOLUME_BUTTONS and it will populate the buttons array with
the standard definition. The buttons are active low and have a 30 ms
debounce period. Similiarly, if a board has a dedicated recovery
button, defining CONFIG_DEDICATED_RECOVERY_BUTTON will also populate the
buttons array with a recovery button.
BUG=chromium:783371
BRANCH=None
TEST=make -j buildall.
TEST=Flash a device with CONFIG_VOLUME_BUTTONS, verify pressing volume
buttons still work.
Change-Id: Ie5d63670ca4c6b146ec8ffb64d40ea9ce437b913
Signed-off-by: Aseda Aboagye <aaboagye@google.com>
Reviewed-on: https://chromium-review.googlesource.com/773794
Commit-Ready: Aseda Aboagye <aaboagye@chromium.org>
Tested-by: Aseda Aboagye <aaboagye@chromium.org>
Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org>
Reviewed-by: Shawn N <shawnn@chromium.org>
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suzy-qable advertises 1.5A, but its actual capability depends on the
host USB port it is attached to. Since suzy-qable is ubiquitous and
other DTS sources may behave in the same way, ramp the input current
limit in order to find a reasonable maximum.
BUG=chromium:770296
BRANCH=None
TEST=Attach suzy-qable to kevin and reef, verify that neither OCs and EC
console via cr50 is available on reef. Also verify donette chargers
kevin at 3A and does not ramp.
Change-Id: Idd0683ede3a44111a01da6b4faab52f388ee82fd
Signed-off-by: Shawn Nematbakhsh <shawnn@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/693295
Commit-Ready: Shawn N <shawnn@chromium.org>
Tested-by: Shawn N <shawnn@chromium.org>
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
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Check that added entropy is at least somewhat acceptable.
BRANCH=none
BUG=b:38486828
TEST=make BOARD=hammer -j tests
./util/flash_ec --board=hammer --image=build/hammer/test-entropy.bin
EC console: runtest, get around 4000/1000 (=4) bits of entropy, value
matches (roughly) the value obtained using the awk script.
TEST=make run-entropy
Change-Id: I88d0e9ec0e38ab3ec70d3e8163b8ac1556df978d
Reviewed-on: https://chromium-review.googlesource.com/523482
Commit-Ready: Nicolas Boichat <drinkcat@chromium.org>
Tested-by: Nicolas Boichat <drinkcat@chromium.org>
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
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In Sink mode, on the receipt of a GotoMin message,
reduce the current consumption to some minimum level.
BUG=chrome-os-partner:33688
TEST=Manual testing
Used a Kevin, with test routine, to test GotoMin feature
on another Kevin unit.
Test routine:
if (!strcasecmp(argv[2], "gm")) {
ccprintf("send goto min\n");
send_control(port, PD_CTRL_GOTO_MIN);
send_control(port, PD_CTRL_PS_RDY);
}
Kevin with GotoMin feature:
# ectool usbpdpower 0
Port 0: SNK DRP PD 4277mV / 3000mA, max 5000mV / 3000mA / 15000mW
Port 1: Disconnected
After Test routine is executed:
# ectool usbpdpower 0
Port 0: SNK DRP PD 4906mV / 500mA, max 5000mV / 500mA / 2500mW
Port 1: Disconnected
BRANCH=none
Change-Id: Iaac6e19706ceb10ccaff4d602d63fc086c808c8f
Reviewed-on: https://chromium-review.googlesource.com/425728
Commit-Ready: Sam Hurst <shurst@google.com>
Tested-by: Sam Hurst <shurst@google.com>
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
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Servo_v4 requires the ability to have a different default state per
port. In previous devices, the assumption was that each supported port
had the same default usb pd state and power role. This CL moves the
by the default power role which in turn is derived from
CONFIG_USB_PD_DUAL_ROLE. In addiiton to moving the location, it now
uses 'port' as argument so it can be port specific if required.
PD_DEFAULT_STATE was a board.h specific config, but in practice each
instance used to date was set to PD_STATE_SNK_DISCONNECTED if
CONFIG_USB_PD_DUAL_ROLE was defined and set to
PD_STATE_SRC_DISCONNECTED otherwise.
BUG=chrome-os-partner:61878
BRANCH=servo
TEST=Manual run 'make -j buildall' to verify that all instances of
PD_DEFAULT_STATE were removed.
Change-Id: Iaf40718668732f525485ed7942ee7fc246d3f75d
Signed-off-by: Scott <scollyer@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/431787
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
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When a WAIT is received in response to a request, wait SinkRequestTime
before resending the request.
BUG=chrome-os-partner:34984
TEST=make -j buildall
BRANCH=none
Change-Id: I5c8429c4a7b9cf06609996f924b8d9d535ab6b5f
Reviewed-on: https://chromium-review.googlesource.com/414533
Commit-Ready: Sam Hurst <shurst@google.com>
Tested-by: Sam Hurst <shurst@google.com>
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
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All PIN() assignments in board/$BOARD/gpio.inc must be unique,
since otherwise you're just creating duplicate names and table
entries for the same core interrupt and may not be initializing
things the way you think.
BUG=none
BRANCH=none
TEST=make buildall; test on Cr50 hardware
Also verified that the image size is exactly the same before an
after this CL.
Change-Id: Ifb1805a010905f67fc5c0d246b6252af73715409
Signed-off-by: Bill Richardson <wfrichar@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/383773
Reviewed-by: Randall Spangler <rspangler@chromium.org>
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This feature is inconsistent. Not all boards have such a symlink
(for a obvious reason).
This feature is fragile. It's most likely not tested and going to be
broken if not already. Developers won't like it if they have to test
two different ways to build boards before submitting patches.
This feature is not necessary. If you build EC in the standard way
(e.g. make BOARD=samus), these symlinks are not needed.
This feature is wasteful. Extra disk spaces are used and extra lines
are added to Makefile (increasing code complexity slightly).
BUG=chromium:626776
BRANCH=none
TEST=make buildall
Change-Id: Id5444284d773cb0e9225f39abd877441b8f61440
Signed-off-by: Daisuke Nojiri <dnojiri@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/359321
Reviewed-by: Randall Spangler <rspangler@chromium.org>
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sb_i2c_xfer() assumes 'out' is a valid pointer, which is only true if
out_size is non-zero.
BUG=chrome-os-partner:51207
BRANCH=glados
TEST=`make buildall -j` w/
https://chromium-review.googlesource.com/#/c/342630/
Signed-off-by: Shawn Nematbakhsh <shawnn@chromium.org>
Change-Id: Ia22dcca2b5318b4d69c7afa49f5c8891ab329bd1
Reviewed-on: https://chromium-review.googlesource.com/342635
Commit-Ready: Shawn N <shawnn@chromium.org>
Tested-by: Shawn N <shawnn@chromium.org>
Reviewed-by: Gwendal Grignou <gwendal@google.com>
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With commit e9883124ff16, a GPIO_INT macro was added. That change
also required that all instances of GPIO_INT in a board's
gpio.inc file come before any GPIO macros, or the interrupt
handler wouldn't work properly.
This CL just adds a warning comment about requirement to all
gpio.inc files.
BUG=chromium:471331
BRANCH=none
TEST=make buildall, test image on Cr50
This is a change to comments only. There is no new behavior to
verify, although I did run try out one new image just to be sure
nothing stupid happened.
Change-Id: I83f7819929a53bce3a8bae04d15b3ee3bda11738
Signed-off-by: Bill Richardson <wfrichar@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/329334
Reviewed-by: Vadim Bendebury <vbendeb@chromium.org>
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Change battery and variable sink capabilities for all boards
to account for +/-5% voltage inaccuracy.
BUG=none
BRANCH=none
TEST=test glados with third party variable power supply and make
sure it see's our sink capabilities as 4.75V-21V.
Change-Id: I2481ccbe6c47bfed1a6b8b237329e70bd0f8e4ac
Signed-off-by: Alec Berg <alecaberg@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/308237
Reviewed-by: Todd Broch <tbroch@chromium.org>
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Remove duplicate code for checking request message, but keep
a board specific check of the request message for custom checks
needed on zinger and plankton.
BUG=chrome-os-partner:42490
BRANCH=none
TEST=make -j buildall. run on samus and connect a hoho, make
sure we successfully negotiate a contract.
Change-Id: I7398953a158d340e3e113f5a816b55445a857711
Signed-off-by: Alec Berg <alecaberg@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/305374
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
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Add config option to use the old accelerometer reference frame,
which is used on samus and products using 3.14 or earlier kernel.
This fixes samus so that the lid angle calculation is correct
again.
This also moves the accel_orientation structure out of the board
directory and into common code, since it purely is a function of
the reference frame being used.
BUG=chrome-os-partner:43494
BRANCH=none
TEST=test on samus, verify lid angle calculation is correct once
again. also, enable the motion_lid test and verify that it passes.
Change-Id: I948a74a71964b54c68be66e828a030ddd0418947
Signed-off-by: Alec Berg <alecaberg@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/300510
Tested-by: Aseda Aboagye <aaboagye@chromium.org>
Reviewed-by: Gwendal Grignou <gwendal@chromium.org>
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Instead of mocking i2c_read8/16/32, mock i2c_xfer.
We can now test code that call i2c_xfer directly and
test common/i2c.c
BRANCH=samus, ryu
BUG=chrome-os-partner:45223
TEST=Unit tests pass.
Change-Id: Iaa772515c40cf55d2050d0019e2062d63278adc0
Signed-off-by: Gwendal Grignou <gwendal@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/299768
Reviewed-by: Alec Berg <alecaberg@chromium.org>
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(refer to CL:273620) enable the MKBP event feature to send host event
and wire up the PD specific events.
But, CONFIG_MKBP_EVENT conflicts with CONFIG_KEYBOARD_PROTOCOL_MKBP,
due to the GPIO name of EC interrupt pin. Align the GPIO naming of EC
interrupt pin to EC_INT_L.
BRANCH=none
BUG=chrome-os-partner:44643
TEST=On Oak rev3, plug/unplug USB devices and add kernel trace to see
the PD events happening.
Change-Id: I10de9c6611583bb6165bdc1848e542d4b8bba954
Signed-off-by: Ben Lok <ben.lok@mediatek.com>
Reviewed-on: https://chromium-review.googlesource.com/296012
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
Reviewed-by: Rong Chang <rongchang@chromium.org>
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This unifies all the EC header files to use __CROS_EC_FILENAME_H
as the include guard. Well, except for test/ util/ and extra/
which use __TEST_ __UTIL_ and __EXTRA_ prefixes respectively.
BUG=chromium:496895
BRANCH=none
TEST=make buildall -j
Signed-off-by: Bill Richardson <wfrichar@chromium.org>
Change-Id: Iea71b3a08bdec94a11239de810a2b2e152b15029
Reviewed-on: https://chromium-review.googlesource.com/278121
Reviewed-by: Randall Spangler <rspangler@chromium.org>
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Move the task responsible for detection of USB chargers to common code
to reduce code duplication.
BUG=chrome-os-partner:40920
TEST=Manual on samus_pd. Plug USB charger, verify detection is correct
on both charge ports.
BRANCH=None
Change-Id: I362f8b5b51741509e459c66928131f1f6d2a3b1d
Signed-off-by: Shawn Nematbakhsh <shawnn@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/276210
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
Reviewed-by: Alec Berg <alecaberg@chromium.org>
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