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* it8380dev: fix i2c moduleDino Li2015-10-051-0/+4
| | | | | | | | | | | | | | | | | 1. i2c interrupts are used. Signed-off-by: Dino Li <dino.li@ite.com.tw> BRANCH=none BUG=none TEST=1. console command 'i2cscan' found devices correctly. 2. console command 'i2cxfer' and 'battery' OK. Change-Id: I4d40488d482318128bc8c549f5c8d3c27abe4a04 Reviewed-on: https://chromium-review.googlesource.com/303001 Commit-Ready: Dino Li <dino.li@ite.com.tw> Tested-by: Dino Li <dino.li@ite.com.tw> Reviewed-by: Randall Spangler <rspangler@chromium.org>
* it8380dev: fix hw timer and related function.Dino Li2015-10-011-0/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | [chip config] 1. No hardware specific udelay(). 2. Enable watchdog. [watchdog] 3. Watchdog period is "CONFIG_WATCHDOG_PERIOD_MS" of config.h. 4. Watchdog auxiliary timer period is "CONFIG_AUX_TIMER_PERIOD_MS". [task and irq] 5. Write 1 to clear interrupt pending status, no |. 6. A global variable for store interrupt number of software interrupt. [uart] 7. Always reset UART module before config it. [hwtimer] 8. Use more external timers for HW timer module. [task] 9. Fix task profiling. Signed-off-by: Dino Li <dino.li@ite.com.tw> BRANCH=none BUG=none TEST=[watchdog] 1. console "waitms 1100", only pre-watchdog warning message. 2. console "waitms 1600", warning message and watchdog reset. [hwtimer] 3. console commands "gettime", "timerinfo", and "forcetime". 4. enable hook debug and there is no delayed by more than 10% warning message over 48 hours. 5. There is no watchdog reset too. [task] 6. console 'taskinfo' Task Ready Name Events Time (s) StkUsed 0 R << idle >> 00000000 32.927724 308/512 1 HOOKS 00000000 0.034267 372/768 2 R CONSOLE 00000000 0.116763 468/768 3 HOSTCMD 00000000 0.000641 372/512 4 KEYPROTO 00000000 0.000042 212/512 5 KEYSCAN 00000000 0.000908 356/512 IRQ counts by type: 38 2932 155 1 158 261 160 67 Service calls: 87 Total exceptions: 3348 Task switches: 167 Task switching started: 0.001999 s Time in tasks: 33.282819 s Time in exceptions: 0.164717 s Change-Id: I234085cec231cd855d2a5e639ea1b0966c61d796 Reviewed-on: https://chromium-review.googlesource.com/296939 Commit-Ready: Dino Li <dino.li@ite.com.tw> Tested-by: Dino Li <dino.li@ite.com.tw> Reviewed-by: Randall Spangler <rspangler@chromium.org>
* it8380dev: fix idle task and chip idDino Li2015-09-181-0/+1
| | | | | | | | | | | | | | | | | | | | | 1. Fix system_get_chip_name() and system_get_chip_revision(). 2. Fix EC doze mode. 3. Enable LPC cycle wake-up EC from doze / deep doze function. Signed-off-by: Dino Li <dino.li@ite.com.tw> BRANCH=none BUG=none TEST=1. console "version". Chip: ite it8390 cx 2. EC doze mode is normally. 3. ectool "version" command x 2000. Change-Id: I167dbfb965e557eb86ed83f45a945e4315f5fa9f Reviewed-on: https://chromium-review.googlesource.com/299110 Commit-Ready: Dino Li <dino.li@ite.com.tw> Tested-by: Dino Li <dino.li@ite.com.tw> Reviewed-by: Randall Spangler <rspangler@chromium.org>
* it8380dev: fix ec2i and uartDino Li2015-09-173-1/+41
| | | | | | | | | | | | | | | | | | | 1. Host access to the PNPCFG registers is disabled. 2. UART2 for host if necessary. Signed-off-by: Dino Li <dino.li@ite.com.tw> BRANCH=none BUG=none TEST=1. host can't access the PNPCFG registers. 2. out I/O port 0x2f8 '0x30, 0x31, 0x32, 0x33, and 0x34' will have console message '01234'. Change-Id: If07bdc129105f5248661d929e6858d4063c452ee Reviewed-on: https://chromium-review.googlesource.com/300266 Commit-Ready: Dino Li <dino.li@ite.com.tw> Tested-by: Dino Li <dino.li@ite.com.tw> Reviewed-by: Randall Spangler <rspangler@chromium.org>
* it8380dev: fix PWM moduelDino Li2015-09-162-68/+2
| | | | | | | | | | | | | | | | | | | 1. Fix fan turns on during sysjump if fan is disabled. 2. Remove unused board function. Signed-off-by: Dino Li <dino.li@ite.com.tw> BRANCH=none BUG=none TEST=1-1. Console 'sysjump RW' and fan keeps off. 1-2. Console 'fanset 4000' or 'fanset 0' and 'sysjump', it dose maintain the fan RPM. Change-Id: I531d49c2a8a9fea68af4507339c7be97367c504c Reviewed-on: https://chromium-review.googlesource.com/299650 Commit-Ready: Dino Li <dino.li@ite.com.tw> Tested-by: Dino Li <dino.li@ite.com.tw> Reviewed-by: Randall Spangler <rspangler@chromium.org>
* it8380dev: fix lpc moduleDino Li2015-09-162-0/+12
| | | | | | | | | | | | | | | | | | | | | | | | | 1. add lpc_keyboard_clear_buffer() function. 2. Enable P80L function, that LPC I/O port 80h data can be mapped to BRAM bank1 (offset 0x80 ~ 0xBF). Signed-off-by: Dino Li <dino.li@ite.com.tw> BRANCH=none BUG=none TEST=1. The lpc_keyboard_clear_buffer() function can clear OBF. 2. 80h port, console command port80. 3. 62h/66h port. 3-a. out 66h 80h, out 62h 00h, in 62h 02h 3-b. out 66h 81h, out 62h 01h, out 62h 55h 3-c. out 66h 80h, out 62h 01h, in 62h 55h 3-d. out 66h 80h, out 62h 02h, in 62h aah 4. Host command "version". Change-Id: Id2b5a5813cbe8edfc4ecc7b153874b819d460f43 Reviewed-on: https://chromium-review.googlesource.com/298421 Commit-Ready: Dino Li <dino.li@ite.com.tw> Tested-by: Dino Li <dino.li@ite.com.tw> Reviewed-by: Randall Spangler <rspangler@chromium.org>
* it8380dev: fix flash module and reset cause.Dino Li2015-09-161-0/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | 1. Use flash common code commands for flash erase and write test. 2. Reset cause is "soft" if software reset is triggered by core. 3. Fix EC keeps rebooting after reboot command when write protection is set while WP pin is de-asserted. Signed-off-by: Dino Li <dino.li@ite.com.tw> BRANCH=none BUG=none TEST=1. console commands "flashwrite" and "flasherase" OK. 2. console "reboot", reset cause is soft. 3. console command crash "assert", "divzero", and "stack" show reboot reason as soft. 4. manually test with console commands. flashinfo Physical: 256 KB Usable: 256 KB Write: 4 B (ideal 1024 B) Erase: 1024 B (to 1-bits) Protect: 2048 B Flags: Protected now: ........ ........ ........ ........ ........ ........ ........ ........ ........ ........ ........ ........ ........ ........ ........ ........ > flashwp enable > flashinfo Physical: 256 KB Usable: 256 KB Write: 4 B (ideal 1024 B) Erase: 1024 B (to 1-bits) Protect: 2048 B Flags: wp_gpio_asserted ro_at_boot Protected now: ........ ........ ........ ........ ........ ........ ........ ........ ........ ........ ........ ........ ........ ........ ........ ........ > reboot Rebooting! --- UART initialized after reboot --- [Reset cause: soft] flashinfo Physical: 256 KB Usable: 256 KB Write: 4 B (ideal 1024 B) Erase: 1024 B (to 1-bits) Protect: 2048 B Flags: wp_gpio_asserted ro_at_boot ro_now Protected now: YYYYYYYY YYYYYYYY YYYYYYYY YYYYYYYY YYYYYYYY YYYYYYYY YYYYYYYY YYYYYYYY ........ ........ ........ ........ ........ ........ ........ ........ > flashinfo Physical: 256 KB Usable: 256 KB Write: 4 B (ideal 1024 B) Erase: 1024 B (to 1-bits) Protect: 2048 B Flags: ro_at_boot ro_now Protected now: YYYYYYYY YYYYYYYY YYYYYYYY YYYYYYYY YYYYYYYY YYYYYYYY YYYYYYYY YYYYYYYY ........ ........ ........ ........ ........ ........ ........ ........ > reboot Rebooting! --- UART initialized after reboot --- [Reset cause: soft] flashinfo Physical: 256 KB Usable: 256 KB Write: 4 B (ideal 1024 B) Erase: 1024 B (to 1-bits) Protect: 2048 B Flags: ro_at_boot ro_now INCONSISTENT Protected now: YYYYYYYY YYYYYYYY YYYYYYYY YYYYYYYY YYYYYYYY YYYYYYYY YYYYYYYY YYYYYYYY ........ ........ ........ ........ ........ ........ ........ ........ --- UART initialized after reboot --- [Reset cause: power-on] flashinfo Physical: 256 KB Usable: 256 KB Write: 4 B (ideal 1024 B) Erase: 1024 B (to 1-bits) Protect: 2048 B Flags: ro_at_boot Protected now: ........ ........ ........ ........ ........ ........ ........ ........ ........ ........ ........ ........ ........ ........ ........ ........ Change-Id: Ifad48d190a84326ed3cb4cde497d906b8ab8cd5f Reviewed-on: https://chromium-review.googlesource.com/297933 Commit-Ready: Dino Li <dino.li@ite.com.tw> Tested-by: Dino Li <dino.li@ite.com.tw> Reviewed-by: Randall Spangler <rspangler@chromium.org>
* it8380dev: modify sspi moduleDino Li2015-08-043-4/+9
| | | | | | | | | | | | | | | | | We need to modify SSPI module to fix compile fail due to SPI flash common code changed. Signed-off-by: Dino Li <dino.li@ite.com.tw> BRANCH=none BUG=none TEST=console "spi_flashinfo" OK Change-Id: I83bb645eff1e5874d849056df518eea92340c39e Reviewed-on: https://chromium-review.googlesource.com/290089 Reviewed-by: Randall Spangler <rspangler@chromium.org> Commit-Queue: Dino Li <dino.li@ite.com.tw> Tested-by: Dino Li <dino.li@ite.com.tw>
* it8380dev: add flash module and fix system jumpDino Li2015-07-082-13/+15
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | 1. Add flash control module for emulation board. 2. Fix system jump for Andes core. 3. Change the physical size of the flash on the chip to 256KB. note: 1. Only IT839x series supports flash write protect by registers. 2. Static DMA method of flash code only for IT839x series and IT838x Dx. Signed-off-by: Dino Li <dino.li@ite.com.tw> BRANCH=none BUG=none TEST=1. console command flashwp and flashinfo 1-a. flashwp enable 1-b. WP asserted and reboot 1-c. flashinfo RO protected now 1-d. WP deasserted and reboot 1-e. No protected 1-f. flashwp disable 1-g. WP asserted and reboot 1-h. No protected 2. console sysjump and sysinfo 2-a. sysjump rw 2-b. jumping to image RW 2-c. sysinfo, Copy : RW, Jumped : yes 2-d. sysjump ro 2-e. jumping to image RO 2-f. sysinfo, Copy : RO, Jumped : yes 3. RO/RW firmware image test 3-a. sysjump rw 3-b. use console command "eflash" to erase RO region, erase OK and system still work. 3-c. reflash firmware 3-d. sysjump rw, sysjump ro 3-e. use console command "eflash" to erase RW region, erase OK and system still work. Change-Id: I7666a095e73026a02fb812e5143bc5172ab713e8 Reviewed-on: https://chromium-review.googlesource.com/271390 Reviewed-by: Randall Spangler <rspangler@chromium.org> Commit-Queue: Dino Li <dino.li@ite.com.tw> Tested-by: Dino Li <dino.li@ite.com.tw>
* it8380dev: add i2c control moduleDino Li2015-06-303-9/+45
| | | | | | | | | | | | | | | | | | | | Add i2c control module for emulation board. To rename CONFIG_ to CONFIG_IT83XX_ for IT83XX series configuration. Signed-off-by: Dino Li <dino.li@ite.com.tw> BRANCH=none BUG=none TEST=1. console command "i2cscan" found devices correctly. 2. console command "i2cxfer". 2-a. port2 + battery, i2cxfer r, r16, and rlen OK. 2-b. port1 + slave evb, i2cxfer r, r16, rlen, w, and w16 OK. Change-Id: I67165f7dcdef538ba6dd03b47f1621a73cc68379 Reviewed-on: https://chromium-review.googlesource.com/263678 Reviewed-by: Alec Berg <alecaberg@chromium.org> Commit-Queue: Dino Li <dino.li@ite.com.tw> Tested-by: Dino Li <dino.li@ite.com.tw>
* it8380dev: add fan control moduleDino Li2015-06-253-9/+53
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | 1. pwm, add frequency select function for pwm channels. 2. timer, add external timer 3~8 apis. 3. add fan control module for emulation board. Signed-off-by: Dino Li <dino.li@ite.com.tw> BRANCH=none BUG=none TEST=console command "faninfo, fanset, fanduty, and fanauto" fanset 3333 Setting fan 0 rpm target to 3333 faninfo Actual: 3390 rpm Target: 3333 rpm Duty: 35% Status: 1 (changing) Mode: rpm Auto: no Enable: yes faninfo Actual: 3301 rpm Target: 3333 rpm Duty: 34% Status: 2 (locked) Mode: rpm Auto: no Enable: yes fanduty 80 Setting fan 0 duty cycle to 80% faninfo Actual: 5952 rpm Target: 3333 rpm Duty: 80% Status: 2 (locked) Mode: duty Auto: no Enable: yes faninfo Actual: 5971 rpm Target: 3333 rpm Duty: 80% Status: 2 (locked) Mode: duty Auto: no Enable: yes fanauto faninfo Actual: 3330 rpm Target: 3333 rpm Duty: 36% Status: 2 (locked) Mode: rpm Auto: yes Enable: yes fanset 8000 Setting fan 0 rpm target to 8000 faninfo Actual: 6793 rpm Target: 8000 rpm Duty: 100% Status: 3 (frustrated) Mode: rpm Auto: no Enable: yes fanset 3456 Setting fan 0 rpm target to 3456 faninfo Actual: 5053 rpm Target: 3456 rpm Duty: 56% Status: 1 (changing) Mode: rpm Auto: no Enable: yes faninfo Actual: 3440 rpm Target: 3456 rpm Duty: 34% Status: 2 (locked) Mode: rpm Auto: no Enable: yes /* force stop the fan */ [87.035136 Fan 0 stalled!] [87.035520 event set 0x00000400] [88.035712 Fan 0 stalled!] [89.036288 Fan 0 stalled!] [90.036864 Fan 0 stalled!] [91.037440 Fan 0 stalled!] [92.038016 Fan 0 stalled!] [93.038592 Fan 0 stalled!] [94.039168 Fan 0 stalled!] /* release */ faninfo Actual: 3427 rpm Target: 3456 rpm Duty: 35% Status: 2 (locked) Mode: rpm Auto: no Enable: yes Change-Id: Icbe1917902d033a8be42b8d834ffc6045d08b985 Reviewed-on: https://chromium-review.googlesource.com/266625 Reviewed-by: Randall Spangler <rspangler@chromium.org> Commit-Queue: Dino Li <dino.li@ite.com.tw> Tested-by: Dino Li <dino.li@ite.com.tw>
* it8380dev: add peci control modulestabilize-7204.BDino Li2015-06-241-0/+3
| | | | | | | | | | | | | | | | | | | Add peci control module for emulation board. Signed-off-by: Dino Li <dino.li@ite.com.tw> BRANCH=none BUG=none TEST=1. console command "pecitemp" get CPU temperature normally. 2. console command "peci" manual test peci commands. (GetDIB, GetTemp, RdPkgConfig, and WrPkgConfig) Change-Id: I48b63a391adf04f159adca401acb369a6acc3799 Reviewed-on: https://chromium-review.googlesource.com/265171 Reviewed-by: Alec Berg <alecaberg@chromium.org> Reviewed-by: Randall Spangler <rspangler@chromium.org> Commit-Queue: Dino Li <dino.li@ite.com.tw> Tested-by: Dino Li <dino.li@ite.com.tw>
* it8380dev: add sspi control moduleDino Li2015-06-233-2/+8
| | | | | | | | | | | | | | | | | | | | | | | | Add sspi control module for emulation board. Signed-off-by: Dino Li <dino.li@ite.com.tw> BRANCH=none BUG=none TEST=EVB + Winbond W25Q80 SPI ROM To define CONFIG_SPI_FLASH, CONFIG_SPI_FLASH_SIZE, and CONFIG_SPI_FLASH_W25X40 console "spi_flashinfo" can get SPI information > spi_flashinfo Manufacturer ID: ef Device ID: 40 14 Unique ID: c8 60 84 a1 1f 6a 7f 2f Capacity: 1024 MB Change-Id: I6c4d4d977536484d47a2207ed80dd0ea08a7c8fd Reviewed-on: https://chromium-review.googlesource.com/267403 Reviewed-by: Alec Berg <alecaberg@chromium.org> Commit-Queue: Dino Li <dino.li@ite.com.tw> Tested-by: Dino Li <dino.li@ite.com.tw>
* cleanup: fix all the header guardsBill Richardson2015-06-181-3/+3
| | | | | | | | | | | | | | | This unifies all the EC header files to use __CROS_EC_FILENAME_H as the include guard. Well, except for test/ util/ and extra/ which use __TEST_ __UTIL_ and __EXTRA_ prefixes respectively. BUG=chromium:496895 BRANCH=none TEST=make buildall -j Signed-off-by: Bill Richardson <wfrichar@chromium.org> Change-Id: Iea71b3a08bdec94a11239de810a2b2e152b15029 Reviewed-on: https://chromium-review.googlesource.com/278121 Reviewed-by: Randall Spangler <rspangler@chromium.org>
* it8380dev: add pmc control moduleDino Li2015-06-173-2/+54
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add pmc(LPC ACPI) control module for emulation board. Signed-off-by: Dino Li <dino.li@ite.com.tw> BRANCH=none BUG=none TEST=1. 62h/66h port. 1-a. out 66h 80h, out 62h 00h, in 62h 02h 1-b. out 66h 81h, out 62h 01h, out 62h 55h 1-c. out 66h 80h, out 62h 01h, in 62h 55h 1-d. out 66h 80h, out 62h 02h, in 62h aah 2. H2RAM LPC I/O cycle 900h ~ 9FFh = DLM 0x8D900 ~ 0x8D9FF and host read only. 3. 80h port, console command port80. 4. host command. 4-a. host request (LPC I/O 800h ~ 807h) 03 FD 00 00, 00 00 00 00 out 204h DAh, in 200h 00h host response (LPC I/O 800h ~ 80Bh) 03 F7 00 00, 04 00 00 00, 02 00 00 00 4-b. host request 03 EE 01 00, 00 00 04 00, 01 02 03 04 out 204h DAh, in 200h 00h host response 03 E5 00 00, 04 00 00 00, 05 05 05 05 Change-Id: I5c3bac66306dfba380548a74a64536ea606ddd3e Reviewed-on: https://chromium-review.googlesource.com/269271 Reviewed-by: Vincent Palatin <vpalatin@chromium.org> Tested-by: Dino Li <dino.li@ite.com.tw> Commit-Queue: Dino Li <dino.li@ite.com.tw>
* mec1322: Simplify GPIO listsSteven Jian2015-05-271-26/+26
| | | | | | | | | | | | | | | Our existing GPIO macros use port# / gpio#, but the concept of different GPIO ports does not exist on the mec1322. Therefore, add new GPIO macros for chips which do not have distinct GPIO ports. BUG=None BRANCH=None TEST=make buildall -j Change-Id: Ibda97c6563ad447d16dab39ecadab43ccb25174b Signed-off-by: Steven Jian <steven.jian@intel.com> Reviewed-on: https://chromium-review.googlesource.com/262841 Reviewed-by: Anton Staaf <robotboy@chromium.org>
* gpio: Refactor IRQ handler pointer out of gpio_listAseda Aboagye2015-04-101-25/+26
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | In the gpio_info struct, we had a irq_handler pointer defined even though a majority of the GPIOs did not have irq handlers associated. By removing the irq_handler pointer out of the struct, we can save some space with some targets saving more than others. (For example, ~260 bytes for samus_pd). This change also brings about a new define: GPIO_INT(name, port, pin, flags, signal) And the existing GPIO macro has had the signal parameter removed since they were just NULL. GPIO(name, port, pin, flags) In each of the gpio.inc files, all the GPIOs with irq handlers must be defined at the top of the file. This is because their enum values from gpio_signal are used as the index to the gpio_irq_handlers table. BUG=chromium:471331 BRANCH=none TEST=Flashed ec to samus and samus_pd, verified lightbar tap, lid, power button, keyboard, charging, all still working. TEST=Moved a GPIO_INT declaration after a GPIO declaration and watched the build fail. TEST=make -j BOARD=peppy tests TEST=make -j BOARD=auron tests TEST=make -j BOARD=link tests Change-Id: Id6e261b0a3cd63223ca92f2e96a80c95e85cdefb Signed-off-by: Aseda Aboagye <aaboagye@google.com> Reviewed-on: https://chromium-review.googlesource.com/263973 Reviewed-by: Randall Spangler <rspangler@chromium.org> Tested-by: Aseda Aboagye <aaboagye@chromium.org> Commit-Queue: Aseda Aboagye <aaboagye@chromium.org> Trybot-Ready: Aseda Aboagye <aaboagye@chromium.org> Reviewed-by: Alec Berg <alecaberg@chromium.org>
* it8380dev: Move interrupt enabled gpios to topAseda Aboagye2015-04-081-2/+2
| | | | | | | | | | | | | | | | | All GPIOs with interrupt handlers sholud be together at the top of the gpio.inc file. BUG=none BRANCH=none TEST=make -j buildall Change-Id: Id5847e4ea00e0187453af6a479e10defe08dc0a9 Signed-off-by: Aseda Aboagye <aaboagye@google.com> Reviewed-on: https://chromium-review.googlesource.com/264499 Reviewed-by: Alec Berg <alecaberg@chromium.org> Commit-Queue: Aseda Aboagye <aaboagye@chromium.org> Trybot-Ready: Aseda Aboagye <aaboagye@chromium.org> Tested-by: Aseda Aboagye <aaboagye@chromium.org>
* it8380dev: add KBC/KMSC moduleDino Li2015-03-224-28/+61
| | | | | | | | | | | | | | | | | 1. DLM 16KB. 2. Add KBC/KMSC module for emulation board. Signed-off-by: Dino Li <dino.li@ite.com.tw> BRANCH=none BUG=none TEST=EVB + x86 MB can boot into DOS and keyboard works. Change-Id: Ia5cc2d4f1733ce07879d410b0447b2d48e50cd95 Reviewed-on: https://chromium-review.googlesource.com/259923 Reviewed-by: Vincent Palatin <vpalatin@chromium.org> Tested-by: Dino Li <dino.li@ite.com.tw> Commit-Queue: Dino Li <dino.li@ite.com.tw>
* it8380dev: add ec2i control moduleDino Li2014-12-232-0/+41
| | | | | | | | | | | | | | | | | | | Add EC2I control module for emulation board. The EC2I bridge enables the EC to access the host controlled module registers (e.g., host configuration module(PNPCFG) and SWUC) Signed-off-by: Dino Li <dino.li@ite.com.tw> BRANCH=none BUG=none TEST=EC2I read: Read a logical device page, the results are correctly. EC2I write: Initialize PNPCFG success. Change-Id: I900450d4a8c49182c438b69b5e738c12dc437fe4 Reviewed-on: https://chromium-review.googlesource.com/230410 Reviewed-by: Vincent Palatin <vpalatin@chromium.org> Commit-Queue: Dino Li <dino.li@ite.com.tw> Tested-by: Dino Li <dino.li@ite.com.tw>
* it8380dev: add adc control moduleDino Li2014-12-192-0/+30
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add adc control module for emulation board. The ADC converts the input voltage signal ranging from 0v to 3v into a 10-bit unsigned integer. Signed-off-by: Dino Li <dino.li@ite.com.tw> BRANCH=none BUG=none TEST=manual test. 1 - adc channel 1, 3, 5, and 7 to ground. 2 - adc channel 0 and 2 to 1.26v. 3 - adc channel 4 and 6 to 1.72v. 4 - condition, factor_mul = 3000, factor_div = 1024, and shift = 0. 5 - console "adc", result as following. adc_ch0 = 1256 adc_ch1 = 0 adc_ch2 = 1256 adc_ch3 = 0 adc_ch4 = 1722 adc_ch5 = 0 adc_ch6 = 1725 adc_ch7 = 0 Change-Id: I72efd09c9f7dbff25c4f6fd4846c9b1c1e5637ca Reviewed-on: https://chromium-review.googlesource.com/228092 Reviewed-by: Vincent Palatin <vpalatin@chromium.org> Commit-Queue: Dino Li <dino.li@ite.com.tw> Tested-by: Dino Li <dino.li@ite.com.tw>
* it8380dev: add pwm control moduleDino Li2014-10-293-21/+51
| | | | | | | | | | | | | | | | Add pwm control module for emulation board. Signed-off-by: Dino Li <dino.li@ite.com.tw> BRANCH=none BUG=none TEST=console manual test, pwm channels output correctly. Change-Id: I6eb1a9e4fdcb9279e9d0cbd67f7a92afed21c889 Reviewed-on: https://chromium-review.googlesource.com/223921 Reviewed-by: Vincent Palatin <vpalatin@chromium.org> Commit-Queue: Dino Li <dino.li@ite.com.tw> Tested-by: Dino Li <dino.li@ite.com.tw>
* Makefile: Add support for per-board symlinks to top levelAnton Staaf2014-07-301-0/+1
| | | | | | | | | | | | | | | | | | | | | | | Previously if you were working on a single board you had to add BOARD= to all of your make command lines. Now if you are in a board directory you can just use "make", or "make clean", or any other top level make command. This commit also adds support for a top level "make flash" command that can be used from the board directories as well. This command uses openocd and requires that the board provides an openocd-flash.cfg file. Signed-off-by: Anton Staaf <robotboy@chromium.org> BRANCH=none TEST=(from a few board directories) make clean; make -j (from the discovery-stm32f072 directory) make flash Change-Id: Ie09a74881371169a2c3cd9cd9922f39f4873f1a6 Reviewed-on: https://chromium-review.googlesource.com/209669 Tested-by: Anton Staaf <robotboy@chromium.org> Reviewed-by: Bill Richardson <wfrichar@chromium.org> Commit-Queue: Anton Staaf <robotboy@chromium.org>
* GPIO: Move definition of alternate functions to gpio.incAnton Staaf2014-07-172-6/+2
| | | | | | | | | | | | | | | | | | | | | This is a straightforward conversion of existing tables into X-Macro style definitions for the GPIO alternate functions. This change in itself, is not particularly powerful, but having all GPIO settings in a single file makes a board easier to understand. Signed-off-by: Anton Staaf <robotboy@chromium.org> BRANCH=none TEST=make buildall -j Followed by manual testing of interrupt on change and UART functionality on STM32F0 based discovery board. Change-Id: Ib7f1f014f4bd289d7c0ac3100470ba2dc71ca579 Reviewed-on: https://chromium-review.googlesource.com/207987 Reviewed-by: Randall Spangler <rspangler@chromium.org> Tested-by: Anton Staaf <robotboy@chromium.org> Commit-Queue: Anton Staaf <robotboy@chromium.org>
* gpio: Replace duplication in gpio declarations with X-macro fileAnton Staaf2014-06-263-57/+34
| | | | | | | | | | | | | | | | | | | | | Previously each board.h and board.c contained an enum and an array for gpio definitons that had to be manually kept in sync, with no compiler assistance other than that their lengths matched. This change adds a single gpio.inc file that declares all gpio's that a board uses and is used as an X-macro include file to generate both the gpio_signal enum and the gpio_list array. Signed-off-by: Anton Staaf <robotboy@chromium.org> BRANCH=none TEST=make buildall -j Change-Id: If9c9feca968619a59ff9f20701359bcb9374e4da Reviewed-on: https://chromium-review.googlesource.com/205354 Tested-by: Anton Staaf <robotboy@chromium.org> Reviewed-by: Vincent Palatin <vpalatin@chromium.org> Commit-Queue: Anton Staaf <robotboy@chromium.org>
* ite: Add initial support for ITE IT8380 chipVincent Palatin2014-01-084-0/+185
Initial support for the ITE IT8380 chip with the following peripherals : - 8250-like UART module. - HW timer (with a 128-us tick period). - GPIO with pins initialization and edge interrupt support. other functions are stubbed. - Clock : basic fixed frequency setup only. It also add the dev board configuration as a test vehicle. Signed-off-by: Alec Berg <alecaberg@chromium.org> Signed-off-by: Vincent Palatin <vpalatin@chromium.org> BRANCH=none BUG=chrome-os-partner:23575 TEST=make BOARD=it8380dev on IT8380 dev board, use the EC serial console, use gettime from console. Change-Id: Id4bf37d1beb21d1a4bee404c9a0bc500025fe787 Reviewed-on: https://chromium-review.googlesource.com/175481 Reviewed-by: Vincent Palatin <vpalatin@chromium.org> Commit-Queue: Alec Berg <alecaberg@chromium.org> Tested-by: Alec Berg <alecaberg@chromium.org>
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