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* COIL: Rename MODULE_SPI_MASTER to MODULE_SPI_CONTROLLERCaveh Jalali2021-06-031-4/+4
| | | | | | | | | | | | | | | | This renames the MODULE_SPI_MASTER to MODULE_SPI_CONTROLLER. BRANCH=none BUG=b:181607131 TEST=make buildall passes; "compare_build.sh -b all" shows no difference Change-Id: I4d33f57fd82c5b57f111c12387113dc82cebe60b Signed-off-by: Caveh Jalali <caveh@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2932466 Reviewed-by: Craig Hesling <hesling@chromium.org> Reviewed-by: Harry Cutts <hcutts@chromium.org> Commit-Queue: Craig Hesling <hesling@chromium.org>
* it83xx/adc: enabled GPIO alternate mode by default for pin into gpio.inc ↵tim2020-04-291-0/+2
| | | | | | | | | | | | | | | | | | | | marked as MODULE_ADC In the ADC initialization function, we should use the function of gpio_config_module to set alternate function and declare corresponding alternate function pins in gpio.inc. So we are able to enable extra flag if needed. BUG=none BRANCH=none TEST=testing the alternate function pins are normal on the board of it83xx_evb, it8xxx2_evb, it8xxx2_pdevb and reef_it8320. Signed-off-by: tim <tim2.lin@ite.corp-partner.google.com> Change-Id: I734b6ecc8f9343be65d9f29837e793b9574f8bdc Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2160241 Reviewed-by: Jett Rink <jettrink@chromium.org>
* baseboard/ite_evb: create ite_evb baseboardRuibin Chang2020-03-121-14/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The development board of it83xx and it8xxx2 have common code and config options which are moved to baseboard ite_evb. And we create another board for PD EVB based on baseboard ite_evb. BUG=none BRANCH=none TEST=on baseboard ite_evb: 1.test board it83xx_evb and it8xxx2_evb: successfully Flash EC image and boot on chip it8320 and it83202. 2.flashrom by ite_spi test: $ sudo ./util/flash_ec --board=it8xxx2_evb --verbose INFO: Using servo_v2. INFO: Using ec image : /mnt/host/source/src/platform/ec/build/ it8xxx2_evb/ec.bin dut-control --port=9999 i2c_mux_en:on dut-control --port=9999 i2c_mux:remote_adc INFO: Flashing chip ite_spi. dut-control --port=9999 cold_reset:on dut-control --port=9999 fw_up:on dut-control --port=9999 cold_reset:off dut-control --port=9999 fw_up:off dut-control --port=9999 spi1_vref:pp1800 spi1_buf_en:on dut-control --port=9999 spi1_buf_on_flex_en:on INFO: Running flashrom: sudo /usr/sbin/flashrom -p ft2232_spi:type=servo-v2,port=B, serial=911416-00012 --flash-size flashrom v0.9.9 : : on Linux 4.15.0-76-generic (x86_64) flashrom v0.9.9 : : on Linux 4.15.0-76-generic (x86_64) INFO: Programming EC firmware image. INFO: Running flashrom: /usr/sbin/flashrom -p ft2232_spi:type=servo-v2,port=B, serial=911416-00012 -w /tmp/flash_spi_6163 flashrom v0.9.9 : : on Linux 4.15.0-76-generic (x86_64) flashrom v0.9.9 : : on Linux 4.15.0-76-generic (x86_64) Calibrating delay loop... OK. Erasing and writing flash chip... Verifying flash... VERIFIED. SUCCESS INFO: Flashing done. INFO: Restoring servo settings... dut-control --port=9999 cold_reset:off dut-control --port=9999 i2c_mux_en:on dut-control --port=9999 i2c_mux:remote_adc dut-control --port=9999 spi1_vref:off dut-control --port=9999 spi1_buf_en:off dut-control --port=9999 spi1_buf_on_flex_en:off dut-control --port=9999 cold_reset:on dut-control --port=9999 cold_reset:off 3.test board it8xxx2_pdevb: successfully Flash EC image and boot on chip it83202. Connection with adapter and dongle are able to ready state. Change-Id: Ib6371b61c27980eb9977548177efb8c896e72d47 Signed-off-by: Ruibin Chang <ruibin.chang@ite.com.tw> Signed-off-by: tim <tim2.lin@ite.corp-partner.google.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2071551 Reviewed-by: Jett Rink <jettrink@chromium.org>
* it83xx/dac: add DAC moduletim2020-02-211-0/+1
| | | | | | | | | | | | | | | | | | The DAC module has four channels. We can set output voltage when DAC channel is enabled by this driver. BUG=b:149094279 BRANCH=none TEST=The console command #dac set as follows: read: dac [ch] write: dac [ch] [voltage] [ch]:2-5, [voltage]:0(disable)-3300 Change-Id: I8e815cb5bc749467581d5f771fd6f9e0995fca3b Signed-off-by: tim <tim2.lin@ite.corp-partner.google.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2046685 Reviewed-by: Diana Z <dzigterman@chromium.org>
* it83xx/spi_master: correct the module IDtim2019-11-221-4/+4
| | | | | | | | | | | | | | The module ID in alternate function setting for spi master should be corrected as MODULE_SPI_MASTER. BUG=none BRANCH=none TEST=make buildall -j Change-Id: Ib52b09a5f1e0c496374d4ed2f3a222dab9af2eb0 Signed-off-by: tim <tim2.lin@ite.corp-partner.google.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1868133 Reviewed-by: Jett Rink <jettrink@chromium.org>
* PCH_PLTRST_L: Use appropriate config optionAbe Levkoy2019-10-301-1/+1
| | | | | | | | | | | | | | | | | Define a GPIO for PCH_PLTRST_L based on CONFIG_HOSTCMD_ESPI, because that is the configuration option used to enable to use of the the GPIO signal name thus defined. Remove the now unused CONFIG_HOSTCMD_PLTRST_IS_VWIRE option. BUG=b:139553375,b:143288478 TEST=Build it83xx_evb, reef_it8320, and tglrvpu_ite BRANCH=none Change-Id: Ia0dbfee0c6c2eda566e79cad7ab6e0c685809c05 Signed-off-by: Abe Levkoy <alevkoy@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1881756 Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org> Reviewed-by: Keith Short <keithshort@chromium.org>
* LICENSE: remove unnecessary (c) after CopyrightTom Hughes2019-06-191-1/+1
| | | | | | | | | | | | | | | | Ran the following command: git grep -l 'Copyright (c)' | \ xargs sed -i 's/Copyright (c)/Copyright/g' BRANCH=none BUG=none TEST=make buildall -j Change-Id: I6cc4a0f7e8b30d5b5f97d53c031c299f3e164ca7 Signed-off-by: Tom Hughes <tomhughes@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1663262 Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org> Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
* espi: Rename CONFIG_HOSTCMD_ESPI_VW_SIGNALS to ↵Furquan Shaikh2018-07-271-1/+1
| | | | | | | | | | | | | | | | | | | | | CONFIG_HOSTCMD_ESPI_VW_SLP_SIGNALS This change renames CONFIG_HOSTCMD_ESPI_VW_SIGNALS to CONFIG_HOSTCMD_ESPI_VW_SIGNALS in order to make it clear that this config option indicates that chipset sleep signals (SLP_S3 and SLP_S4) are tranmitted over virtual wires instead of physical lines with eSPI. BUG=b:111859300 BRANCH=None TEST=make -j buildall Change-Id: Iab4423abc9102164d4f43296a279c24355445341 Signed-off-by: Furquan Shaikh <furquan@google.com> Reviewed-on: https://chromium-review.googlesource.com/1151048 Commit-Ready: Furquan Shaikh <furquan@chromium.org> Tested-by: Furquan Shaikh <furquan@chromium.org> Reviewed-by: Aaron Durbin <adurbin@chromium.org> Reviewed-by: Jett Rink <jettrink@chromium.org>
* espi: rename remaining eSPI optionsJett Rink2018-05-231-1/+1
| | | | | | | | | | | | | Change prefix from CONFIG_ESPI to CONFIG_HOSTCMD_ESPI for consistency. BRANCH=none BUG=chromium:818804 TEST=Full stack builds and works on yorp (espi) and grunt (lpc) Change-Id: I8b6e7eea515d14a0ba9030647cec738d95aea587 Signed-off-by: Jett Rink <jettrink@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/1067513 Reviewed-by: Randall Spangler <rspangler@chromium.org>
* Code cleanup: Rename GPIO PCH_RCIN_L to SYS_RESET_LVijay Hiremath2018-03-241-1/+1
| | | | | | | | | | | | | | | | | Renamed GPIO PCH_RCIN_L to SYS_RESET_L so that all the Intel chipset variants have same GPIO name for doing SOC internal reset. BUG=b:72426192 BRANCH=none TEST=make buildall -j Change-Id: I931ce136743fa928dd7cf6f005c912db3b2da893 Signed-off-by: Vijay Hiremath <vijay.p.hiremath@intel.com> Reviewed-on: https://chromium-review.googlesource.com/974241 Commit-Ready: Vijay P Hiremath <vijay.p.hiremath@intel.com> Tested-by: Vijay P Hiremath <vijay.p.hiremath@intel.com> Reviewed-by: Jett Rink <jettrink@chromium.org> Reviewed-by: Furquan Shaikh <furquan@chromium.org>
* it83xx: add espi moduleDino Li2017-11-141-0/+2
| | | | | | | | | | | | | | | | | | Add espi control module for it83xx. Signed-off-by: Dino Li <dino.li@ite.com.tw> BRANCH=none BUG=none TEST=1. it8390+Intel SKL-Y RVP3 and boot to shell. 2. console command "kbpress 1 4" to test keyboard data. (board code for espi module test on CL:392587) Change-Id: I1b32bd16f7e01abf07b9c9a68ebef2399cc9828d Reviewed-on: https://chromium-review.googlesource.com/394471 Commit-Ready: Dino Li <Dino.Li@ite.com.tw> Tested-by: Dino Li <Dino.Li@ite.com.tw> Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
* board: it83xx_evb: support PD EVBDino Li2016-05-181-7/+14
| | | | | | | | | | | | | | | | | The change is made to combine EC & PD's board code. Signed-off-by: Dino Li <dino.li@ite.com.tw> BRANCH=none BUG=none TEST=We can verify PD module on PD EVB and run this board code on EC EVB as well. Change-Id: I92f6ad41643b0536fd78d24026374265cfcf37ea Reviewed-on: https://chromium-review.googlesource.com/342489 Commit-Ready: Dino Li <dino0303@gmail.com> Tested-by: Dino Li <dino0303@gmail.com> Reviewed-by: Shawn N <shawnn@chromium.org>
* board: rename it8380dev to it83xx_evbDino Li2016-05-031-0/+78
Unified board name for IT83-series. Signed-off-by: Dino Li <dino.li@ite.com.tw> BRANCH=none BUG=none TEST="make BOARD=it83xx_evb -j" and "make buildall -j" Change-Id: Ic96d0132fb31fcc8715d0dd810f8bd340035a640 Reviewed-on: https://chromium-review.googlesource.com/341843 Commit-Ready: Dino Li <dino.li@ite.com.tw> Tested-by: Dino Li <dino.li@ite.com.tw> Reviewed-by: Shawn N <shawnn@chromium.org>
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