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* gpio: cleanup header usage for i2cKeith Short2022-02-251-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | i2c.h only requires the enum gpio_signal, so use gpio_signal.h instead of gpio.h. The builld doesn't compare due to an ASSERT() calls in i2c-stm32f4.c because the line numbers changed. Before this change: 80068b2: f240 2332 movw r3, #562 80068b6: 48a4 ldr r0, [pc, #656] 80068b8: f7fc fb1a bl 8002ef0 <panic_assert_fail> After this change: 80068b2: f44f 730d mov.w r3, #564 80068b6: 48a4 ldr r0, [pc, #656] 80068b8: f7fc fb1a bl 8002ef0 <panic_assert_fail> BUG=b:218856245 BRANCH=none TEST=compare_build.sh Signed-off-by: Keith Short <keithshort@chromium.org> Change-Id: I0f9f428d5c575c444b9df69f71a0ed6c4b3e378c Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3489094 Reviewed-by: Fabio Baltieri <fabiobaltieri@google.com>
* config: rename CONFIG_HOSTCMD_LPC to CONFIG_HOST_INTERFACE_LPCKeith Short2021-11-191-1/+1
| | | | | | | | | | | | | | | | Rename CONFIG_HOSTCMD_LPC to CONFIG_HOST_INTERFACE_LPC. This makes the host interface selection configs distinct from configs used to enable/disable specific host commands. BUG=b:195416058 BRANCH=main TEST=compare_build.sh Signed-off-by: Keith Short <keithshort@chromium.org> Change-Id: I6d8722cd314aa7801ea11c1ead5ef6bdd113fd58 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3095841 Tested-by: Michał Barnaś <mb@semihalf.com> Reviewed-by: Jack Rosenthal <jrosenth@chromium.org>
* keyboard: Use __override for keyboard_scan_configDaisuke Nojiri2021-07-231-1/+0
| | | | | | | | | | | | | | | | | Currently keyboard_scan_config is defined by each board using CONFIG_KEYBOARD_BOARD_CONFIG. This patch makes it defined as __override hence removes CONFIG_KEYBOARD_BOARD_CONFIG. BUG=None BRANCH=None TEST=buildall Change-Id: I53a356741ba4d00e829ca59b74ee6dc704188728 Signed-off-by: Daisuke Nojiri <dnojiri@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3044403 Tested-by: Gwendal Grignou <gwendal@chromium.org> Commit-Queue: Gwendal Grignou <gwendal@chromium.org> Reviewed-by: Gwendal Grignou <gwendal@chromium.org>
* COIL: Rename CONFIG_SPI_MASTER to CONFIG_SPI_CONTROLLERCaveh Jalali2021-06-031-1/+1
| | | | | | | | | | | | | | | | This replaces the CONFIG_SPI_MASTERR config option with CONFIG_SPI_CONTROLLER. BRANCH=none BUG=b:181607131 TEST=make buildall passes; "compare_build.sh -b all" shows no difference Change-Id: I3c921085179294765baadf7074652978fe04a4ed Signed-off-by: Caveh Jalali <caveh@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2932465 Reviewed-by: Craig Hesling <hesling@chromium.org> Commit-Queue: Craig Hesling <hesling@chromium.org>
* genvif: Use VIF overrides by defaultAbe Levkoy2021-03-301-0/+3
| | | | | | | | | | | | | | Use board-specific override files when generating VIFs for boards. BUG=b:172276715 TEST=make buildall BRANCH=none Signed-off-by: Abe Levkoy <alevkoy@chromium.org> Change-Id: I197365018ceb8197c22d631cebf4cbce1c0119f7 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2785506 Reviewed-by: Denis Brockus <dbrockus@chromium.org> Commit-Queue: Denis Brockus <dbrockus@chromium.org>
* cleanup: rename ite tcpm driverRuibin Chang2021-02-261-2/+2
| | | | | | | | | | | | | | | | Rename it83xx_tcpm_drv to it8xxx2_tcpm_drv for chip it8xxx2 series. BUG=none BRANCH=none TEST=1.make buildall -j 2.on hayato, connecting to adapter and dongle can go to ready state. Signed-off-by: Ruibin Chang <ruibin.chang@ite.com.tw> Change-Id: I2622e7fe0884d3ae20a63ec48219de00d5537bc6 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2717430 Tested-by: Ruibin Chang <Ruibin.Chang@ite.com.tw> Reviewed-by: Eric Yilun Lin <yllin@chromium.org> Commit-Queue: Ruibin Chang <Ruibin.Chang@ite.com.tw>
* config: Provide default VCONN Swap delayAbe Levkoy2021-01-221-1/+0
| | | | | | | | | | | | | | | | | Almost every relevant board copy-pastes 5000 us. Make that the default and get rid of the redundant definitions. This is the approximate result of this command: find . -type f -name *.h | xargs sed -i -E \ '/#define CONFIG_USBC_VCONN_SWAP_DELAY_US[[:space:]]+5000[[:space:]]/d' BUG=b:144165680 TEST=make buildall BRANCH=none Change-Id: Ife86f9752971abcd7ab5ad5a5e607eb2ccbde2ba Signed-off-by: Abe Levkoy <alevkoy@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2628132 Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
* config: Make VCONN Swap delay a documented optionAbe Levkoy2021-01-221-1/+1
| | | | | | | | | | | | | | | | | | | | | Replace PD_VCONN_SWAP_DELAY with CONFIG_USBC_VCONN_SWAP_DELAY_US. This is the approximate result of the following command, run from platform/ec: find . -type f -\( -name '*.c' -o -name '*.h' -\) | \ xargs sed -iE 's/PD_VCONN_SWAP_DELAY/CONFIG_USBC_VCONN_SWAP_DELAY/g' Fix some latent formatting errors in usb_pd_protocol.c, because they were preventing pre-upload hooks from passing. BUG=b:144165680 TEST=make buildall BRANCH=none Signed-off-by: Abe Levkoy <alevkoy@chromium.org> Change-Id: Icaf3b309c08fdcd162e960cf5dc88185016b5d2d Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2628131 Reviewed-by: Aseda Aboagye <aaboagye@chromium.org> Commit-Queue: Aseda Aboagye <aaboagye@chromium.org>
* TCPMv2: Update source-out configsDiana Z2020-12-241-0/+1
| | | | | | | | | | | | | | | | | | | | Now that the DPM will be handling source-out decisions for TCPMv2, remove references to its old configuration options from TCPMv2 boards in order to avoid any confusion as to what code is running now. Also remove the charge manager notifications of sink attach/detach since the policy is being centralized into the DPM. Note that the previous configuration options only ever allocated one 3.0 A port, and so the default number of 3.0 A ports has been set to 1. BRANCH=None BUG=b:168862110,b:141690755 TEST=make -j buildall Signed-off-by: Diana Z <dzigterman@chromium.org> Change-Id: Ie452e3da32b04226503539daa67b6b9f4a58aa58 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2597431 Reviewed-by: Keith Short <keithshort@chromium.org>
* it81202_pdevb, it81202_evb: change chip variant to it81202Ruibin Chang2020-08-244-14/+6
| | | | | | | | | | | | | | | | Change chip variant to mass product it81202, and it's more convenient to develop on these boards. BUG=none BRANCH=none TEST=can flash and boot on board it81202_pdevb and it81202_evb Signed-off-by: Ruibin Chang <ruibin.chang@ite.com.tw> Change-Id: Id9e32b38ae392c13799f1403da60e56327d67e23 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2359616 Commit-Queue: Ruibin Chang <Ruibin.Chang@ite.com.tw> Tested-by: Ruibin Chang <Ruibin.Chang@ite.com.tw> Reviewed-by: Jett Rink <jettrink@chromium.org>
* Clean up: set embedded flash clock 48MHz as defaultRuibin Chang2020-08-171-3/+0
| | | | | | | | | | | | | | | | For chip it8xxx2 series and it8320dx, we set embedded flash clock 48MHz as default. BUG=none BRANCH=none TEST=build all Signed-off-by: Ruibin Chang <ruibin.chang@ite.com.tw> Change-Id: I100d70fbf80430ae98fa14c557886c4a37d8b93a Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2355164 Reviewed-by: Aseda Aboagye <aaboagye@chromium.org> Commit-Queue: Ruibin Chang <Ruibin.Chang@ite.com.tw> Tested-by: Ruibin Chang <Ruibin.Chang@ite.com.tw>
* it8xxx2_pdevb ,reef_it8320: enable TCPMv2Ruibin Chang2020-08-072-1/+12
| | | | | | | | | | | | | | | Enable TCPMv2 on board it8xxx2_pdevb and reef_it8320. BUG=none BRANCH=none TEST=TCPMv2 can run on board it8xxx2_pdevb and reef_it8320. Signed-off-by: Ruibin Chang <ruibin.chang@ite.com.tw> Change-Id: I8bdfc2f2b0642bb406f360c6d0a3b1f1c637b5ba Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2334433 Tested-by: Ruibin Chang <Ruibin.Chang@ite.com.tw> Commit-Queue: Ruibin Chang <Ruibin.Chang@ite.com.tw> Reviewed-by: Jett Rink <jettrink@chromium.org>
* it8xxx2_pdevb, reef_it8320: enable PD in RO imageRuibin Chang2020-08-071-0/+7
| | | | | | | | | | | | | | | | Enable PD in RO for TCPMv2 on board it8xxx2_pdevb and reef_it8320 (both are development board). BUG=none BRANCH=none TEST=can run PD functions in RO image. Signed-off-by: Ruibin Chang <ruibin.chang@ite.com.tw> Change-Id: Ia2b61213366c0e38076ad5c52942928ad4bbc3b7 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2334432 Tested-by: Ruibin Chang <Ruibin.Chang@ite.com.tw> Commit-Queue: Ruibin Chang <Ruibin.Chang@ite.com.tw> Reviewed-by: Jett Rink <jettrink@chromium.org>
* it8xxx2_pdevb, reef_it8320: enable flash clock 48MhzRuibin Chang2020-08-051-0/+3
| | | | | | | | | | | | | | | | Enable flash clock 48Mhz, so the test environment same as project ampton and waddledee. BUG=none BRANCH=none TEST=can boot and PD functions work. Signed-off-by: Ruibin Chang <ruibin.chang@ite.com.tw> Change-Id: I8ac3ebef79a4ced9d963e4841c3304f4bd2c96e6 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2334437 Commit-Queue: Ruibin Chang <Ruibin.Chang@ite.com.tw> Tested-by: Ruibin Chang <Ruibin.Chang@ite.com.tw> Reviewed-by: Jett Rink <jettrink@chromium.org>
* it8xxx2_pdevb ,reef_it8320: larger stack sizeRuibin Chang2020-08-051-3/+3
| | | | | | | | | | | | | | | Larger stack size on board it8xxx2_pdevb and reef_it8320. BUG=none BRANCH=none TEST=can boot on board it81202_pdevb and reef_it8320 Signed-off-by: Ruibin Chang <ruibin.chang@ite.com.tw> Change-Id: Iaee6ce48399dde5adddce5894474a1152b5f9453 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2334434 Commit-Queue: Ruibin Chang <Ruibin.Chang@ite.com.tw> Tested-by: Ruibin Chang <Ruibin.Chang@ite.com.tw> Reviewed-by: Jett Rink <jettrink@chromium.org>
* it83xx/adc: enabled GPIO alternate mode by default for pin into gpio.inc ↵tim2020-04-291-0/+2
| | | | | | | | | | | | | | | | | | | | marked as MODULE_ADC In the ADC initialization function, we should use the function of gpio_config_module to set alternate function and declare corresponding alternate function pins in gpio.inc. So we are able to enable extra flag if needed. BUG=none BRANCH=none TEST=testing the alternate function pins are normal on the board of it83xx_evb, it8xxx2_evb, it8xxx2_pdevb and reef_it8320. Signed-off-by: tim <tim2.lin@ite.corp-partner.google.com> Change-Id: I734b6ecc8f9343be65d9f29837e793b9574f8bdc Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2160241 Reviewed-by: Jett Rink <jettrink@chromium.org>
* it83xx/gpio: disable unused cc port moduleRuibin Chang2020-04-071-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | To prevent cc pins leakage and cc pins can be used as gpio. We will check if the chip supported tcpc physical port count is more than board active ITE port count. If yes, we will disable unused cc port module. BUG=none BRANCH=none TEST=1) on board it8xxx2_pdevb with chip it81202, check the pd port connection with adapter and dongle when hibernate and resume. adapter: connect dongle: disconnect then re-connect 2) on board it83xx_evb with chip it8320, set cc pins as gpio, check output level when hibernate and resume. Change-Id: I13511741b2e066dd87277db9f71f2b4a9323ad6d Signed-off-by: Ruibin Chang <ruibin.chang@ite.com.tw> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1994693 Tested-by: Ruibin Chang <Ruibin.Chang@ite.com.tw> Commit-Queue: Ruibin Chang <Ruibin.Chang@ite.com.tw> Reviewed-by: Jett Rink <jettrink@chromium.org>
* baseboard/ite_evb: create ite_evb baseboardRuibin Chang2020-03-125-0/+370
The development board of it83xx and it8xxx2 have common code and config options which are moved to baseboard ite_evb. And we create another board for PD EVB based on baseboard ite_evb. BUG=none BRANCH=none TEST=on baseboard ite_evb: 1.test board it83xx_evb and it8xxx2_evb: successfully Flash EC image and boot on chip it8320 and it83202. 2.flashrom by ite_spi test: $ sudo ./util/flash_ec --board=it8xxx2_evb --verbose INFO: Using servo_v2. INFO: Using ec image : /mnt/host/source/src/platform/ec/build/ it8xxx2_evb/ec.bin dut-control --port=9999 i2c_mux_en:on dut-control --port=9999 i2c_mux:remote_adc INFO: Flashing chip ite_spi. dut-control --port=9999 cold_reset:on dut-control --port=9999 fw_up:on dut-control --port=9999 cold_reset:off dut-control --port=9999 fw_up:off dut-control --port=9999 spi1_vref:pp1800 spi1_buf_en:on dut-control --port=9999 spi1_buf_on_flex_en:on INFO: Running flashrom: sudo /usr/sbin/flashrom -p ft2232_spi:type=servo-v2,port=B, serial=911416-00012 --flash-size flashrom v0.9.9 : : on Linux 4.15.0-76-generic (x86_64) flashrom v0.9.9 : : on Linux 4.15.0-76-generic (x86_64) INFO: Programming EC firmware image. INFO: Running flashrom: /usr/sbin/flashrom -p ft2232_spi:type=servo-v2,port=B, serial=911416-00012 -w /tmp/flash_spi_6163 flashrom v0.9.9 : : on Linux 4.15.0-76-generic (x86_64) flashrom v0.9.9 : : on Linux 4.15.0-76-generic (x86_64) Calibrating delay loop... OK. Erasing and writing flash chip... Verifying flash... VERIFIED. SUCCESS INFO: Flashing done. INFO: Restoring servo settings... dut-control --port=9999 cold_reset:off dut-control --port=9999 i2c_mux_en:on dut-control --port=9999 i2c_mux:remote_adc dut-control --port=9999 spi1_vref:off dut-control --port=9999 spi1_buf_en:off dut-control --port=9999 spi1_buf_on_flex_en:off dut-control --port=9999 cold_reset:on dut-control --port=9999 cold_reset:off 3.test board it8xxx2_pdevb: successfully Flash EC image and boot on chip it83202. Connection with adapter and dongle are able to ready state. Change-Id: Ib6371b61c27980eb9977548177efb8c896e72d47 Signed-off-by: Ruibin Chang <ruibin.chang@ite.com.tw> Signed-off-by: tim <tim2.lin@ite.corp-partner.google.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2071551 Reviewed-by: Jett Rink <jettrink@chromium.org>
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