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path: root/board/keyborg/hardware.c
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* Keyborg: implement methods needed for touch wakeVic Yang2014-06-191-2/+2
| | | | | | | | | | | | | | | | | | | | In order to wake the chips from STOP/SLEEP mode with a touch, we need to put the two chips in correct state before going into STOP/SLEEP mode. Also, when one of the chips wakes up, it needs to wake the other chip with GPIO interrupt. This CL implements the necessary methods and also adds a sample routine that put the chips in STOP mode and wait for a touch using the implemented methods. BUG=None TEST=Build and boot. Touch the panel and see the response in console. BRANCH=None Change-Id: Ia5f7df8b550ee2459bcae1840f8a2717c8d947ce Signed-off-by: Vic Yang <victoryang@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/204482 Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
* Keyborg: Switch to HSEVic Yang2014-05-211-9/+9
| | | | | | | | | | | | | We have a 16MHz oscillator input, so let's use it to save HSI power. BUG=None TEST=Build and boot BRANCH=None Change-Id: Ia2d97cfc8b97b7f8661112ebbd84952e41b955f2 Signed-off-by: Vic Yang <victoryang@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/200650 Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
* Keyborg: Disable SWD portsVic (Chun-Ju) Yang2014-04-301-2/+5
| | | | | | | | | | | | | | | | | Most of the time we don't need to use a debugger during runtime. Let's disable SWD ports so that we can use the two pins for touch scan. We can still re-flash the chips as long as we hold the reset pin when entering SWD mode. BUG=None TEST=Check we can still re-flash the chips BRANCH=None Change-Id: Ieb34406f4bc6d6a753ec840b3072f363c7b17c08 Signed-off-by: Vic (Chun-Ju) Yang <victoryang@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/197196 Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
* Keyborg: Refine master slave identificationVic (Chun-Ju) Yang2014-04-301-5/+7
| | | | | | | | | | | | | | | | | | | | The current identification method uses SPI_NSS as master/slave indication. However, if the other chip is not reset at the same time, it would drive SPI_NSS and fails the identification. Since the master chip is equipped with USB connection, we can identify the chips with USB pull up pin, which doesn't suffer from this problem. Also updates the comments on pin usage. BUG=None TEST=Reset the chips repeatedly. BRANCH=None Change-Id: Iccd7e73fca85abfa554f90dcb7e354cc4cc04626 Signed-off-by: Vic (Chun-Ju) Yang <victoryang@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/197194 Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
* Keyborg: implement matrix scanningVic (Chun-Ju) Yang2014-04-301-2/+10
| | | | | | | | | | | | | | This implements dual chip matrix scanning. Now the scan result is only dumped to debug output. BUG=None TEST=Put a finger on the panel and see its shape. BRANCH=None Change-Id: I015c901b42e24fe4a6249c12c37bc5bfcb308c9f Signed-off-by: Vic (Chun-Ju) Yang <victoryang@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/196468 Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
* Keyborg: chip-to-chip SPI communicationVic (Chun-Ju) Yang2014-04-241-10/+16
| | | | | | | | | | | | | | | | | | This implements a simple SPI driver for the two chips to exchange packets. There are both sync interface and async interface. Sync interface is easier to use, and async interface frees the CPU while the DMA takes care of the communication. BUG=None TEST=Hello test passed BRANCH=None Change-Id: I9823bad5cae6d1fa8f3658d17af4b998d3735a3e Signed-off-by: Vic (Chun-Ju) Yang <victoryang@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/195533 Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
* Keyborg: Implement master/slave identificationVic (Chun-Ju) Yang2014-04-241-2/+13
| | | | | | | | | | | | | | | The two chips work together, so let's teach them how to tell master from slave. After identification, the two chips shake hands through the two sync signals. BUG=None TEST=Disable handshake on master. See slave fail. Vice versa. BRANCH=None Change-Id: Idb6a56128f608dd2ee5c453f75abea475fe1779f Signed-off-by: Vic (Chun-Ju) Yang <victoryang@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/195395 Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
* Add STM32TS60 supportVic (Chun-Ju) Yang2014-04-201-0/+162
This chip got small flash and RAM, so the common runtime is disabled. Now the code only boots and print something every second to check debug console and timer are good. BUG=None TEST=Boot and see console output TEST=make buildall BRANCH=None Change-Id: I01150e8250a404628d1a3b81e677ac4c29782d7f Signed-off-by: Vic (Chun-Ju) Yang <victoryang@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/195382 Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
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