| Commit message (Collapse) | Author | Age | Files | Lines |
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This header cannot currently be accessed by Zephyr since it is in a
driver directory, not an include directory. This header has quite a
bit of public stuff in it, so it seems reasonable to consider
everything public.
Move the header file and update all users.
BUG=b:175434113
BRANCH=none
TEST=make buildall -j30
build volteer on zephyr
Signed-off-by: Simon Glass <sjg@chromium.org>
Change-Id: Ibba37f47a06783fafb5095f853f2a68d92b6df87
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2607745
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Now that the DPM will be handling source-out decisions for TCPMv2,
remove references to its old configuration options from TCPMv2 boards in
order to avoid any confusion as to what code is running now. Also
remove the charge manager notifications of sink attach/detach since the
policy is being centralized into the DPM.
Note that the previous configuration options only ever allocated one 3.0
A port, and so the default number of 3.0 A ports has been set to 1.
BRANCH=None
BUG=b:168862110,b:141690755
TEST=make -j buildall
Signed-off-by: Diana Z <dzigterman@chromium.org>
Change-Id: Ie452e3da32b04226503539daa67b6b9f4a58aa58
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2597431
Reviewed-by: Keith Short <keithshort@chromium.org>
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Commit 7dec638eb577aaa3a00d0551d73c276b94ebacb2 introduced two polarity
modes POLARITY_CC1_DTS, POLARITY_CC2_DTS in enum tcpc_cc_polarity, but
in many places there was an assumption that value other than 0 means
that cable is inverted, the most notable example is usb_mux_set(). As a
result kernel sometimes was not reporting SuperSpeed depending on if
cable was inverted or not.
This patch adds mapping from polarity with DTS to polarity without DTS
where necessary.
BUG=b:162254118
BRANCH=none
TEST=Connect ServoV4 to eve and run servod. Make sure that USB-C muxer
is connects USB3.0 lines (servod should set it).
Flash EC ToT on eve. Boot ChromeOS and go to Developer Console.
Run 'dmesg -w', check if device (eg. ethernet adapter) is attached as
SuperSpeed device. Unplug cable, invert and plug again. Kernel
should report that device is attached as SuperSpeed.
Signed-off-by: Patryk Duda <pdk@semihalf.com>
Change-Id: I354ef7047240cc8b5db01936b3780fae7387edb5
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2555157
Reviewed-by: Jett Rink <jettrink@chromium.org>
Reviewed-by: Denis Brockus <dbrockus@chromium.org>
Commit-Queue: Jett Rink <jettrink@chromium.org>
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Rename CONFIG_I2C_CONTROLLER and related comments.
BRANCH=None
BUG=None
TEST=make -j buildall
Signed-off-by: Diana Z <dzigterman@chromium.org>
Change-Id: Ied6a1829bf54a5c9a32e6772982a4b8aa31aaf23
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2518659
Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org>
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Google is working to change its source code to use more inclusive
language. To that end, replace the terms "sane", "sanity check", and
similar with inclusive/non-stigmatizing alternatives.
BUG=b:161832469
BRANCH=None
TEST=`make buildall -j` succeeds. `grep -Eir "sane|sanity" .` shows
results only in third-party code or documentation.
Signed-off-by: Paul Fagerburg <pfagerburg@chromium.org>
Change-Id: I29e78ab27f84f17b1ded75cfa10868fa4e5ae88c
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2311169
Reviewed-by: Jett Rink <jettrink@chromium.org>
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Different DB options may cause different numbers of charger chips to be
present on the system. Remove constant count for charger chips, and
instead always call into the overridable function to query the count.
BRANCH=None
BUG=b:155963446
TEST=make -j buildall
Signed-off-by: Diana Z <dzigterman@chromium.org>
Change-Id: I0e65b8af351ecabe6f7b823e0e56f1932cc280a6
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2277833
Commit-Queue: Aseda Aboagye <aaboagye@chromium.org>
Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
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This patch enables CONFIG_CMD_CHARGEN. It will allow to test the cr50
UART bridging flakiness on nocturne.
BUG=b:1568477297
BRANCH=nocturne
TEST=On firmware-nocturne-10984.B, cherry-picked this patch along
with related preceding patches, and checked the binary build.
Cq-Depend: chromium:1679710
Cq-Depend: chromium:1554198
Cq-Depend: chromium:1688134
Cq-Depend: chromium:2080933
Cq-Depend: chromium:2217112
Signed-off-by: Namyoon Woo <namyoon@google.com>
Change-Id: I2e2f09a04b40120d6298a43312c616eb1d7b9934
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2238666
Tested-by: Namyoon Woo <namyoon@chromium.org>
Auto-Submit: Namyoon Woo <namyoon@chromium.org>
Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
Commit-Queue: Aseda Aboagye <aaboagye@chromium.org>
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The TCPMv2 stack defaults to PD2.0 functionality. Defining
CONFIG_USB_PD_REV30 enables PD3.0 functionality.
BUG=b:155879504
BRANCH=none
TEST=make -j buildall
Manual tests:
passed FAFT_PD running on kohaku
Before patch:
*** 18624 bytes in flash and 29216 bytes in RAM on kohaku RO ****
*** 18544 bytes in flash and 29216 bytes in RAM on kohaku RW ****
After patch:
*** 23320 bytes in flash and 30336 bytes in RAM on kohaku RO ****
*** 23228 bytes in flash and 30336 bytes in RAM on kohaku RW ****
Flash savings of 4696 bytest
Ram savings of 1120
Signed-off-by: Sam Hurst <shurst@google.com>
Change-Id: I082cf62617a91b487d2d3567afd5e340bd52258c
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2184547
Reviewed-by: Jett Rink <jettrink@chromium.org>
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The PDCMD task is only pulling interrupts from the TCPCs on most boards,
which is unnecessary since the PD_INT tasks handle this job now.
Remove it from any boards using the PD_INT command which are not using
the older CONFIG_HOSTCMD_PD functionality (ex. samus, oak).
Located boards using:
find -name "ec.tasklist" | xargs grep -l PD_INT | xargs grep PDCMD
BRANCH=None
BUG=b:154959596
TEST=make -j buildall
Signed-off-by: Diana Z <dzigterman@chromium.org>
Change-Id: I29be8ab1d7a2616603fb55236aed4329ed8654f5
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2208221
Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
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BUG=none
BRANCH=none
TEST=make buildall -j
Change-Id: I33a63d6ac45bbd46da74db34a21d1bb130476362
Signed-off-by: Vijay Hiremath <vijay.p.hiremath@intel.com>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2196946
Reviewed-by: Sooraj Govindan <sooraj.govindan@intel.corp-partner.google.com>
Reviewed-by: Keith Short <keithshort@chromium.org>
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CONFIG_GPU, CONFIG_USB_SM_FRAMEWORK, CONFIG_BOARD_HAS_AFTER_RSMRST
are no longer used. This patch removes them.
BUG=b/155996358
BRANCH=none
TEST=buildall
Signed-off-by: Daisuke Nojiri <dnojiri@chromium.org>
Change-Id: Ia407850398c07b7cdb01cddb0288ae977b9dca82
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2189171
Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
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This patch enables support for TCPMv2 for nocturne board. CONFIG_USB_PID
value was added too. All PD related defines were sorted alphabetically.
BUG=none
BRANCH=none
TEST=Deploy on nocturne. Check if TCPMv2/PD3.0 works properly
Signed-off-by: Patryk Duda <pdk@semihalf.com>
Change-Id: Ic108cffd89fd73de1e36c7b853c6ec1e0252f140
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2160877
Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
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Generic tcpci driver doesn't obtain firmware version properly,
because it is device specific. PS8xxx driver also performs
additional operations that is necessary for chip to operate correctly.
BUG=none
BRANCH=none
TEST=Deploy on nocturne. Check if charging works.
Attach some device and check if it works.
Signed-off-by: Patryk Duda <pdk@semihalf.com>
Change-Id: I9dd87131e324c29553f8c1624974d9dd5cd9b61d
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2160876
Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
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GOOG000B(hid-google-whiskers.c() enumerates the input device. It depends
on MKBP events to identify tablet mode switch. Not setting
EC_MKBP_EVENT_SWITCH as part of MKBP wake mask means mkbp_event.c will
drop switch events that happen during suspend (even when they are the
reason for wake). Thus let us set EC_MKBP_EVENT_SWITCH as part of
MKBP_WAKE_MASK.
BUG=b:140292867
Test=Deploy on nocturne and make sure base attach and detach trigger
full resume.
Signed-off-by: Ravi Chandra Sadineni <ravisadineni@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1797065
Reviewed-by: Furquan Shaikh <furquan@chromium.org>
Change-Id: I5c92093263182b8bebaf1dc49bee3dc39f4b054a
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2160875
Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
Tested-by: Patryk Duda <pdk@semihalf.com>
Commit-Queue: Patryk Duda <pdk@semihalf.com>
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Previously, the base detection state machine would monitor the detach
pins for determining when the base appeared to be detached. However,
sometimes the voltage sensed on that pin would be lower than the detach
threshold for 1-2 readings after debouncing. This would lead to a brief
detach and reattach event.
This commit changes the debouncing logic to the following:
* Assume the base is attached.
* If a reading is sensed where the detach pin is less than the set
threshold, start debouncing and collect samples at a much more rapid
rate.
* Set a deadline in the future when we'll make our decision.
* Once the deadline has expired, take an average of the last 5 samples
and see if it's beneath our threshold or not. If it's beneath the
threshold, we assume the base to be disconnected, otherwise it's still
connected.
BUG=b:118213312
BRANCH=firmware-nocturne-10984.B
TEST=Flash nocturne; attach whiskers, verify that whiskers doesn't
appear to briefly detach.
TEST=Apply base power with whiskers disconnected. Wait until nocturne
enters base attach state, verify that it transitions to the detach state
very quickly.
TEST=Attach and detach whiskers; verify that the detach is recognized
quickly.
Signed-off-by: Aseda Aboagye <aaboagye@google.com>
Reviewed-on: https://chromium-review.googlesource.com/c/1300614
Tested-by: Aseda Aboagye <aaboagye@chromium.org>
Reviewed-by: Furquan Shaikh <furquan@chromium.org>
Commit-Queue: Aseda Aboagye <aaboagye@chromium.org>
Change-Id: Ibd2aa911c95d8701962867ed8988d9aa1d70f9fa
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2160872
Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
Tested-by: Patryk Duda <pdk@semihalf.com>
Commit-Queue: Patryk Duda <pdk@semihalf.com>
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This patches removes the VR decay for V1.00A power rail when system
enters low power mode. According to PAG #543977, V1.00A power has
tolerance from -6.7% to 5% but it doesn't support LPM like VccPRIM_CORE
which could down to 0.75v in low power mode.
BUG=b:116180071
BRANCH=Nocturne
TEST=Measure V1.00A power rail when system is in S0iX and ensure it
keeps at 1.0v
Signed-off-by: Roy Mingi Park <roy.mingi.park@intel.com>
Reviewed-on: https://chromium-review.googlesource.com/c/1291950
Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
Reviewed-by: Furquan Shaikh <furquan@chromium.org>
Reviewed-by: Puthikorn Voravootivat <puthik@chromium.org>
Commit-Queue: Aseda Aboagye <aaboagye@chromium.org>
Change-Id: Iefbf86c8d71794277ee6e7ae4bdca81617cd03fc
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2160871
Tested-by: Patryk Duda <pdk@semihalf.com>
Commit-Queue: Patryk Duda <pdk@semihalf.com>
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This change prevents leakage current on strap
pins and saves around 1mW on nocturne.
BUG=b:117139495
BRANCH=firmware-nocturne-10984.B
TEST=On Nocturne, saved EC power by 1mW
Signed-off-by: Divya Sasidharan <divya.s.sasidharan@intel.com>
Reviewed-on: https://chromium-review.googlesource.com/c/1275136
Reviewed-by: Roy Mingi Park <roy.mingi.park@intel.com>
Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
Commit-Queue: Roy Mingi Park <roy.mingi.park@intel.com>
Tested-by: Roy Mingi Park <roy.mingi.park@intel.com>
Change-Id: I419402fa67e2497c25dad974b9e3d5a5984681bb
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2160870
Tested-by: Patryk Duda <pdk@semihalf.com>
Commit-Queue: Patryk Duda <pdk@semihalf.com>
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It's kind of handy to know what the voltage was when we decided to
change major states.
BUG=None
BRANCH=firmware-nocturne-10984.B
TEST=Flash nocturne; attach and detach base and verify voltages are
printed when the state changes.
Signed-off-by: Aseda Aboagye <aaboagye@google.com>
Reviewed-on: https://chromium-review.googlesource.com/c/1295297
Commit-Queue: Aseda Aboagye <aaboagye@chromium.org>
Tested-by: Aseda Aboagye <aaboagye@chromium.org>
Reviewed-by: Furquan Shaikh <furquan@chromium.org>
Change-Id: I27ed42f46344c712171d05c11f36ae2f949040f6
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2160868
Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
Tested-by: Patryk Duda <pdk@semihalf.com>
Commit-Queue: Patryk Duda <pdk@semihalf.com>
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This change prevents leakage current on NVME
pins and saves around ~0.33mW on nocturne.
BRANCH=nocturne
BUG=b:117139495
TEST=Check npcx EC power to see power improvement
Signed-off-by: Roy Mingi Park <roy.mingi.park@intel.com>
Reviewed-on: https://chromium-review.googlesource.com/c/1275126
Commit-Queue: Aseda Aboagye <aaboagye@chromium.org>
Reviewed-by: Mulin Chao <mlchao@nuvoton.com>
Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
Change-Id: I546dd7100698181ea1549752565fb2f01cff0289
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2160867
Tested-by: Patryk Duda <pdk@semihalf.com>
Commit-Queue: Patryk Duda <pdk@semihalf.com>
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We shouldn't make GPIO pins stay at 3.3V mode when
we can use 1.8V mode to lower power consumption.
BUG=b:117139495, b:112037915
TEST=Lower power in S0ix. ALS works fine.
Signed-off-by: Puthikorn Voravootivat <puthik@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/1257660
Reviewed-by: Mulin Chao <mlchao@nuvoton.com>
Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
Change-Id: I87d07c8b0d6d8714c0d257b5ba234518b41ffd9c
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2160865
Tested-by: Patryk Duda <pdk@semihalf.com>
Commit-Queue: Patryk Duda <pdk@semihalf.com>
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We need thermal profile to make the surface
temperature cool.
BUG=b:115924459, b:112550414
BRANCH=firmware-nocturne-10984.B
TEST=Cool device down, verify that once temp sensor
crosses threshold, cpu frequencies lower.
TEST=Verify cpu frequencies when device cools down.
Signed-off-by: Puthikorn Voravootivat <puthik@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/1239628
Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
Reviewed-by: Duncan Laurie <dlaurie@google.com>
Change-Id: I2f1235c134cfaf0e235b1642aab0adde0303a242
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2157062
Tested-by: Patryk Duda <pdk@semihalf.com>
Commit-Queue: Patryk Duda <pdk@semihalf.com>
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We need to stop charging the battery when the DRAM temperature exceeds
47 C. This commit uses charge_profile_override() to start discharging
the pack when this happens and resume charging when the temperature
cools down.
BUG=b:115924459, b:112550414
BRANCH=firmware-nocturne-10984.B
TEST=Cool device down, verify that once temp sensor crosses threshold,
charging is stopped.
TEST=Verify charging is resumed when device shuts down.
TEST=Verify charging is resumed when device cools down.
Signed-off-by: Aseda Aboagye <aaboagye@google.com>
Signed-off-by: Puthikorn Voravootivat <puthik@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/1231476
Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
Change-Id: I5feb132ec915894b7c391ffdf49a3f150912f554
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2157061
Tested-by: Patryk Duda <pdk@semihalf.com>
Commit-Queue: Patryk Duda <pdk@semihalf.com>
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Various revisions of nocturne have had the current limiting resistors
tweaked and now one table will not suit all. This commit updates the
settings yet again for the latest revision as well as include support
for the older revisions.
BUG=b:114680136
BRANCH=firmware-nocturne-10984.B
TEST=Flash different revisions of nocturne and verify that the colors &
brightness are as expected.
Signed-off-by: Aseda Aboagye <aaboagye@google.com>
Reviewed-on: https://chromium-review.googlesource.com/1239546
Commit-Queue: Aseda Aboagye <aaboagye@chromium.org>
Tested-by: Aseda Aboagye <aaboagye@chromium.org>
Reviewed-by: Furquan Shaikh <furquan@chromium.org>
Change-Id: Ia429ee5faf7954cf74918571929d7636b9721de3
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2157060
Tested-by: Patryk Duda <pdk@semihalf.com>
Commit-Queue: Patryk Duda <pdk@semihalf.com>
Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
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To reduce our power consumption in our lowest power state, we should
reduce the charger's input voltage down to 9V when the battery is full
and we are no longer charging it. This commit will trigger a PD
negotiation to select a 9V source cap.
BUG=b:116125689
BRANCH=firmware-nocturne-10984.B
TEST=Let battery discharge that it will accept current, plug in
blackcat, verify that it chooses a 15V contract. Wait until battery
gets full and stops accepting current, verify that the new explicit
contract is for 9V.
TEST=While battery is full, turn on AP, verify that contract changes to
15V/3A.
Signed-off-by: Aseda Aboagye <aaboagye@google.com>
Reviewed-on: https://chromium-review.googlesource.com/1239550
Reviewed-by: Furquan Shaikh <furquan@chromium.org>
Commit-Queue: Aseda Aboagye <aaboagye@chromium.org>
Tested-by: Aseda Aboagye <aaboagye@chromium.org>
Change-Id: I8a1ad7b289d4d2a74661658d707c5f9bd44444a9
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2157059
Tested-by: Patryk Duda <pdk@semihalf.com>
Commit-Queue: Patryk Duda <pdk@semihalf.com>
Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
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PP1200_VDDQ and PP1800_U_DRAM don't fall all the way to 0 volts, however
we can use the PMIC's active discharge to help drive it there. This
commit enables a 500 ohm discharge on 1.8U and 100 ohm discharge on
1.2U.
BUG=b:114396893
BRANCH=firmware-nocturne-10984.B
TEST=Flash nocturne; measure PP1200_VDDQ and PP1800_U_DRAM and verify
that they both go to 0 volts after an EC reset and also have a 200mV
margin between the two rails.
Signed-off-by: Aseda Aboagye <aaboagye@google.com>
Reviewed-on: https://chromium-review.googlesource.com/1239549
Commit-Queue: Aseda Aboagye <aaboagye@chromium.org>
Tested-by: Aseda Aboagye <aaboagye@chromium.org>
Reviewed-by: Furquan Shaikh <furquan@chromium.org>
Change-Id: I9e8735b252c85c359000d261da31c4d7d9cf872b
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2157058
Tested-by: Patryk Duda <pdk@semihalf.com>
Commit-Queue: Patryk Duda <pdk@semihalf.com>
Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
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Replace some macro of BMI160 to BMI version for common function of
BMI series.
Make board config include the accelgyro_bmi_common.h instead of
accel_gyro_bmi160.h.
BRANCH=None
BUG=b:146144827
TEST=make buildall -j
Change-Id: I043ff8a92f15295ead3fa5c1e292319e2b4fa21a
Signed-off-by: Ching-Kang Yen <chingkang@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2156525
Reviewed-by: Gwendal Grignou <gwendal@chromium.org>
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This makes retimers appear as generic muxes. By allowing a
chain of muxes they can be stacked up to the new configurations
that zork requires and will continue to work as they did before
on configurations that only have a single mux.
The code used to have two different arrays, 1) muxes and 2)
retimers. On one of the zork configurations the processor
MUX stopped being the primary mux and the retimer took its
place. In a different configuration of that same platform
it left the primary and secondary alone but the mux_set
FLIP operation had to be ignored. Since the same
interfaces needed to be available for both it stopped making
sense to have two different structures and two different
methods of handling them. This consolodates the two into
one.
The platforms that do not have retimers, this change will
not make any difference. For platforms like zork, it will
remove the retimers and make them chained muxes. So
testing on trembyle makes sense to verify,
BUG=b:147593660
BRANCH=none
TEST=verify USB still works on trembyle
Change-Id: I286cf1e302f9bd3dd7e81098ec08514a2a009fe3
Signed-off-by: Denis Brockus <dbrockus@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2066794
Commit-Queue: Jett Rink <jettrink@chromium.org>
Reviewed-by: Edward Hill <ecgh@chromium.org>
Reviewed-by: Jett Rink <jettrink@chromium.org>
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The current use of the PD Config Flags are a bit confusing and
has been changed to the following:
The CONFIG_USB_POWER_DELIVERY flag is used to enable and disable
the TCPMv1 and TCPMv2 stacks. And when CONFIG_USB_POWER_DELIVERY
is enabled, one of the following must be enabled:
CONFIG_USB_PD_TCPMV1 - legacy power delivery state machine
CONFIG_USB_PD_TCPMV2 - current power delivery state machine
BUG=b:149993808
BRANCH=none
TEST=make -j buildall
Change-Id: Ie3f8615a75b15b4f1c703f57f3db9e152a471238
Signed-off-by: Sam Hurst <shurst@google.com>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2068519
Reviewed-by: Diana Z <dzigterman@chromium.org>
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The action_delay_sec field hasn't actually been referenced by
any code since 2013. Removing the corresponding struct field.
BUG=None
BRANCH=None
TEST=builds
Change-Id: Ia7334c26b85d0161ff61bb51fbdda61bb921595a
Signed-off-by: Diana Z <dzigterman@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2054945
Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
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This commit removes the temporary common charger chip configuration and
instead puts the configuration in each board.
BRANCH=none
BUG=b:147672225
TEST=builds, runs on waddledoo and octopus
Change-Id: If81aef31e48c65999a87e202494f286716114bbb
Signed-off-by: Diana Z <dzigterman@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2031855
Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
Reviewed-by: Jett Rink <jettrink@chromium.org>
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BUG=b:145796172
BRANCH=none
TEST=make buildall -j
Change-Id: Ie4ffaf208745764262931501f0dff77b525a4e59
Signed-off-by: Vijay Hiremath <vijay.p.hiremath@intel.com>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2017569
Reviewed-by: Jett Rink <jettrink@chromium.org>
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The PS8805 needs time for firmware init. Before the firmware initiated,
I2C read may return wrong values. Parade suggests adding a 10ms delay.
BRANCH=None
BUG=b:147767696
TEST=Built Trogdor and Nocturne without error. Verified Trogdor TCPC
reset correctly, with some other CLs too.
Change-Id: I9f67612792f72d6075cbf93a516494c1af592259
Signed-off-by: Wai-Hong Tam <waihong@google.com>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2015640
Reviewed-by: Stephen Boyd <swboyd@chromium.org>
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This is the second half of b/147290482
Cleaning up to use pd_data_role instead of int
BUG=b:147314832
BRANCH=none
TEST=make buildall -j
Change-Id: I2445b06f5f5469fb1f3a968034a83e3ee792e7c7
Signed-off-by: Denis Brockus <dbrockus@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1991845
Reviewed-by: Jett Rink <jettrink@chromium.org>
Reviewed-by: Edward Hill <ecgh@chromium.org>
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add enable() and set_duty() into struct pwm_led, to support PWMs other
than the default one.
BUG=b:135086465
TEST=verify led works on grunt
BRANCH=none
Change-Id: I1fd919d4990a145df272a7ee0b2072612f80cd44
Signed-off-by: Ting Shen <phoenixshen@google.com>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1963730
Reviewed-by: Eric Yilun Lin <yllin@chromium.org>
Commit-Queue: Ting Shen <phoenixshen@chromium.org>
Tested-by: Ting Shen <phoenixshen@chromium.org>
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Required by Android CDD - Section 7.3.1 - Paragraph C.1.4
Modified mechanically with:
for i in $(grep -lr "\.default_range" board); do
sed -i '/.default_range =/s#\(.*\.default_range = \).* /\
\* g.*#\14, /* g, to meet CDD 7.3.1/C-1-4 reqs */#' $i
done
Manually reworked to only change the accelerometer that matters to
android:
The lid accelerometer or the base accelerometer if the base also hosts
the gyroscope.
This is only for future EC, no need to land the change on branches:
mems_setup will take care to set accelerometer ranges at 4g on startup.
BUG=b:144004449
BRANCH=none
TEST=compile
Change-Id: If8c14b2e928c9c70c0ce51451adcfcd674a9e73b
Signed-off-by: Gwendal Grignou <gwendal@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1957375
Reviewed-by: Justin TerAvest <teravest@chromium.org>
Reviewed-by: Alexandru M Stan <amstan@chromium.org>
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There is a board specific usb_pd_policy.c file that contains a lot of
code for handling DisplayPort Alternate mode, Google Firmware Update
Alternate mode, as well as some PD policy functions such as deciding to
Accept or Reject a data role swap or a power role swap. Several boards
simply copy/paste this code from project to project as a lot of this
functionality is not actually board specific.
This commit tries to refactor this by pulling the functions that are not
mainly board specific into common code. The functions are made
overridable such that boards that truly do require a different
implementation may do so.
Additionally, this consolidation changes the policy behaviour for some
boards, but they should be for the better. Some examples include that
data swaps are always allowed if we are a UFP (no system image
requirement), power swaps are allowed to become a sink if we are no
longer dual role (e.g. - in suspend), and DisplayPort Alternate Mode is
not entered if the AP is off.
In order to facilitate this refactor, a couple CONFIG_* options were
introduced:
- CONFIG_USB_PD_DP_HPD_GPIO
/* HPD is sent to the GPU from the EC via a GPIO */
- CONFIG_USB_PD_CUSTOM_VDO
/*
* Define this if a board needs custom SNK and/or SRC PDOs.
*
* The default SRC PDO is a fixed 5V/1.5A with PDO_FIXED_FLAGS indicating
* Dual-Role power, USB Communication Capable, and Dual-Role data.
*
* The default SNK PDOs are:
* - Fixed 5V/500mA with the same PDO_FIXED_FLAGS
* - Variable (non-battery) min 4.75V, max PD_MAX_VOLTAGE_MV,
* operational current PD_MAX_CURRENT_MA,
* - Battery min 4.75V, max PD_MAX_VOLTAGE_MV, operational power
* PD_OPERATING_POWER_MW
*/
BUG=chromium:1021724,b:141458448
BRANCH=<as many as we can that are still supported>
TEST=`make -j buildall`
TEST=Flash a kohaku, verify that DP Alt Mode still works with a variety
of DP peripherals
TEST=Repeat above with a nocturne
TEST=Repeat above with an atlas
Change-Id: I18fd7e22dc77fe1dc6c21c38cd7f1bc53cae86cb
Signed-off-by: Aseda Aboagye <aaboagye@google.com>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1949052
Tested-by: Aseda Aboagye <aaboagye@chromium.org>
Reviewed-by: Paul Fagerburg <pfagerburg@chromium.org>
Reviewed-by: Diana Z <dzigterman@chromium.org>
Reviewed-by: Denis Brockus <dbrockus@chromium.org>
Commit-Queue: Aseda Aboagye <aaboagye@chromium.org>
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Certain SKUs of certain boards have lesser number of USB PD ports than
defined by CONFIG_USB_PD_PORT_COUNT. Hence rename
CONFIG_USB_PD_PORT_COUNT as CONFIG_USB_PD_PORT_MAX_COUNT.
BUG=b:140816510, b:143196487
BRANCH=octopus
TEST=make -j buildall; Boot to ChromeOS
Change-Id: I7c33b27150730a1a3b5813b7b4a72fd24ab73c6a
Signed-off-by: Karthikeyan Ramasubramanian <kramasub@google.com>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1879337
Tested-by: Karthikeyan Ramasubramanian <kramasub@chromium.org>
Reviewed-by: Jett Rink <jettrink@chromium.org>
Commit-Queue: Jett Rink <jettrink@chromium.org>
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this changes the declaration and definitions of
typec_set_source_current_limit() to take an enum tcpc_rp_value instead
of int.
BRANCH=none
BUG=none
TEST=buildall passes
Change-Id: If633641a581eeb6085b94bc727e23fb57f7cd435
Signed-off-by: Caveh Jalali <caveh@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1889117
Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org>
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This change fixes the printf formatting errors found by the
compile-time prinf format checker. The errors fall into a few
categories:
1. Incorrect size specifier (missing or extra l).
2. Missing or extra arguments.
3. Bad line splitting.
BUG=chromium:984041
TEST=make -j buildall
BRANCH=none
Change-Id: I5618097a581210b9fcbfc81560dec050ae30b61c
Signed-off-by: Evan Green <evgreen@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1819653
Reviewed-by: Jack Rosenthal <jrosenth@chromium.org>
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Add support for the RTC reset on Volteer. This change also deduplicates
the board_rtc_reset() function which was identical on boards that
enabled CONFIG_BOARD_HAS_RTC_RESET.
BUG=b:141321096
BRANCH=none
TEST=make buildall
Change-Id: Ifc6959f8271400174fd4999a3c70800b03b9c2d0
Signed-off-by: Keith Short <keithshort@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1816869
Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org>
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For all boards that defined CONFIG_CHARGER, CONFIG_CHARGER_V2 is also
defined. Remove references to CONFIG_CHARGER_V2 from board header files.
Replace CONFIG_CHARGER_V2 in common C modules with CONFIG_CHARGER when
appropriate.
BUG=b:139699769
BRANCH=none
TEST=make buildall -j
Change-Id: I6b54baf4ad2406bbed629b6b272dad9ea6a81280
Signed-off-by: Keith Short <keithshort@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1789420
Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org>
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This change allows us to use the IS_ENABLED condition to replace
the various ifdef guards around the CONFIG_ACCEL_FIFO
BUG=b:137758297,chromium:981990
BRANCH=None
TEST=buildall and CTS tests on Arcada
Change-Id: I65d36bac19855e51c830a33e6f3812575e8d15d9
Signed-off-by: Yuval Peress <peress@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1704164
Reviewed-by: Jack Rosenthal <jrosenth@chromium.org>
Reviewed-by: Gwendal Grignou <gwendal@chromium.org>
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This CL annotates __overridable to the following functions:
board_system_is_idle
power_chipset_handle_host_sleep_event
power_board_handle_host_sleep_event
TEST=make buildall
BUG=none
BRANCH=none
Change-Id: I0168b69c49fab5672238711d4f3a6a5517cdd8b3
Signed-off-by: Yilun Lin <yllin@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1761759
Reviewed-by: Furquan Shaikh <furquan@chromium.org>
Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org>
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The extentions were added to make the compiler perform most
of the verification that the conversion was being done correctly
to remove 8bit addressing as the standard I2C/SPI address type.
Now that the compiler has verified the code, the extra
extentions are being removed
BUG=chromium:971296
BRANCH=none
TEST=make buildall -j
TEST=verify sensor functionality on arcada_ish
Change-Id: I36894f8bb9daefb5b31b5e91577708f6f9af2a4f
Signed-off-by: Denis Brockus <dbrockus@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1704792
Reviewed-by: Jack Rosenthal <jrosenth@chromium.org>
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Opt for 7bit slave addresses in EC code. If 8bit is
expected by a driver, make it local and show this in
the naming.
Use __7b, __7bf and __8b as name extensions for i2c/spi
addresses used in the EC codebase. __7b indicates a
7bit address by itself. __7bf indicates a 7bit address
with optional flags attached. __8b indicates a 8bit
address by itself.
Allow space for 10bit addresses, even though this is
not currently being used by any of our attached
devices.
These extensions are for verification purposes only and
will be removed in the last pass of this ticket. I want
to make sure the variable names reflect the type to help
eliminate future 7/8/7-flags confusion.
BUG=chromium:971296
BRANCH=none
TEST=make buildall -j
Change-Id: I2fc3d1b52ce76184492b2aaff3060f486ca45f45
Signed-off-by: Denis Brockus <dbrockus@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1699893
Reviewed-by: Jack Rosenthal <jrosenth@chromium.org>
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According to the DisplayPort Alt Mode on USB Type-C specification, if
the DisplayPort Source device does not need to maintain HPD connectivity
information prior to entering a low power state, the device shall exit
the DP Alternate Mode. Previously, we were always entering DP Alt Mode
regardless of the SoC state. When we are shutting the device down to S5
or G3, there's no need to monitor the HPD connectivity information.
This commit simply does not enter DP Alt Mode when the SoC is off.
BUG=chromium:927636
BRANCH=firmware-nocturne-10984.B
TEST=Flash nocturne, shut DUT down to S5/G3, plug in a USB-C monitor
that can also act as a Source, verify with PD analyzer that DUT does not
Enter DP Alt mode, boot system up, verify that external display works.
Change-Id: I2ad3619cabeae5d90e8af1bfa9cab67452d9fc16
Signed-off-by: Aseda Aboagye <aaboagye@google.com>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1450815
Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
Tested-by: Aseda Aboagye <aaboagye@chromium.org>
Commit-Queue: Aseda Aboagye <aaboagye@chromium.org>
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The power rail for the 5V used for sourcing is not available while the
chipset is off. Therefore pd_set_power_supply_ready() should return an
error if chipset is off.
BUG=b:118646299
BRANCH=firmware-nocturne-10984.B
TEST=Flash nocturne; plug in a USB Type-C ethernet adapter, run
`dut-control power_state:rec` and verify that VBUS is present at the
insert screen.
TEST=Repeat the above test 20 times and verify that it always succeeds.
Change-Id: Ie675d862dfbbe1e1ce08f6b203008ee784eb8ede
Signed-off-by: Aseda Aboagye <aaboagye@google.com>
Reviewed-on: https://chromium-review.googlesource.com/c/1307699
Commit-Queue: Aseda Aboagye <aaboagye@chromium.org>
Tested-by: Aseda Aboagye <aaboagye@chromium.org>
Reviewed-by: Furquan Shaikh <furquan@chromium.org>
(cherry picked from commit b6db88f25366a4519ad45d4b54e91cb40e7ea7fb)
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1708266
Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
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By fixing the bug(b/136282898) to allow MKBP events to wake the system
in suspend, all MKBP events would wake the system which goes against our
chrome OS wake sources spec. By defining CONFIG_MKBP_EVENT_WAKEUP_MASK,
nocturne will not wake on any MKBP event.
BUG=chromium:786721
BRANCH=firmware-nocturne-10984.B
TEST=Build and flash nocturne, suspend DUT, plug in powered charge-thru
hub w/ an external display connected, verify that DUT does not wakes up
and display is not shown.
Change-Id: I0810d0ea625689ee39f0e52b62a8ee7c00c49aad
Signed-off-by: Aseda Aboagye <aaboagye@google.com>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1685788
Tested-by: Aseda Aboagye <aaboagye@chromium.org>
Commit-Queue: Aseda Aboagye <aaboagye@chromium.org>
Reviewed-by: Alexandru M Stan <amstan@chromium.org>
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This commit allows nocturne to wake from suspend when the device enters
DisplayPort Alternate mode and if an attention VDM is received while in
the mode. Note that since our policy is to be a sink only during
suspend, only powered charge through hubs with external display
capability will wake us up.
BUG=chromium:786721
BRANCH=firmware-nocturne-10984.B
TEST=Flash nocturne; suspend DUT, plug in powered charge through hub,
verify that DUT wakes up.
TEST=Use a powered MST hub, plug in a second monitor, verify DUT wakes
up as well.
Change-Id: I7e0fc6745ef06865e9fc4c23c29adf5974664388
Signed-off-by: Aseda Aboagye <aaboagye@google.com>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1666367
Tested-by: Aseda Aboagye <aaboagye@chromium.org>
Commit-Queue: Aseda Aboagye <aaboagye@chromium.org>
Reviewed-by: Diana Z <dzigterman@chromium.org>
Reviewed-by: Benson Leung <bleung@google.com>
Reviewed-by: Furquan Shaikh <furquan@chromium.org>
Auto-Submit: Aseda Aboagye <aaboagye@chromium.org>
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Currently chipset specific power signals are defined at board/baseboard
level. These power signals are moved to chipset specific file to minimize
the redundant power signals array defined for each board/baseboard.
BUG=b:134079574
BRANCH=none
TEST=make buildall -j
Change-Id: I351904f7cd2e0f27844c0711beb118d390219581
Signed-off-by: Vijay Hiremath <vijay.p.hiremath@intel.com>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1636837
Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
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