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In the interest of making long-term branch maintenance incur as little
technical debt on us as possible, we should not maintain any files on
the branch we are not actually using.
This has the added effect of making it extremely clear when merging CLs
from the main branch when changes have the possibility to affect us.
The follow-on CL adds a convenience script to actually pull updates from
the main branch and generate a CL for the update.
BUG=b:204206272
BRANCH=ish
TEST=make BOARD=arcada_ish && make BOARD=drallion_ish
Signed-off-by: Jack Rosenthal <jrosenth@chromium.org>
Change-Id: I17e4694c38219b5a0823e0a3e55a28d1348f4b18
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3262038
Reviewed-by: Jett Rink <jettrink@chromium.org>
Reviewed-by: Tom Hughes <tomhughes@chromium.org>
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BRANCH=none
BUG=b:163910671
TEST=pass "make buildall".
TEST=with related CLs, switch to different chip variant in build.mk;
build and flash the image; make sure each EC image can boot up on
the internal testing board of different chip variant.
Signed-off-by: CHLin <CHLin56@nuvoton.com>
Change-Id: I6575b23bbeda2a4a7912352c15f1537aba4c93bc
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2355157
Tested-by: CH Lin <chlin56@nuvoton.com>
Reviewed-by: Keith Short <keithshort@chromium.org>
Reviewed-by: caveh jalali <caveh@chromium.org>
Commit-Queue: CH Lin <chlin56@nuvoton.com>
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There are only 512 Kbytes of internal flash in Rev.C of npcx7m7w
(i.e. npcx7m7wc.) It is different from the Rev.B of npcx7m7w
(i.e. npcx7m7wb.) This CL illustrates how to set the flash type and
flash size when chip variant is npcx7m7wc.
BRANCH=none
BUG=none
TEST=pass "make buildall".
TEST=with related CLs, switch to different chip variant in build.mk;
build and flash the image; make sure each EC image can boot up on
EVB or internal testing board of different chip variant.
Change-Id: I2b50c7a023b1634ed4a200cb826532174baae117
Signed-off-by: CHLin <CHLIN56@nuvoton.com>
Reviewed-on: https://chromium-review.googlesource.com/1543063
Commit-Ready: CH Lin <chlin56@nuvoton.com>
Tested-by: CH Lin <chlin56@nuvoton.com>
Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
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There are only 512 Kbytes of internal flash in npcx7m6fc, which is
different from previous npcx7 chips with internal flash. This CL
illustrates how to set the flash type and flash size when chip variant
is npcx7m6fc.
This CL also sets the BOARD_VERSION number according to the chip
variant. Manually changing the BORAD_VERSION number is no longer need
when we want to build the npcx7_evb board image of different chip
variants.
BRANCH=none
BUG=none
TEST=No build errors for make buildall.
TEST=Switch to different chip variant in build.mk; build and flash the
image; make sure each EC image can boot up on EVB of different chip
variant.
Change-Id: I430a39fae8c9516c0f22b0fe9868403a60b80d4a
Signed-off-by: CHLin <CHLIN56@nuvoton.com>
Reviewed-on: https://chromium-review.googlesource.com/1351918
Commit-Ready: CH Lin <chlin56@nuvoton.com>
Tested-by: CH Lin <chlin56@nuvoton.com>
Reviewed-by: Jett Rink <jettrink@chromium.org>
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In this CL, we changed chip variants npcx7m6xb to npcx7m6fb and npcx7m7w
to npcx7m7wb for better clafiication since it introduced new parameter
"b" for chip generation in the same family series.
In new npcx7 series naming rule, it follows:
Format: NPCX7(M)(N)(G/K/F)(B/C)
param M: 8: 128-pins package, 9: 144-pins package
param N: 5: 128KB RAM Size, 6: 256KB RAM Size, 7: 384KB RAM Size
param G/K/F/W: Google EC depends on specific features.
param B/C: Chip generation in npcx7. (Generation A is ignored. It
follows nameing rule in npcx5.)
The all chip variants of npcx7 used in boards are also listed below:
npcx7m6g - for npcx7 ec without internal flash on npcx_evb.
npcx7m6f - for npcx7 ec with internal flash.
npcx7m6fb - for npcx7 ec with internal flash, enhanced features.
npcx7m7wb - for npcx7 ec with internal flash, enhanced features + WOV.
BRANCH=none
BUG=none
TEST=No build errors for npcx7 series.
Change-Id: I896ee33209efa5d7157c90515005db5f36318c76
Signed-off-by: Mulin Chao <mlchao@nuvoton.com>
Reviewed-on: https://chromium-review.googlesource.com/1025471
Reviewed-by: Jett Rink <jettrink@chromium.org>
Reviewed-by: Nicolas Boichat <drinkcat@chromium.org>
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There are two versions of npcx7 EVB. This CL adds the definition
BOARD_VERSION (default is 2) in board.h. So we can include different
features or set CONFIG_* flags based on the value of BOARD_VERSION to
meet the default HW configuration of npcx7 EVBs.
BRANCH=none
BUG=none
TEST=No build errors for make buildall.
TEST=Change BOARD_VERSION to 1/2; "BOARD=npcx7_evb make";
Flash the image on EVB 1/2; make sure the EVBs bootup.
Change-Id: Id4556f702af8c26778a649addde7cf490b5301fc
Signed-off-by: CHLin <CHLIN56@nuvoton.com>
Reviewed-on: https://chromium-review.googlesource.com/873510
Commit-Ready: CH Lin <chlin56@nuvoton.com>
Tested-by: CH Lin <chlin56@nuvoton.com>
Reviewed-by: Randall Spangler <rspangler@chromium.org>
Reviewed-by: Shawn N <shawnn@chromium.org>
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In this CL, we add the follow changes for npcx7 evb board:
1. Add comments in the build.mk to indicate how to set
CHIP_VARIANT for EVBs which use different npcx7 ec.
- npcx7m6f : 144 pins (default)
- npcx7m6g : 128 pins
2. Turn on the eSPI host interface as default in board.h
BRANCH=none
BUG=none
TEST=No build errors for "make buildall".
Change-Id: Ib926e8596a09a28f547c35a0256be2aa394f9a36
Signed-off-by: CHLin <CHLIN56@nuvoton.com>
Reviewed-on: https://chromium-review.googlesource.com/674887
Commit-Ready: CH Lin <chlin56@nuvoton.com>
Tested-by: CH Lin <chlin56@nuvoton.com>
Reviewed-by: Randall Spangler <rspangler@chromium.org>
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Add the evaluation board driver of npcx7 series ec for testing. If you
received the evb which ec is 128-pins package, please notice it has
the following limitations.
a. No GPIOD7/E0 pins.
b. No I2C4_0, I2C4_1, I2C5_1 and I2C6_1 ports.
c. No ADC7, ADC8 and ADC9 channels.
d. No JTAG port 1.
e. Do not enable CONFIG_HIBERNATE_PSL since no PSL circuit on evb.
This CL also includes:
1. Modified reset config from srst to sysresetreq in openocd/npcx.cfg.
Make sure openocd driver can reset ec by using NVIC_SYSRESETREQ.
2. Add flash utilities for npcx7 ec in openocd/npcx_cmds.tcl.
3. Add npcx7_evb support in flash_ec.
BRANCH=none
BUG=none
TEST=Passed all npcx7 drivers verification on the evb no matter which
ec's package is 128 or 144 pins package.
Change-Id: I8224d97cd66ce483d70816f47b2e124308f1b69c
Signed-off-by: Mulin Chao <mlchao@nuvoton.com>
Reviewed-on: https://chromium-review.googlesource.com/505832
Reviewed-by: Randall Spangler <rspangler@chromium.org>
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