summaryrefslogtreecommitdiff
path: root/board/oak/board.h
Commit message (Collapse)AuthorAgeFilesLines
* Oak: Free up flash spaceDiana Z2021-08-051-0/+1
| | | | | | | | | | | | | | | Oak is down to less than 100 bytes of free flash on ToT. Enable brief debug asserts to bring it up to about 1.5k free. BRANCH=None BUG=None TEST=make -j buildall Signed-off-by: Diana Z <dzigterman@chromium.org> Change-Id: I7e005741d3fbf7f5c1b3dc4b09359572aad7c325 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3072869 Reviewed-by: Aseda Aboagye <aaboagye@chromium.org> Commit-Queue: Aseda Aboagye <aaboagye@chromium.org>
* DP Altmode DFP: Add `mfallow` commandudaykiran2021-07-021-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | The USB Type-C Altmode allows for protocols other than USB to be transferred over a USB connection. Chromebooks use this functionality to transfer DisplayPort on USB signals. This is achieved through USB-PD handshake through SVDMs to discover, configure, and to enter or exit Alt modes. When DisplayPort as an Alt Mode is enabled, allowable functionalities are: -- SS and high speed USB functionality and two-lane DP. -- HS USB functionality and 4-lane DP. Chromebooks honor Multifunction bit set in the DPStatus message sent by a dock. However, for development purposes we would like to have control to honor the MF bit or ignore it, there by achieving 2-lane DP vs 4-lane DP functionality. 4-lane DP functionality is required to test higher resolution monitors such as 4k60. BUG=b:181365633 BRANCH=none TEST=make BOARD, tested on G5 dock with kindred. Signed-off-by: udaykiran <udaykiran@google.com> Change-Id: Icc25f339a78d1423b094d2acf9d586721ec2df46 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2939383 Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
* Oak: Free flash spaceDiana Z2021-06-051-0/+3
| | | | | | | | | | | | | | Remove the PD state strings in order to free up flash space for oak. BRANCH=None BUG=None TEST=make -j buildall; observe oak reports over 1.5k free flash Signed-off-by: Diana Z <dzigterman@chromium.org> Change-Id: I25b75fcad9dec5e77b1e83350c59dccc7ce98a93 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2941896 Reviewed-by: Aseda Aboagye <aaboagye@chromium.org> Commit-Queue: Aseda Aboagye <aaboagye@chromium.org>
* COIL: Rename CONFIG_SPI_MASTER to CONFIG_SPI_CONTROLLERCaveh Jalali2021-06-031-1/+1
| | | | | | | | | | | | | | | | This replaces the CONFIG_SPI_MASTERR config option with CONFIG_SPI_CONTROLLER. BRANCH=none BUG=b:181607131 TEST=make buildall passes; "compare_build.sh -b all" shows no difference Change-Id: I3c921085179294765baadf7074652978fe04a4ed Signed-off-by: Caveh Jalali <caveh@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2932465 Reviewed-by: Craig Hesling <hesling@chromium.org> Commit-Queue: Craig Hesling <hesling@chromium.org>
* oak: Disable AMON BMON console command to save spaceVijay Hiremath2021-05-261-1/+0
| | | | | | | | | | | | | | | | | BUG=none BRANCH=none TEST=make BOARD=oak -j Before: 24 bytes in flash and 11760 bytes in RAM still available on oak RO 12716 bytes in flash and 11760 bytes in RAM still available on oak RW After: 408 bytes in flash and 11760 bytes in RAM still available on oak RO 13052 bytes in flash and 11760 bytes in RAM still available on oak RW Change-Id: Ib14376020e06e54b679ba5b6af853b219b0c0c3d Signed-off-by: Vijay Hiremath <vijay.p.hiremath@intel.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2920792 Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
* config: Provide default VCONN Swap delayAbe Levkoy2021-01-221-1/+0
| | | | | | | | | | | | | | | | | Almost every relevant board copy-pastes 5000 us. Make that the default and get rid of the redundant definitions. This is the approximate result of this command: find . -type f -name *.h | xargs sed -i -E \ '/#define CONFIG_USBC_VCONN_SWAP_DELAY_US[[:space:]]+5000[[:space:]]/d' BUG=b:144165680 TEST=make buildall BRANCH=none Change-Id: Ife86f9752971abcd7ab5ad5a5e607eb2ccbde2ba Signed-off-by: Abe Levkoy <alevkoy@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2628132 Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
* config: Make VCONN Swap delay a documented optionAbe Levkoy2021-01-221-1/+1
| | | | | | | | | | | | | | | | | | | | | Replace PD_VCONN_SWAP_DELAY with CONFIG_USBC_VCONN_SWAP_DELAY_US. This is the approximate result of the following command, run from platform/ec: find . -type f -\( -name '*.c' -o -name '*.h' -\) | \ xargs sed -iE 's/PD_VCONN_SWAP_DELAY/CONFIG_USBC_VCONN_SWAP_DELAY/g' Fix some latent formatting errors in usb_pd_protocol.c, because they were preventing pre-upload hooks from passing. BUG=b:144165680 TEST=make buildall BRANCH=none Signed-off-by: Abe Levkoy <alevkoy@chromium.org> Change-Id: Icaf3b309c08fdcd162e960cf5dc88185016b5d2d Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2628131 Reviewed-by: Aseda Aboagye <aaboagye@chromium.org> Commit-Queue: Aseda Aboagye <aaboagye@chromium.org>
* COIL: Rename CONFIG_I2C_CONTROLLERDiana Z2020-11-051-1/+1
| | | | | | | | | | | | | Rename CONFIG_I2C_CONTROLLER and related comments. BRANCH=None BUG=None TEST=make -j buildall Signed-off-by: Diana Z <dzigterman@chromium.org> Change-Id: Ied6a1829bf54a5c9a32e6772982a4b8aa31aaf23 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2518659 Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org>
* TCPMV1/2: Make the PD Config Flags more consistentSam Hurst2020-02-221-0/+1
| | | | | | | | | | | | | | | | | | | | The current use of the PD Config Flags are a bit confusing and has been changed to the following: The CONFIG_USB_POWER_DELIVERY flag is used to enable and disable the TCPMv1 and TCPMv2 stacks. And when CONFIG_USB_POWER_DELIVERY is enabled, one of the following must be enabled: CONFIG_USB_PD_TCPMV1 - legacy power delivery state machine CONFIG_USB_PD_TCPMV2 - current power delivery state machine BUG=b:149993808 BRANCH=none TEST=make -j buildall Change-Id: Ie3f8615a75b15b4f1c703f57f3db9e152a471238 Signed-off-by: Sam Hurst <shurst@google.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2068519 Reviewed-by: Diana Z <dzigterman@chromium.org>
* oak: enable link time optimizationKeith Short2020-01-301-0/+2
| | | | | | | | | | | | | | | | Oak board exceeds RO code size limit after changes in the TCPM stack. Enable LTO to save over 6 KiB of RO flash space. This also fixes the vbus_task() prototype which was caught by the -Wlto-type-mismatch warning. BUG=b:140819518 BRANCH=none TEST=make buildall Change-Id: I45ac0dc5e6e349281c49223453e9f6760cca6523 Signed-off-by: Keith Short <keithshort@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2029027 Reviewed-by: Diana Z <dzigterman@chromium.org>
* Rename CONFIG_USB_PD_PORT_COUNT as CONFIG_USB_PD_PORT_MAX_COUNTKarthikeyan Ramasubramanian2019-11-011-1/+1
| | | | | | | | | | | | | | | | | Certain SKUs of certain boards have lesser number of USB PD ports than defined by CONFIG_USB_PD_PORT_COUNT. Hence rename CONFIG_USB_PD_PORT_COUNT as CONFIG_USB_PD_PORT_MAX_COUNT. BUG=b:140816510, b:143196487 BRANCH=octopus TEST=make -j buildall; Boot to ChromeOS Change-Id: I7c33b27150730a1a3b5813b7b4a72fd24ab73c6a Signed-off-by: Karthikeyan Ramasubramanian <kramasub@google.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1879337 Tested-by: Karthikeyan Ramasubramanian <kramasub@chromium.org> Reviewed-by: Jett Rink <jettrink@chromium.org> Commit-Queue: Jett Rink <jettrink@chromium.org>
* config: Merge CONFIG_CHARGER_V2 into CONFIG_CHARGERKeith Short2019-09-181-1/+0
| | | | | | | | | | | | | | | | For all boards that defined CONFIG_CHARGER, CONFIG_CHARGER_V2 is also defined. Remove references to CONFIG_CHARGER_V2 from board header files. Replace CONFIG_CHARGER_V2 in common C modules with CONFIG_CHARGER when appropriate. BUG=b:139699769 BRANCH=none TEST=make buildall -j Change-Id: I6b54baf4ad2406bbed629b6b272dad9ea6a81280 Signed-off-by: Keith Short <keithshort@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1789420 Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org>
* Remove __7b, __8b and __7bfDenis Brockus2019-07-201-1/+1
| | | | | | | | | | | | | | | | | | | The extentions were added to make the compiler perform most of the verification that the conversion was being done correctly to remove 8bit addressing as the standard I2C/SPI address type. Now that the compiler has verified the code, the extra extentions are being removed BUG=chromium:971296 BRANCH=none TEST=make buildall -j TEST=verify sensor functionality on arcada_ish Change-Id: I36894f8bb9daefb5b31b5e91577708f6f9af2a4f Signed-off-by: Denis Brockus <dbrockus@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1704792 Reviewed-by: Jack Rosenthal <jrosenth@chromium.org>
* Use 7bit I2C/SPI slave addresses in ECDenis Brockus2019-07-191-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Opt for 7bit slave addresses in EC code. If 8bit is expected by a driver, make it local and show this in the naming. Use __7b, __7bf and __8b as name extensions for i2c/spi addresses used in the EC codebase. __7b indicates a 7bit address by itself. __7bf indicates a 7bit address with optional flags attached. __8b indicates a 8bit address by itself. Allow space for 10bit addresses, even though this is not currently being used by any of our attached devices. These extensions are for verification purposes only and will be removed in the last pass of this ticket. I want to make sure the variable names reflect the type to help eliminate future 7/8/7-flags confusion. BUG=chromium:971296 BRANCH=none TEST=make buildall -j Change-Id: I2fc3d1b52ce76184492b2aaff3060f486ca45f45 Signed-off-by: Denis Brockus <dbrockus@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1699893 Reviewed-by: Jack Rosenthal <jrosenth@chromium.org>
* cleanup: Rename CONFIG_MKBP_WAKEUP_MASK for clarity.Aseda Aboagye2019-07-021-2/+2
| | | | | | | | | | | | | | | | | | | | | | CONFIG_MKBP_WAKEUP_MASK is a bit confusing and is wrongly named. The comment stated that "With this option, we can define the MKBP wakeup events in this mask (as a white list) in board level, those evets allow to interrupt AP during S3.". However, these events are NOT MKBP events at all but are instead host events. This commit tries to clear things up by renaming CONFIG_MKBP_WAKEUP_MASK to CONFIG_MKBP_HOST_EVENT_WAKEUP_MASK to better show that these events are in fact host events. BUG=b:136282898 BRANCH=None TEST=`make -j buildall` Change-Id: I42beadec8217435fd30e679ccf52d784a8ef99a0 Signed-off-by: Aseda Aboagye <aaboagye@google.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1685784 Tested-by: Aseda Aboagye <aaboagye@chromium.org> Reviewed-by: Alexandru M Stan <amstan@chromium.org> Commit-Queue: Aseda Aboagye <aaboagye@chromium.org>
* common: motion_sense: Require CONFIG_MOTION_SENSOR_MAX_COUNTYuval Peress2019-06-051-2/+13
| | | | | | | | | | | | | | | This changes requires all boards to define the maximum number of sensors they support. This will allow us to later create static arrays with the appropriate length. BUG=chromium:966506 BRANCH=None TEST=make buildall Change-Id: I5a2fa8f0fdcaef69065dfd4c2bfea4e3f371e986 Signed-off-by: Yuval Peress <peress@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1637414 Reviewed-by: Jett Rink <jettrink@chromium.org>
* mkbp_event,include/config.h: Clarify MKBP delivery method.Yilun Lin2019-03-071-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Now we have two MKBP delivery methods: 1. define CONFIG_MKBP_USE_HOST_EVENT to notify via host event 2. undef CONFIG_MKBP_USE_HOST_EVENT to notify via GPIO interrupt It may become more complicated if new notification methods introduced. e.g.: mt_scp uses IPI, rather than host event and GPIO interrupt. This CL does: 1. add CONFIG_MKBP_USE_GPIO to explicilty declare that MKBP event are sent via GPIO interrupt. 2. CONFIG_MKBP_USE_CUSTOM for boards which have custmized methods. 3. Remove weak attribute in mkbp_set_host_active (which can be done with CONFIG_MKBP_USE_CUSTOM now. 4. Removes mkbp_set_host_active function in board Nocturne. It only deliver MKBP events through GPIO interrupt now. BRANCH=None BUG=b:120808999 TEST=grep -rn "CONFIG_MKBP_USE_GPIO\|EC_INT_L" board/ baseboard/ and see the result is reasonable: 1. EC_INT_L must be 1-to-1 mapped to define CONFIG_MKBP_USE_GPIO in every board, except that meep, yorp, ampton which are defined in baseboard octopus. 2. undef CONFIG_MKBP_USE_GPIO in bip and casta, which use host event, but also have baseboard octopus. Change-Id: I4af6110e4fd3c009968075c3623ef2d91cbd770b Signed-off-by: Yilun Lin <yllin@google.com> Reviewed-on: https://chromium-review.googlesource.com/1490794 Commit-Ready: Jett Rink <jettrink@chromium.org> Tested-by: Yilun Lin <yllin@chromium.org> Reviewed-by: Furquan Shaikh <furquan@chromium.org> Reviewed-by: Jett Rink <jettrink@chromium.org>
* power: Rename mediatek to mt817xNicolas Boichat2018-06-071-1/+1
| | | | | | | | | | | BRANCH=none BUG=b:109850749 TEST=make buildall -j Change-Id: I69538a210f9b2198614720537faa3ee75bc0600e Signed-off-by: Nicolas Boichat <drinkcat@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/1090522 Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
* system: update board version to return an error if encounteredJett Rink2018-04-191-1/+1
| | | | | | | | | | | | | | | | | | | | Now that board version can come from CBI, we can have a real error reading it. We should pass that error to the console or to the AP on the host command and let the AP firmware (or user) decided how to handle that error case Also update the CONFIG_BOARD_VERSION to be derived instead of needed in most cases. BRANCH=none BUG=b:77972120 TEST=Error reported on EC console and AP console when CBI is invalid on yorp Change-Id: Ib8d80f610ea226265a61e68b61965150cdc9bb04 Signed-off-by: Jett Rink <jettrink@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/1015776 Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
* cleanup: CONFIG_USB_PD_CUSTOM_VDM is not usedDivya Sasidharan2018-04-091-1/+0
| | | | | | | | | | | | | | | | | | | The pd_custom_vdm is called in common/usb_pd_protocol no matter you have this defined or not. No where else I see pd_vdm being used. So we should not have to deal with this CONFIG_USB_PD_CUSTOM_VDM. BUG=None BRANCH=None TEST=make buildall -j Change-Id: I4e8b710240ee27b12625d797e7824f29044e6462 Signed-off-by: Divya Sasidharan <divya.s.sasidharan@intel.com> Reviewed-on: https://chromium-review.googlesource.com/998520 Commit-Ready: Divya S Sasidharan <divya.s.sasidharan@intel.com> Tested-by: Divya S Sasidharan <divya.s.sasidharan@intel.com> Reviewed-by: Vijay P Hiremath <vijay.p.hiremath@intel.com> Reviewed-by: Jett Rink <jettrink@chromium.org>
* driver/charger/isl923x: Make sure CONFIG_CHARGER_NARROW_VDC is setNicolas Boichat2018-01-101-1/+0
| | | | | | | | | | | | | | | | | | Without this, the battery will discharge if we disallow battery charging (e.g. calling charge_request with either voltage == 0 or current == 0, either by policy, or when the battery is full). Also update config.h to set the option whenever isl923x is used. BRANCH=none BUG=b:66575472 BUG=b:35585464 TEST=make buildall -j Change-Id: Id5515d5ea82a393a3693a3da44cbdc2778296a95 Signed-off-by: Nicolas Boichat <drinkcat@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/856538 Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
* pd_log: Make PD logging more generic for general purpose loggingShawn Nematbakhsh2017-08-021-1/+0
| | | | | | | | | | | | | | | | | | We can re-use our pd_log FIFO for other purposes, such as TPM logging. Carve out event_log, a generic logging module which pd_log is compatible with. BUG=b:63760920 TEST=On kevin, verify PD logging is still functional and entries are seen in dmesg. BRANCH=None Change-Id: I8e6ad6f93e9eebc676aca64652c60f81da471a94 Signed-off-by: Shawn Nematbakhsh <shawnn@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/597314 Commit-Ready: Shawn N <shawnn@chromium.org> Tested-by: Shawn N <shawnn@chromium.org> Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
* driver: Move PI3USB9281 to bc12 directory.Aseda Aboagye2017-07-311-2/+2
| | | | | | | | | | | | | | | | | | | | The primary purpose of the Pericom PI3USB9281 is for BC1.2 detection. Therefore, move the driver to the bc12/ directory. Additonally, rename the config option to match. CONFIG_USB_SWITCH_PI3USB9281 => CONFIG_BC12_DETECT_PI3USB9281 BUG=None BRANCH=None TEST=`make -j buildall` Change-Id: I02f17064c0625e62d6779f895e69899c24898f74 Signed-off-by: Aseda Aboagye <aaboagye@google.com> Reviewed-on: https://chromium-review.googlesource.com/594710 Commit-Ready: Aseda Aboagye <aaboagye@chromium.org> Tested-by: Aseda Aboagye <aaboagye@chromium.org> Reviewed-by: Shawn N <shawnn@chromium.org>
* pd: Move PD_DEFAULT_STATE to a common define in usb_pd.hScott2017-01-261-3/+0
| | | | | | | | | | | | | | | | | | | | | | | | Servo_v4 requires the ability to have a different default state per port. In previous devices, the assumption was that each supported port had the same default usb pd state and power role. This CL moves the by the default power role which in turn is derived from CONFIG_USB_PD_DUAL_ROLE. In addiiton to moving the location, it now uses 'port' as argument so it can be port specific if required. PD_DEFAULT_STATE was a board.h specific config, but in practice each instance used to date was set to PD_STATE_SNK_DISCONNECTED if CONFIG_USB_PD_DUAL_ROLE was defined and set to PD_STATE_SRC_DISCONNECTED otherwise. BUG=chrome-os-partner:61878 BRANCH=servo TEST=Manual run 'make -j buildall' to verify that all instances of PD_DEFAULT_STATE were removed. Change-Id: Iaf40718668732f525485ed7942ee7fc246d3f75d Signed-off-by: Scott <scollyer@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/431787 Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
* als: Define CONFIG_ALS when HAS_TASK_ALS is present.Gwendal Grignou2016-12-281-5/+4
| | | | | | | | | | | | | | For oak, set a different list of task (no als, no accel) for compiling revision 4 or less. Fix GPIO include issue. BUG=chrome-os-partner:59423,chrome-os-partner:59084 TEST=compile for oak with board 4 and 5, tested on Reef. BRANCH=kevin,reef Change-Id: I09051a69cbad6d477a7b3bf9907f4c5c144b5136 Signed-off-by: Gwendal Grignou <gwendal@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/424220 Reviewed-by: Randall Spangler <rspangler@chromium.org>
* elm / kevin / oak: Don't wake from S3 on lid closeShawn Nematbakhsh2016-11-051-2/+1
| | | | | | | | | | | | | | | BUG=chrome-os-partner:59256 BRANCH=gru TEST=None Change-Id: I8e41dc131343e7639850364db27a3ff926164fba Signed-off-by: Shawn Nematbakhsh <shawnn@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/407078 Commit-Ready: Shawn N <shawnn@chromium.org> Tested-by: Shawn N <shawnn@chromium.org> Reviewed-by: Aseda Aboagye <aaboagye@chromium.org> Reviewed-by: Nicolas Boichat <drinkcat@chromium.org> Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
* Use CONFIG_DPTF flag instead of THROTTLE_AP.Ravi Chandra Sadineni2016-07-301-1/+1
| | | | | | | | | | | | | | | | | Signed-off-by: Ravi Chandra Sadineni <ravisadineni@chromium.org> BRANCH=none BUG=chromium:631848 TEST=make buildall -j CQ-DEPEND=CL:363008 Change-Id: I3c35f5ab2e3a1537ac6e8c750171d5c2b3a6570f Reviewed-on: https://chromium-review.googlesource.com/363583 Commit-Ready: David Hendricks <dhendrix@chromium.org> Tested-by: David Hendricks <dhendrix@chromium.org> Reviewed-by: David Hendricks <dhendrix@chromium.org> Reviewed-by: Randall Spangler <rspangler@chromium.org> Reviewed-by: Duncan Laurie <dlaurie@google.com>
* common: Decouple temp sensor from thermal throttlingMary Ruthven2016-06-281-0/+1
| | | | | | | | | | | | | | | Not everything with a temperature sensor uses thermal throttling. This change modifies the conditional build to enable building temp sensor source without thermal throttling. BUG=none BRANCH=none TEST=make buildall -j Change-Id: I8c0753f12899e9f203c04477ae520bcda40d5fd8 Signed-off-by: Mary Ruthven <mruthven@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/356484 Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
* BD99955: Added support for 'psys' & 'amonbmon' console commandsVijay Hiremath2016-06-271-1/+2
| | | | | | | | | | | | | | | | | | | | Added console commands for the debugging purpose psys - Can be used to measure the system power amonbmon - Can be used to measure AMON/BMON voltage diff, current BUG=chrome-os-partner:54273 BRANCH=none TEST=Manually tested on Amenia psys - Ran fish task and observed psys value changes. amonbmon - AMON & BMON voltage & current are same as measured across sense resistors. Change-Id: I6653e814d9b00efe7dae9ce1fbd7ddbc2356f8e0 Signed-off-by: Vijay Hiremath <vijay.p.hiremath@intel.com> Reviewed-on: https://chromium-review.googlesource.com/353043 Commit-Ready: Vijay P Hiremath <vijay.p.hiremath@intel.com> Tested-by: Vijay P Hiremath <vijay.p.hiremath@intel.com> Reviewed-by: Shawn N <shawnn@chromium.org>
* cleanup: pd: Define VBUS detection sourceShawn Nematbakhsh2016-06-021-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Previously CONFIG_USB_PD_TCPM_VBUS had two uses which were independent: - When operating as a TCPC, it indicated that the VBUS level should be tracked (through GPIO inputs) and sent to the external TCPM when appropriate. - When operating as a TCPM, it indicated that the VBUS level should be obtained by querying the TCPC. These two independent uses have been split into CONFIG_USB_PD_TCPC_TRACK_VBUS and CONFIG_USB_PD_VBUS_DETECT_TCPC, which sould be more clear. In addition, CONFIG_USB_PD_VBUS_DETECT_* CONFIGs have been added for other means of VBUS detection. BUG=chromium:616580 BRANCH=None TEST=Verify kevin continues to boot + charge. Signed-off-by: Shawn Nematbakhsh <shawnn@chromium.org> Change-Id: I936821481d6577e17e3e9c61ff97c037574d6923 Reviewed-on: https://chromium-review.googlesource.com/348950 Commit-Ready: Shawn N <shawnn@chromium.org> Tested-by: Shawn N <shawnn@chromium.org> Reviewed-by: Shawn N <shawnn@chromium.org>
* Deferred: Remove hard coded number of deferredsAnton Staaf2016-04-191-3/+0
| | | | | | | | | | | | | | | | | | | | | | | | Previously the maximum number of deferred routines was specified by the the default maximum number of deferred routines you had to override this, and if you wanted fewer, you still payed the price of having the defer_until array statically allocated to be the maximum size. This change removes that define and instead creates the RAM state of the deferred routine (the time to wait until to call the deferred) when the deferred is declared. Signed-off-by: Anton Staaf <robotboy@chromium.org> BRANCH=None BUG=None TEST=make buildall -j manually test on discovery-stm32f072 Change-Id: Id3db84ee1795226b7818c57f68c1f637567831dc Reviewed-on: https://chromium-review.googlesource.com/335597 Commit-Ready: Anton Staaf <robotboy@chromium.org> Tested-by: Anton Staaf <robotboy@chromium.org> Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
* charge_manager: Report UNKNOWN USB charger for 2 seconds after changeShawn Nematbakhsh2016-04-031-1/+1
| | | | | | | | | | | | | | | | | | | After a charger is attached, we may set a charge limit based upon BC1.2 or USB-C Rp before PD negotiation completes. Therefore, allow 2 seconds for all negotiation to complete. Previously this behavior was implicit when using SW charge ramp. BUG=chrome-os-partner:51280 BRANCH=glados TEST=Manual on chell. Insert stock charger, verify that it is detected as TYPE_UNKNOWN until timeout. Signed-off-by: Shawn Nematbakhsh <shawnn@chromium.org> Change-Id: I52f02de46fa92b66a9fbaddb94a062310688f028 Reviewed-on: https://chromium-review.googlesource.com/334312 Commit-Ready: Shawn N <shawnn@chromium.org> Tested-by: Shawn N <shawnn@chromium.org> Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
* oak: allow charging of dead battery requesting nilstabilize-8104.BYH Huang2016-03-231-0/+1
| | | | | | | | | | | | | | | | | | | | | | | On oak battery, when the battery is dead it reports 0 for desired voltage, current, and state of charge. In this case we should allow charging. Added a CONFIG option for this that should be removed as soon as the battery side is fixed. With this CL, when a dead oak battery is used and a charger is connected, we attempt to charge it. BUG=chrome-os-partner:51454 BRANCH=none TEST=test on an oak with a dead battery. w/o this CL, the battery never charges because the charging not allowed flag is set. With this CL, the battery charges. Change-Id: If9f1250cd41aec265838e1d109f53c1bcd58c111 Signed-off-by: YH Huang <yh.huang@mediatek.com> Reviewed-on: https://chromium-review.googlesource.com/334471 Reviewed-by: Rong Chang <rongchang@chromium.org>
* oak: Clean up CONFIG_PMIC_FW_LONG_PRESS_TIMER related codesKoro Chen2016-03-161-1/+0
| | | | | | | | | | | | | | | | | | | | | CONFIG_PMIC_FW_LONG_PRESS_TIMER was ported long time ago from Tegra, but the codes are actually not used and erroneous. It might wrongly trigger set_pmic_pwron(0), and turn off PMIC power accidentally. This causes POWER_GOOD lost and power state will go back to S5 during boot up. Clean up the codes by referencing check_for_power_off_event() of Rockchip. BRANCH=none BUG=none TEST=bootup and press power button quickly right after we are in S0. Bootup should still complete normally. Change-Id: Ie034efa3575dbebae4debb1afc206fddd9116350 Signed-off-by: Koro Chen <koro.chen@mediatek.com> Reviewed-on: https://chromium-review.googlesource.com/332724 Reviewed-by: Rong Chang <rongchang@chromium.org>
* oak: fix issues on building oak rev1-4 ECRong Chang2016-03-031-1/+1
| | | | | | | | | | | | | | | | | | | The default target hardware is rev5. This is a maintainess change for old and deprecated HW. BRANCH=none BUG=chrome-os-partner:49114 BUG=chrome-os-partner:50720 TEST=manual for N=1,5 do make BOARD=oak clean && make BOARD=oak EXTRA_CFLAGS="-DBOARD_REV=$N" -j Signed-off-by: Rong chang <rongchang@chromium.org> Change-Id: Ibb4ebf9fab429964ace7c3e548598f0fb08e7dea Reviewed-on: https://chromium-review.googlesource.com/330065 Commit-Ready: Rong Chang <rongchang@chromium.org> Tested-by: Rong Chang <rongchang@chromium.org> Reviewed-by: Wei-Ning Huang <wnhuang@chromium.org>
* oak: enable lid angle updateRong Chang2016-03-021-0/+1
| | | | | | | | | | | | | | | | | This change enables lid angle update that turns off keyboard scan in tablet mode. BRANCH=none BUG=chrome-os-partner:49114 TEST=make BOARD=oak runtests make BOARD=oak -j && make BOARD=oak_pd -j load on oak and boot to vt2 console. flip lid to disable range, type keyboard and check. Signed-off-by: Rong Chang <rongchang@chromium.org> Change-Id: Ibd2f0d6ae33a95380c9fc52a7568166a04c119e9 Reviewed-on: https://chromium-review.googlesource.com/328884 Reviewed-by: Wei-Ning Huang <wnhuang@chromium.org>
* oak: updates for rev5Ben Lok2016-03-011-0/+3
| | | | | | | | | | | | | | | | | | | 1. Muxer of USB C1 port changes to Parade PS8740. 2. Add control of DP switch TS3USB3000RSER, using for switch DP to port 0/1 (same as rev2). 3. LED control logic is same as rev2. 4. Updates GPIO setting for rev5 pinouts. BUG=chrome-os-partner:49375 BRANCH=none TEST=build -j buildall tests Change-Id: Ifc45ac30be8d46caa1cdb032ccce7569e5a14b99 Signed-off-by: Ben Lok <ben.lok@mediatek.com> Reviewed-on: https://chromium-review.googlesource.com/321024 Commit-Ready: Rong Chang <rongchang@chromium.org> Tested-by: Rong Chang <rongchang@chromium.org> Reviewed-by: Rong Chang <rongchang@chromium.org>
* oak: Add base accel & gyro via SPI bus for rev5Ben Lok2016-03-011-1/+16
| | | | | | | | | | | | | | | | | | | | | | | | refer to commit d341615383f1ea5d3a540a67bcec777ba902bdfb, adds the base accelerometer as well as the gyroscope to the list of motion sensors on the board, connect with SPI bus. They are currently wrapped behind an ifdef for HAS_TASK_MOTIONSENSE and OAK_REV5. BUG=chrome-os-partner:50312 BRANCH=none TEST=Build Oak EC with driver enabled and verify that we can calcuate a valid lid angle. TEST=Verify that signs of accelerometer conform to those shown in the Chrome/Android/HTML5 doc/spec. See description in accelerometer_types.h TEST=Verify that signs of gyroscope conform to those shown in the "Sysfs interface to EC accelerometers" document. TEST=make buildall tests Change-Id: I4d900bc6bd7329db6ea53660fae86e5e2bbe9028 Signed-off-by: Ben Lok <ben.lok@mediatek.com> Reviewed-on: https://chromium-review.googlesource.com/319295 Commit-Ready: Rong Chang <rongchang@chromium.org> Tested-by: Rong Chang <rongchang@chromium.org> Reviewed-by: Rong Chang <rongchang@chromium.org>
* oak: Add kx022 lid accelerometer for rev5.Ben Lok2016-03-011-4/+6
| | | | | | | | | | | | | | | | | | | | | | refer to commit 574c8065710432f5a91fd8dd11d1fa28e2be1f3b, adds the lid accelerometer to the list of motion sensors on the rev5. Since commit bc404c94b4ab1e6a62e607fd7ef034aa31d6388e, math_util.c is no longer to include "math.h" header file. BUG=chrome-os-partner:50312 BRANCH=none TEST=Build Oak EC with driver enabled and verify that valid accelerometer data is read, and that range, resolution, and odr can all be modified. TEST=Verified that signs of accelerometer data conform to those shown in the doc. TEST=make buildall tests Change-Id: I8df1b2331a1fbea82015b97985541e2ebc393d10 Signed-off-by: Ben Lok <ben.lok@mediatek.com> Reviewed-on: https://chromium-review.googlesource.com/319332 Commit-Ready: Rong Chang <rongchang@chromium.org> Reviewed-by: Rong Chang <rongchang@chromium.org>
* oak: Enable TI OPT3001 ambient light sensor for rev5Ben Lok2016-02-261-0/+17
| | | | | | | | | | | | Refer to commit 3f2dc44158630f0ce93633c21df8daaddb2b7324, enable light sensor driver for oak rev5 BUG=chrome-os-partner:50312 Change-Id: I896cf99fd781f5d4d8dad206d43f5a3d8faeb9a2 Signed-off-by: Ben Lok <ben.lok@mediatek.com> Reviewed-on: https://chromium-review.googlesource.com/319271 Reviewed-by: Rong Chang <rongchang@chromium.org>
* oak: enable HW charge rampingBen Lok2015-12-011-0/+1
| | | | | | | | | | | | | | | refer to commit 75f740fa, enabling the option on oak too. BUG=none BRANCH=none TEST=plug in CDP, SDP, DCP, type-C, and PD charger. Make sure we ramp to a reasonable value for the correct suppliers. Make sure we don't ramp for type-C and PD chargers. Signed-off-by: Ben Lok <ben.lok@mediatek.com> Change-Id: I9c6a0726e9cb23af59d5841c63a81897ae624998 Reviewed-on: https://chromium-review.googlesource.com/314436 Reviewed-by: Alec Berg <alecaberg@chromium.org>
* oak: add VCONN swap abilityBen Lok2015-11-251-0/+4
| | | | | | | | | | | | | | refer to commit 776bedc3, enable VCONN swap option for oak. BUG=chrome-os-partner:41838 BRANCH=none TEST=test on oak. ask for vconn swap and make sure vconn swap is successful. Change-Id: I2afa68e073d088302c2c6ba2315a6c9f4551ef87 Signed-off-by: Ben Lok <ben.lok@mediatek.com> Reviewed-on: https://chromium-review.googlesource.com/313913 Reviewed-by: Alec Berg <alecaberg@chromium.org>
* chg: add narrow VDC power path supportRong Chang2015-11-051-0/+1
| | | | | | | | | | | | | | | | | | Under NVDC, BGATE natively has a body diode. Hence there's a discharging path if VSYS is lower than VBAT. This change keeps VSYS voltage when turning off charging. BRANCH=none BUG=chrome-os-partner:46698 TEST=manual make buildall -j load on boards with isl9237 charger. charge the battery to full, and check charging voltage and current. Change-Id: I8a6046444dd40a3b57f034be124b9e8fe281de40 Signed-off-by: Rong Chang <rongchang@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/309289 Reviewed-by: Alec Berg <alecaberg@chromium.org>
* oak: using only one standby mode wakeup source.Ben Lok2015-11-031-1/+5
| | | | | | | | | | | | | | | | | | | | | Before Oak rev4, it defines 2 wakeup source EC_WAKE(PA0), EC_PWR_BTN_L(PB5). Due to the wakeup source limitation of STM32F0 (http://goo.gl/VQk9GV), Oak can only use one wakeup source, because EC_PWR_BTN_L is low-active and it is kept high always. The HW & SW should be changed after rev4: Using PA0 as wakeup source only, instead of both (PA0 & PB5). BRANCH=none BUG=chrome-os-partner:46670 TEST=Manual on oak rev4 with HW rework. Detach PD power adapter, run 'hibernate' on EC console, make sure that both EC and PD go to hibernate, verify the following cases individually: 1. Press power button and verify that both EC and PD wake. 2. Plug PD power adapter and verfy that both EC and PD wake. Change-Id: Ief37aa1f11a84dd358875f22fa35c484b10bc388 Signed-off-by: Ben Lok <ben.lok@mediatek.com> Reviewed-on: https://chromium-review.googlesource.com/309246 Reviewed-by: Rong Chang <rongchang@chromium.org>
* cleanup: Standardize use of CONFIG_I2C and add MASTER/SLAVE CONFIGsShawn Nematbakhsh2015-11-031-0/+1
| | | | | | | | | | | | | | | | | | | Some chips previously defined CONFIG_I2C and others didn't. Standardize the usage by removing CONFIG_I2C from all config_chip files and force it to be defined at the board level. Also, make boards define CONFIG_I2C_MASTER and/or CONFIG_I2C_SLAVE based on the I2C interfaces they will use - this will assist with some later cleanup. BUG=chromium:550206 TEST=`make buildall -j` BRANCH=None Change-Id: I2f0970e494ea49611abc315587c7c9aa0bc2d14a Signed-off-by: Shawn Nematbakhsh <shawnn@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/310070 Commit-Ready: Shawn N <shawnn@chromium.org> Tested-by: Shawn N <shawnn@chromium.org> Reviewed-by: Alec Berg <alecaberg@chromium.org>
* glados: oak: chell: enable USB PD loggingAlec Berg2015-10-301-0/+2
| | | | | | | | | | | | | | | Enable USB PD logging. BUG=chrome-os-partner:45933 BRANCH=none TEST=make -j buildall make -j BOARD=glados tests Load on glados and test that PDLOG events show up in dmesg Change-Id: I61dbc5019ea3228542c2c244228bbb483cf51ead Signed-off-by: Alec Berg <alecaberg@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/309881 Reviewed-by: Duncan Laurie <dlaurie@chromium.org>
* glados: oak: reboot EC if PD MCU crashesAlec Berg2015-10-231-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | If PD MCU crashes, it will go back to RO code and stay there until the next AP boot. So, if EC detects PD has crashed, then EC should panic reboot with debug message that it detected a PD crash. PD MCU crash is detected by EC by seeing the PD MCU transition from RW to RO, without it setting the flag that it got there from a sysjump. This CL also makes minor changes to oak_pd and glados_pd board.c files to make them identical, other than the few minor real differences between them. BUG=none BRANCH=none TEST=tested on glados using pdcmd console command on EC to test sysjumps and reboots: sysjump to RW: pdcmd 0xd2 0 2 0 sysjump to RO: pdcmd 0xd2 0 1 0 cold reboot: pdcmd 0xd2 0 4 0 Verified that PD can jump back and forth between RO and RW without EC panicing. Verified that if PD MCU is in RW and reboots, then the EC will panic and print 'PD crash'. Verify if PD MCU reboots while in RO, without ever going to RW first, then EC does not panic. Change-Id: Id3191f4005e70a6c61a9322bf535b4374e85eb9a Signed-off-by: Alec Berg <alecaberg@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/308586 Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
* mkbp_event: prevent AC power change events to wakeup AP.Ben Lok2015-10-061-0/+9
| | | | | | | | | | | | | | | | | | It may use MKBP event to send PD power change events to AP via interrupt. According to the spec, AC power change events do not be allowed to wake up AP. In order to avoid it, define a white list in board level, only allow those events to wakeup the AP during S3 power state. BRANCH=none BUG=chrome-os-partner:45127 TEST=manual Plug PD power adapter to oak, if system is in S3/S5 and it should starts charging, but should not wake up system/AP at all. Change-Id: I2f86697d5d3bd24d7de840e21064b91e8841f0eb Signed-off-by: Ben Lok <ben.lok@mediatek.com> Reviewed-on: https://chromium-review.googlesource.com/300360 Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
* oak: shutdown tmp432 if AC isn't present in non-S0 stateBen Lok2015-09-071-1/+2
| | | | | | | | | | | | | | | | | | | | | | | To reduce the power consumption in non-S0 AP power state, Shut tmp432 down if external power isn't present. BRANCH=none BUG=chrome-os-partner:43118 TEST=manual 1. make BOARD=oak -j 2. shutdown AP by EC console command: > apshutdown 3. plug external power 4. check whether tmp432 is still running: > tmp432 5. unplug external power 6. check whether tmp432 is shutdown: > tmp432 Change-Id: I4726a18c8754dbe60070d878dff143c76d586dcc Signed-off-by: Ben Lok <ben.lok@mediatek.com> Reviewed-on: https://chromium-review.googlesource.com/295059 Reviewed-by: Shawn N <shawnn@chromium.org>
* oak: enable MBKP events for PD eventsBen Lok2015-08-311-1/+1
| | | | | | | | | | | | | | | | | | | (refer to CL:273620) enable the MKBP event feature to send host event and wire up the PD specific events. But, CONFIG_MKBP_EVENT conflicts with CONFIG_KEYBOARD_PROTOCOL_MKBP, due to the GPIO name of EC interrupt pin. Align the GPIO naming of EC interrupt pin to EC_INT_L. BRANCH=none BUG=chrome-os-partner:44643 TEST=On Oak rev3, plug/unplug USB devices and add kernel trace to see the PD events happening. Change-Id: I10de9c6611583bb6165bdc1848e542d4b8bba954 Signed-off-by: Ben Lok <ben.lok@mediatek.com> Reviewed-on: https://chromium-review.googlesource.com/296012 Reviewed-by: Vincent Palatin <vpalatin@chromium.org> Reviewed-by: Rong Chang <rongchang@chromium.org>
View Lorry Controller Status