| Commit message (Collapse) | Author | Age | Files | Lines |
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Make oak_pd a sym link to glados_pd. A few small changes
necessary to make this possible:
- glados_pd now sets the VBUS present power status bit as oak_pd
does and as is appropriate for TCPCI spec.
- oak_pd now has watchdog enabled (not sure why it was
previously disabled).
- add a flag in gpio.inc to define EC_INT pin on B5 for oak_pd
and A14 for glaods_pd (and all other boards pointing to
glados_pd). Note: this breaks oak board rev 1, where EC_INT was
on A14.
BUG=none
BRANCH=none
TEST=make -j buildall
Load on glados and make sure zinger works.
Change-Id: I28f4ee106e44e2819919f1826508fc1fc05bb2a1
Signed-off-by: Alec Berg <alecaberg@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/310193
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Some chips previously defined CONFIG_I2C and others didn't. Standardize
the usage by removing CONFIG_I2C from all config_chip files and force it
to be defined at the board level. Also, make boards define
CONFIG_I2C_MASTER and/or CONFIG_I2C_SLAVE based on the I2C interfaces
they will use - this will assist with some later cleanup.
BUG=chromium:550206
TEST=`make buildall -j`
BRANCH=None
Change-Id: I2f0970e494ea49611abc315587c7c9aa0bc2d14a
Signed-off-by: Shawn Nematbakhsh <shawnn@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/310070
Commit-Ready: Shawn N <shawnn@chromium.org>
Tested-by: Shawn N <shawnn@chromium.org>
Reviewed-by: Alec Berg <alecaberg@chromium.org>
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If PD MCU crashes, it will go back to RO code and stay there
until the next AP boot. So, if EC detects PD has crashed, then
EC should panic reboot with debug message that it detected
a PD crash.
PD MCU crash is detected by EC by seeing the PD MCU transition
from RW to RO, without it setting the flag that it got there
from a sysjump.
This CL also makes minor changes to oak_pd and glados_pd board.c
files to make them identical, other than the few minor real
differences between them.
BUG=none
BRANCH=none
TEST=tested on glados using pdcmd console command on EC to test
sysjumps and reboots:
sysjump to RW: pdcmd 0xd2 0 2 0
sysjump to RO: pdcmd 0xd2 0 1 0
cold reboot: pdcmd 0xd2 0 4 0
Verified that PD can jump back and forth between RO and RW
without EC panicing. Verified that if PD MCU is in RW and
reboots, then the EC will panic and print 'PD crash'. Verify
if PD MCU reboots while in RO, without ever going to RW first,
then EC does not panic.
Change-Id: Id3191f4005e70a6c61a9322bf535b4374e85eb9a
Signed-off-by: Alec Berg <alecaberg@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/308586
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
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Modify oak_pd to build a full RO and RW binary. Note
that in order to fit RO and RW into the small flash size,
this CL removes the console task and adds one-way debug
printfs to save space.
For debugging purposes, you add the console back in by
uncommenting the CONSOLE task in ec.tasklist. This will
build an RW image only that has a full console.
BUG=chrome-os-partner:41959
BRANCH=none
TEST=load on oak_pd and verify host commands from EC work
and charging with zinger works. also test that software sync
works.
Change-Id: I54f7263599684cab333c62796edf57837fe43469
Signed-off-by: Alec Berg <alecaberg@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/307032
Tested-by: Rong Chang <rongchang@chromium.org>
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
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Add CONFIG_I2C_SLAVE_ONLY for boards that only operate as a slave
on i2c.
BUG=chrome-os-partner:41959
BRANCH=none
TEST=make BOARD=glados_pd and see 2kB flash savings
Change-Id: I30831ce48b391d985c25e266229d5c6f2312042b
Signed-off-by: Alec Berg <alecaberg@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/306783
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
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- Enable low-power idle on oak_pd.
- Have oak_pd follow oak into hibernate. The wake pin on oak_pd will be
pulled down until oak wakes, which will generate a low-to-high pulse
at oak board_init().
TEST=Manual on oak. Run 'hibernate' on EC console, verify that both EC and
PD go to hibernate. Press power button and verify that both EC and PD wake.
BUG=chrome-os-partner:46073
BRANCH=None
Signed-off-by: Shawn Nematbakhsh <shawnn@chromium.org>
Change-Id: Ic33a71654ac46977ff01551d70f6a0dcc0d2b8c0
Reviewed-on: https://chromium-review.googlesource.com/303383
Commit-Ready: Shawn N <shawnn@chromium.org>
Tested-by: Shawn N <shawnn@chromium.org>
Reviewed-by: Shawn N <shawnn@chromium.org>
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On some systems, we may wish to have the PD follow the EC into
hibernate. Add a status field to EC_CMD_PD_EXCHANGE_STATUS to support
this.
BUG=chrome-os-partner:45010
TEST=Manual on glados with subsequent commit. Run 'hibernate' on EC
console, verify that both EC and PD go to hibernate. Plug zinger and
verify that both EC and PD wake, AP boots, and battery begins charging.
BRANCH=None
Change-Id: I0476bc8a47ffb0fe113dccda9d4f8074105c1c84
Signed-off-by: Shawn Nematbakhsh <shawnn@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/302712
Commit-Ready: Shawn N <shawnn@chromium.org>
Tested-by: Shawn N <shawnn@chromium.org>
Reviewed-by: Shawn N <shawnn@chromium.org>
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Since CONFIG_RO_SIZE and CONFIG_RW_SIZE now exist (which may
theoretically be different sizes), it is no longer useful to globally
define the size of an image.
BUG=chromium:535027
BRANCH=None
TEST=`make buildall -j`. Also, verify glados / glados_pd continue to
function as expected.
Signed-off-by: Shawn Nematbakhsh <shawnn@chromium.org>
Change-Id: Ie29959923bc5d02b4d7d6d507ff2191bcb7d24c8
Reviewed-on: https://chromium-review.googlesource.com/301743
Commit-Ready: Shawn N <shawnn@chromium.org>
Tested-by: Shawn N <shawnn@chromium.org>
Reviewed-by: Bill Richardson <wfrichar@chromium.org>
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Oak board revisions are not global configs. Move them out of
include/config.h . This change also makes it easier to build EC
and PD image for different board revisions.
BRANCH=none
BUG=none
TEST=manual
build for board revision n and load on oak:
make BOARD=oak clean
make BOARD=oak_pd claen
make EXTRA_CFLAGS=-DBOARD_REV=n BOARD=oak -j
make EXTRA_CFLAGS=-DBOARD_REV=n BOARD=oak_pd -j
Change-Id: I331b4c5a1af94b179d7c6f7878a9c3939ea6025a
Signed-off-by: Rong Chang <rongchang@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/294441
Reviewed-by: Shawn N <shawnn@chromium.org>
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Oak doesn't have enough interrupt pins to detect VBUS change. This CL
enables oak TCPM power status alert.
BRANCH=none
BUG=chrome-os-partner:41226
BUG=chrome-os-partner:42610
TEST=manual
load on oak rev2. plug in normal type-c charger or legacy type-c
chargers and check charging status.
Change-Id: I9659e749b515f999fe9e81373567f52ec3fe956a
Signed-off-by: Rong Chang <rongchang@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/291161
Reviewed-by: Shawn N <shawnn@chromium.org>
Reviewed-by: Alec Berg <alecaberg@chromium.org>
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There was a bug in this function where the bit for host_command was
being set in the ec_status variable. This caused the ALERT# GPIO
line to be held low which in turn caused the EC MCU to loop
and keep reading the ALERT register.
BUG=none
BRANCH=none
TEST=manual Tested against Zinger in both ports and Zinger and Samus
at connected into each port. Verified that it established a PD contract
for both ports and that the alert line was no longer being held low
Change-Id: I5540440a68581521eb002411f728a4eac2f22caf
Signed-off-by: Scott Collyer <scollyer@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/288252
Reviewed-by: Alec Berg <alecaberg@chromium.org>
Commit-Queue: Alec Berg <alecaberg@chromium.org>
Tested-by: Alec Berg <alecaberg@chromium.org>
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This commit introduces the build infrastructure changes needed for
creating a shared RO library. (libsharedobjs). The end goal is for the
library to contain various objects that can be shared with both the RO
and RW EC images.
Now, there are 3 make goals: ro, rw, and libsharedobjs.
In order for changes that are only specific to a single image (ie: RW
only) to be applied correctly, the object files are now built separately
for the RO, RW, shared objects library targets.
NOTE: Certain EC targets are incompatible with this model due to the
fact that only one image is present within flash at a time.
BRANCH=none
BUG=None
TEST=make -j buildall tests
TEST=make -j BOARD=cr50 xrefs
TEST=make BOARD=samus dis
TEST=Built samus EC image and compared that the final EC image was
identical to the upstream version (except for the git SHAs & version
strings).
CQ-DEPEND=CL:285934
Change-Id: I8e67f089710be9c6d7017718109262394bdad2f5
Signed-off-by: Aseda Aboagye <aaboagye@google.com>
Reviewed-on: https://chromium-review.googlesource.com/274079
Reviewed-by: Randall Spangler <rspangler@chromium.org>
Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
Tested-by: Aseda Aboagye <aaboagye@chromium.org>
Commit-Queue: Aseda Aboagye <aaboagye@chromium.org>
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Changed the alert function to hold the ec_int line until
all of the alert bits are cleared. Added support for the
alert_mask register. In addition, created ec_int_status
variable to distinguish which of 3 ec_int sources is
driving the pd_mcu_int line.
BUG=none
BRANCH=tot
TEST=Tested Zinger to Glados and Zinger to Samus and verified
that it established a power contract in both cases. Did not
test Oak, but put exact same changes in board.c as in glados.
Change-Id: I372e75b8fd5d66a0c01db18b46100b86fd9ac064
Signed-off-by: Scott Collyer <scollyer@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/278256
Reviewed-by: Alec Berg <alecaberg@chromium.org>
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This unifies all the EC header files to use __CROS_EC_FILENAME_H
as the include guard. Well, except for test/ util/ and extra/
which use __TEST_ __UTIL_ and __EXTRA_ prefixes respectively.
BUG=chromium:496895
BRANCH=none
TEST=make buildall -j
Signed-off-by: Bill Richardson <wfrichar@chromium.org>
Change-Id: Iea71b3a08bdec94a11239de810a2b2e152b15029
Reviewed-on: https://chromium-review.googlesource.com/278121
Reviewed-by: Randall Spangler <rspangler@chromium.org>
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Disabling CC TX_DATA needs to be very fast to avoid clocking out
an extra garbage bit at the end of transmit. This change fixes
pd_tx_disable() to disable the TX_DATA line as fast as possible.
BUG=chrome-os-partner:40920
BRANCH=none
TEST=test on glados with scope attached to CC. note before this
change we occasionally get a garbage bit at the end of CC transmit.
With this change, it looks clean.
Change-Id: I86b47881e3846b2e3dd4fc2afcf2d28386a068a6
Signed-off-by: Alec Berg <alecaberg@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/277295
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
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Per discussion in CL:274728, hardware revision numbers are integer. So
the previous rev1.5 becomes rev2. And the previous rev2 is now rev3.
BRANCH=none
BUG=none
TEST=none
Change-Id: Ic7a1a60ce0b17a3469965cdca99332df0243ce2a
Signed-off-by: Rong Chang <rongchang@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/276577
Reviewed-by: Alec Berg <alecaberg@chromium.org>
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This change syncs oak with glados change CL:275296.
BRANCH=none
BUG=chrome-os-partner:41167
TEST=manual
load on oak and plug zinger in both ports many times.
Change-Id: Idc00a50c2d7b7a865e70762e91b2e7a82c6e6896
Signed-off-by: Rong Chang <rongchang@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/275852
Reviewed-by: Alec Berg <alecaberg@chromium.org>
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Port CL:275072 to oak. Oak rev1 and rev1.5 type-C VBUS input controls
are connected to PD phy instead of EC. This change wakes both USB PD
task to handle power status change. This issue will be fixed in next
hardware revision, or enable TCPC power status alert.
BRANCH=none
BUG=chrome-os-partner:41167
BUG=chrome-os-partner:41226
TEST=manual
plug type-C charger into port 1
Change-Id: Ifea19276d0eb74f3e4cac509abece362e6e8af17
Signed-off-by: Rong Chang <rongchang@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/275851
Reviewed-by: Alec Berg <alecaberg@chromium.org>
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
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Rev 1.5 hardware redefined EC and PD phy IO controls. This change adds macro
to map configurations at compile time.
BRANCH=none
BUG=none
TEST=manual
build and flash ec.bin
plug type-c charger on port 0
Change-Id: I60c2f1448fbdea9bb72d1f3b19de366cad150087
Signed-off-by: Rong Chang <rongchang@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/274771
Reviewed-by: Alec Berg <alecaberg@chromium.org>
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Add TCPM on EC side and TCPC on PD side to allow PD
communication. Enable PD communication on port 0.
BUG=none
BRANCH=none
TEST=load on oak. plug in hoho on port 0, and make sure
we successfully negotiate a PD contract. (note: you have
to manually enable 5V VBUS right now)
Change-Id: I0ce7c016545bc56c5e10f66b49b73722187f12dc
Signed-off-by: Alec Berg <alecaberg@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/271829
Reviewed-by: Rong Chang <rongchang@chromium.org>
Reviewed-by: Sheng-liang Song <ssl@chromium.org>
Commit-Queue: Sheng-liang Song <ssl@chromium.org>
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Add initial support for Oak PD MCU on rev1 boards.
This does not include USB PD communication.
BUG=none
BRANCH=none
TEST=build and load on oak and get console. test we
resond to host commands from EC using "pdcmd 0 0" on
EC console.
Change-Id: I92045cf0fd682279ada6c286f5399f0e258a6305
Signed-off-by: Alec Berg <alecaberg@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/271828
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