| Commit message (Collapse) | Author | Age | Files | Lines |
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In the interest of making long-term branch maintenance incur as little
technical debt on us as possible, we should not maintain any files on
the branch we are not actually using.
This has the added effect of making it extremely clear when merging CLs
from the main branch when changes have the possibility to affect us.
The follow-on CL adds a convenience script to actually pull updates from
the main branch and generate a CL for the update.
BUG=b:204206272
BRANCH=ish
TEST=make BOARD=arcada_ish && make BOARD=drallion_ish
Signed-off-by: Jack Rosenthal <jrosenth@chromium.org>
Change-Id: I17e4694c38219b5a0823e0a3e55a28d1348f4b18
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3262038
Reviewed-by: Jett Rink <jettrink@chromium.org>
Reviewed-by: Tom Hughes <tomhughes@chromium.org>
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As a followup to CL:3104290, give the TCPCI TRANSMIT and
RX_BUF_FRAME_TYPE types more consistent names. Most of them can be used
for receiving, not just transmitting. Fix lint errors thus revealed.
BUG=b:155476419
TEST=make buildall
BRANCH=none
Signed-off-by: Abe Levkoy <alevkoy@chromium.org>
Change-Id: I399ec479eacc18622fc4d3f55f8bdabf4560fcff
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3125995
Reviewed-by: Keith Short <keithshort@chromium.org>
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This removes the use of adc_chip.h where adc.h is also used. In this
case, adc_chip.h is redundant.
BRANCH=none
BUG=b:181271666
TEST=buildall passes
Change-Id: Id7baf9aef949447a4d47934242f9bae97c971262
Signed-off-by: Caveh Jalali <caveh@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3120317
Reviewed-by: Keith Short <keithshort@chromium.org>
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Rename tcpm_transmit_type to tcpm_sop_type to reflect that it can be
used for Rx as well. Describe it in comments. This prepares to
consolidate enum pd_msg_type into this enum.
BUG=b:155476419
TEST=make buildall
BRANCH=none
Signed-off-by: Abe Levkoy <alevkoy@chromium.org>
Change-Id: Ife97d4ad51c48f2e832b94e007954919e236a309
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3104290
Reviewed-by: Keith Short <keithshort@chromium.org>
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Use board-specific override files when generating VIFs for boards.
BUG=b:172276715
TEST=make buildall
BRANCH=none
Signed-off-by: Abe Levkoy <alevkoy@chromium.org>
Change-Id: I197365018ceb8197c22d631cebf4cbce1c0119f7
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2785506
Reviewed-by: Denis Brockus <dbrockus@chromium.org>
Commit-Queue: Denis Brockus <dbrockus@chromium.org>
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This change simply moves the include/version.h file over to avoid
a naming collision with zephyr's version.h.
BRANCH=none
BUG=b:167392037
TEST=make buildall -j
Signed-off-by: Yuval Peress <peress@chromium.org>
Change-Id: Ib41b3c21817d5f81e713d3b550bc46a0d1c55cf8
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2612772
Reviewed-by: Jack Rosenthal <jrosenth@chromium.org>
Commit-Queue: Jack Rosenthal <jrosenth@chromium.org>
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Rename CONFIG_I2C_CONTROLLER and related comments.
BRANCH=None
BUG=None
TEST=make -j buildall
Signed-off-by: Diana Z <dzigterman@chromium.org>
Change-Id: Ied6a1829bf54a5c9a32e6772982a4b8aa31aaf23
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2518659
Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org>
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Add a transmit type parameter to functions involved in mode entry; also
add such a parameter to various functions calling those functions. For
DisplayPort-specific definitions or calls, specify SOP; we do not
currently support DisplayPort mode for cable plugs. For TCPMv1-specific
code, specify SOP. TCPMv1 generally assumes that the discovery/mode
structures are 1-dimensional, as they were previously, and changing that
is outside the scope of this CL.
BUG=b:155890173
TEST=Enter DP mode on Volteer with TCPMv2
TEST=Enter DP mode on Volteer with TCPMv1
TEST=Enter TBT mode on Volteer with TCPMV1
BRANCH=none
Change-Id: I8afc75b3f3be8939c4645058ac4a31f24c88fb9e
Signed-off-by: Abe Levkoy <alevkoy@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2229279
Reviewed-by: Diana Z <dzigterman@chromium.org>
Commit-Queue: Diana Z <dzigterman@chromium.org>
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The current use of the PD Config Flags are a bit confusing and
has been changed to the following:
The CONFIG_USB_POWER_DELIVERY flag is used to enable and disable
the TCPMv1 and TCPMv2 stacks. And when CONFIG_USB_POWER_DELIVERY
is enabled, one of the following must be enabled:
CONFIG_USB_PD_TCPMV1 - legacy power delivery state machine
CONFIG_USB_PD_TCPMV2 - current power delivery state machine
BUG=b:149993808
BRANCH=none
TEST=make -j buildall
Change-Id: Ie3f8615a75b15b4f1c703f57f3db9e152a471238
Signed-off-by: Sam Hurst <shurst@google.com>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2068519
Reviewed-by: Diana Z <dzigterman@chromium.org>
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BUG=b:148528713
BRANCH=none
TEST=make buildall -j
Change-Id: I5ba854552b5c6124e3c6758273651edc0e3c23ae
Signed-off-by: Vijay Hiremath <vijay.p.hiremath@intel.com>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2051214
Reviewed-by: Keith Short <keithshort@chromium.org>
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This is the second half of b/147290482
Cleaning up to use pd_data_role instead of int
BUG=b:147314832
BRANCH=none
TEST=make buildall -j
Change-Id: I2445b06f5f5469fb1f3a968034a83e3ee792e7c7
Signed-off-by: Denis Brockus <dbrockus@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1991845
Reviewed-by: Jett Rink <jettrink@chromium.org>
Reviewed-by: Edward Hill <ecgh@chromium.org>
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pd_get_role in the TCPMv1 stack meant pd_get_power_role.
pd_get_role in the TCPMv2 stack meant pd_get_data_role.
This CL will clean that up and make them the correct naming.
pd_get_power_role will also return an enum pd_power_role
type instead of an int.
BUG=b:147290482
BRANCH=none
TEST=make buildall -j
Change-Id: I73ee465401ccd050c2bd151f2fc043a59d95e079
Signed-off-by: Denis Brockus <dbrockus@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1991844
Reviewed-by: Jett Rink <jettrink@chromium.org>
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This was changed in PD 2.0 years ago (via ECN authored by our own David
Schneider), but our codebase still refers to BIT 27 of the Fixed PDO as
"Externally powered" instead of "Unconstrained Power".
This will search and replace all instances of "Externally powered" when it
refers to BIT 27, as well as function names, other internal representations
of that property, strings, and comments.
seds:
s/PD_FLAGS_PARTNER_EXTPOWER/PD_FLAGS_PARTNER_UNCONSTR/g
s/partner_extpower/partner_unconstrained/g
s/externally powered/unconstrained/g
Some others too.
Signed-off-by: Benson Leung <bleung@chromium.org>
BUG=chromium:1030990
TEST=Codebase builds clean. No functional change, except for the property shows
up in ectool as "Unconstrained power" now.
Change-Id: I5ececa03f29eb31057be3d0ad5311117093bc6da
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1956147
Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
Commit-Queue: Benson Leung <bleung@google.com>
Tested-by: Benson Leung <bleung@google.com>
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There is a board specific usb_pd_policy.c file that contains a lot of
code for handling DisplayPort Alternate mode, Google Firmware Update
Alternate mode, as well as some PD policy functions such as deciding to
Accept or Reject a data role swap or a power role swap. Several boards
simply copy/paste this code from project to project as a lot of this
functionality is not actually board specific.
This commit tries to refactor this by pulling the functions that are not
mainly board specific into common code. The functions are made
overridable such that boards that truly do require a different
implementation may do so.
Additionally, this consolidation changes the policy behaviour for some
boards, but they should be for the better. Some examples include that
data swaps are always allowed if we are a UFP (no system image
requirement), power swaps are allowed to become a sink if we are no
longer dual role (e.g. - in suspend), and DisplayPort Alternate Mode is
not entered if the AP is off.
In order to facilitate this refactor, a couple CONFIG_* options were
introduced:
- CONFIG_USB_PD_DP_HPD_GPIO
/* HPD is sent to the GPU from the EC via a GPIO */
- CONFIG_USB_PD_CUSTOM_VDO
/*
* Define this if a board needs custom SNK and/or SRC PDOs.
*
* The default SRC PDO is a fixed 5V/1.5A with PDO_FIXED_FLAGS indicating
* Dual-Role power, USB Communication Capable, and Dual-Role data.
*
* The default SNK PDOs are:
* - Fixed 5V/500mA with the same PDO_FIXED_FLAGS
* - Variable (non-battery) min 4.75V, max PD_MAX_VOLTAGE_MV,
* operational current PD_MAX_CURRENT_MA,
* - Battery min 4.75V, max PD_MAX_VOLTAGE_MV, operational power
* PD_OPERATING_POWER_MW
*/
BUG=chromium:1021724,b:141458448
BRANCH=<as many as we can that are still supported>
TEST=`make -j buildall`
TEST=Flash a kohaku, verify that DP Alt Mode still works with a variety
of DP peripherals
TEST=Repeat above with a nocturne
TEST=Repeat above with an atlas
Change-Id: I18fd7e22dc77fe1dc6c21c38cd7f1bc53cae86cb
Signed-off-by: Aseda Aboagye <aaboagye@google.com>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1949052
Tested-by: Aseda Aboagye <aaboagye@chromium.org>
Reviewed-by: Paul Fagerburg <pfagerburg@chromium.org>
Reviewed-by: Diana Z <dzigterman@chromium.org>
Reviewed-by: Denis Brockus <dbrockus@chromium.org>
Commit-Queue: Aseda Aboagye <aaboagye@chromium.org>
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BUG=none
BRANCH=none
TEST=make buildall -j
Change-Id: I7fe9ab23254dbd8515936d10ad6782305e76236c
Signed-off-by: Vijay Hiremath <vijay.p.hiremath@intel.com>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1925173
Reviewed-by: Jett Rink <jettrink@chromium.org>
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Certain SKUs of certain boards have lesser number of USB PD ports than
defined by CONFIG_USB_PD_PORT_COUNT. Hence rename
CONFIG_USB_PD_PORT_COUNT as CONFIG_USB_PD_PORT_MAX_COUNT.
BUG=b:140816510, b:143196487
BRANCH=octopus
TEST=make -j buildall; Boot to ChromeOS
Change-Id: I7c33b27150730a1a3b5813b7b4a72fd24ab73c6a
Signed-off-by: Karthikeyan Ramasubramanian <kramasub@google.com>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1879337
Tested-by: Karthikeyan Ramasubramanian <kramasub@chromium.org>
Reviewed-by: Jett Rink <jettrink@chromium.org>
Commit-Queue: Jett Rink <jettrink@chromium.org>
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RESET_FLAGS_* are used when setting/reading the field ec_reset_flags of
struct ec_response_uptime_info, which is defined in ec_commands.h. So it
might be better to put those macros there.
To be consistent with the other macros in the file, add "EC_" prefixes
to them.
BUG=b:109900671,b:118654976
BRANCH=none
TEST=make buildall -j
Cq-Depend: chrome-internal:1054910, chrome-internal:1054911, chrome-internal:1045539
Change-Id: If72ec25f1b34d8d46b74479fb4cd09252102aafa
Signed-off-by: You-Cheng Syu <youcheng@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/1520574
Tested-by: Yu-Ping Wu <yupingso@chromium.org>
Commit-Ready: Yu-Ping Wu <yupingso@chromium.org>
Legacy-Commit-Queue: Commit Bot <commit-bot@chromium.org>
Reviewed-by: Yilun Lin <yllin@chromium.org>
Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org>
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The extentions were added to make the compiler perform most
of the verification that the conversion was being done correctly
to remove 8bit addressing as the standard I2C/SPI address type.
Now that the compiler has verified the code, the extra
extentions are being removed
BUG=chromium:971296
BRANCH=none
TEST=make buildall -j
TEST=verify sensor functionality on arcada_ish
Change-Id: I36894f8bb9daefb5b31b5e91577708f6f9af2a4f
Signed-off-by: Denis Brockus <dbrockus@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1704792
Reviewed-by: Jack Rosenthal <jrosenth@chromium.org>
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Opt for 7bit slave addresses in EC code. If 8bit is
expected by a driver, make it local and show this in
the naming.
Use __7b, __7bf and __8b as name extensions for i2c/spi
addresses used in the EC codebase. __7b indicates a
7bit address by itself. __7bf indicates a 7bit address
with optional flags attached. __8b indicates a 8bit
address by itself.
Allow space for 10bit addresses, even though this is
not currently being used by any of our attached
devices.
These extensions are for verification purposes only and
will be removed in the last pass of this ticket. I want
to make sure the variable names reflect the type to help
eliminate future 7/8/7-flags confusion.
BUG=chromium:971296
BRANCH=none
TEST=make buildall -j
Change-Id: I2fc3d1b52ce76184492b2aaff3060f486ca45f45
Signed-off-by: Denis Brockus <dbrockus@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1699893
Reviewed-by: Jack Rosenthal <jrosenth@chromium.org>
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Ran the following command:
git grep -l 'Copyright (c)' | \
xargs sed -i 's/Copyright (c)/Copyright/g'
BRANCH=none
BUG=none
TEST=make buildall -j
Change-Id: I6cc4a0f7e8b30d5b5f97d53c031c299f3e164ca7
Signed-off-by: Tom Hughes <tomhughes@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1663262
Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org>
Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
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It's simply a bad idea to describe a macro in multiple locations.
It'll make it hard to change. It'll be difficult to keep all
locations in sync.
This patch replaces the comment duplicated in all ec.tasklist with
a pointer to the CONFIG_TASK_LIST definition. The macro will be
described in a single place (just like all/most other macros).
Signed-off-by: Daisuke Nojiri <dnojiri@chromium.org>
BUG=none
BRANCH=none
TEST=buildall
Change-Id: Id658b9d68e742e4334c692b804d9c98c8de21313
Reviewed-on: https://chromium-review.googlesource.com/1551579
Commit-Ready: ChromeOS CL Exonerator Bot <chromiumos-cl-exonerator@appspot.gserviceaccount.com>
Tested-by: Daisuke Nojiri <dnojiri@chromium.org>
Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org>
Reviewed-by: Jett Rink <jettrink@chromium.org>
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Requested for linux integration, use BIT instead of 1 <<
First step replace bit operation with operand containing only digits.
Fix an error in motion_lid try to set bit 31 of a signed integer.
BUG=None
BRANCH=None
TEST=compile
Change-Id: Ie843611f2f68e241f0f40d4067f7ade726951d29
Signed-off-by: Gwendal Grignou <gwendal@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/1518659
Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org>
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This adds support to configure dualrole setting
per port, so that servo v4 can adjust charge and
dut port separately.
servo will detect charge capability on CHG port
and choose source or sink as appropriate.
Fix null dereference bug in genvif duel to dynamic src_pdo.
"cc" command allows src, snk, srcdts, snkdts configurations.
BRANCH=None
BUG=b:72557427
TEST=charge through and also passive hub. Note Dru doesn't accept DTS hub.
TEST=make buildall -j
Change-Id: I19f1d1a5c37647fec72202191faa4821c06fb460
Signed-off-by: Nick Sanders <nsanders@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/1096654
Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
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The pd_custom_vdm is called in common/usb_pd_protocol no
matter you have this defined or not. No where else I see
pd_vdm being used. So we should not have to deal with this
CONFIG_USB_PD_CUSTOM_VDM.
BUG=None
BRANCH=None
TEST=make buildall -j
Change-Id: I4e8b710240ee27b12625d797e7824f29044e6462
Signed-off-by: Divya Sasidharan <divya.s.sasidharan@intel.com>
Reviewed-on: https://chromium-review.googlesource.com/998520
Commit-Ready: Divya S Sasidharan <divya.s.sasidharan@intel.com>
Tested-by: Divya S Sasidharan <divya.s.sasidharan@intel.com>
Reviewed-by: Vijay P Hiremath <vijay.p.hiremath@intel.com>
Reviewed-by: Jett Rink <jettrink@chromium.org>
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When CONFIG_USB_PD_MAX_SINGLE_SOURCE_CURRENT is defined for a board, as
its name implies, the board can source a higher current if there is
only one port acting as a source.
This commit fixes an issue with selecting the right source capability
message to advertise. charge_manager_get_source_pdo() was simply
checking if there was more than one sink connected, instead of checking
if there were any *other* sinks connected. In the event that a sink
was connected to a different port, we would advertise the max source
PDO.
BUG=b:64037926, b:35577509
BRANCH=gru,eve,reef
TEST=Connect sink to port 1. Connect a AMA to port 0 that claims that
VBUS isn't necessary. Start sending source caps, verify that the max
PDO is not being advertised in the source caps.
Change-Id: Ie4145ecaf98d5b9070ad3e8b139e5653685fa801
Signed-off-by: Aseda Aboagye <aaboagye@google.com>
Reviewed-on: https://chromium-review.googlesource.com/610479
Commit-Ready: Aseda Aboagye <aaboagye@chromium.org>
Tested-by: Aseda Aboagye <aaboagye@chromium.org>
Reviewed-by: Shawn N <shawnn@chromium.org>
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Store our image size (known at build time) in our version struct (now
renamed to image_data). This will allow us to more efficiently determine
the size of an image in a follow-up CL.
Note that compatibility is broken for old ROs that do not include this
CL.
BUG=chromium:577915
TEST=Verify on kevin + lars + lars_pd that stored image size matches
output of system_get_image_used() for both RO and RW images.
BRANCH=None
Change-Id: I7b8dc3ac8cf2df3184d0701a0e0ec8032de8d81b
Signed-off-by: Shawn Nematbakhsh <shawnn@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/450858
Commit-Ready: Shawn N <shawnn@chromium.org>
Tested-by: Shawn N <shawnn@chromium.org>
Reviewed-by: Randall Spangler <rspangler@chromium.org>
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pdcontrol suspend command will be used to prevent tcpm from putting
the chip into sleep while firmware update is taking place. Currently
the command suspends or resumes port 0. This patch makes the command
apply to ports individually.
pd enable console command now takes a port number:
pd <port> enable/disable.
This patch also replaces CONFIG_USB_PD_COMM_ENABLED with _DISABLED.
When it's defined, PD communication is disabled at startup.
Plankton undefines CONFIG_USB_PD_COMM_ENABLED enable, intending to
disable PD communication at startup. Therefore, this patch defines
CONFIG_USB_PD_COMM_DISABLED in its board.h.
BUG=b:35586859
BRANCH=none
TEST=From AP console:
localhost # /tmp/ectool pdcontrol suspend 1
[600.188013 TCPC p1 suspended!]
> pd 1 state
Port C1 CC1, Dis - Role: SNK-UFP State: SUSPENDED, Flags: 0x0020
localhost # /tmp/ectool pdcontrol resume 1
[678.516613 TCPC p1 resumed!]
> pd 1 state
Port C1 CC1, Ena - Role: SNK-UFP State: DRP_AUTO_TOGGLE, Flags: 0x0020
From ec console:
> pd 1 disable
Port C1 disable
> pd 1 state
Port C1 CC1, Dis - Role: SNK-UFP State: DRP_AUTO_TOGGLE, Flags: 0x0020
> pd 1 enable
Port C1 enabled
> pd 1 state
Port C1 CC1, Ena - Role: SNK-UFP State: DRP_AUTO_TOGGLE, Flags: 0x0020
Change-Id: Ia0cc4904ac52adc4b89de20918968c8df78b9c80
Signed-off-by: Daisuke Nojiri <dnojiri@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/447968
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
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This is a dependency of the uderlyaing patch which breaks header
composition of g chip based boards.
This reverts commit 7cbb815732d7434f5985d3b50a869aa71ba5c507.
Change-Id: I4d94647cf5cb09fd338e5a581c956df6b5d83081
Reviewed-on: https://chromium-review.googlesource.com/435551
Reviewed-by: Vadim Bendebury <vbendeb@chromium.org>
Commit-Queue: Vadim Bendebury <vbendeb@chromium.org>
Tested-by: Vadim Bendebury <vbendeb@chromium.org>
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Store our image size (known at build time) in our version struct (now
renamed to image_data). This will allow us to more efficiently determine
the size of an image in a follow-up CL.
Note that compatibility is broken for old ROs that do not include this
CL.
BUG=chromium:577915
TEST=Verify on kevin + lars + lars_pd that stored image size matches
output of system_get_image_used() for both RO and RW images.
BRANCH=None
Change-Id: I49ea5fc27a7f11f66daba485a87d0dfe7d0c770f
Signed-off-by: Shawn Nematbakhsh <shawnn@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/427408
Commit-Ready: Shawn N <shawnn@chromium.org>
Tested-by: Shawn N <shawnn@chromium.org>
Reviewed-by: Randall Spangler <rspangler@chromium.org>
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Servo_v4 requires the ability to have a different default state per
port. In previous devices, the assumption was that each supported port
had the same default usb pd state and power role. This CL moves the
by the default power role which in turn is derived from
CONFIG_USB_PD_DUAL_ROLE. In addiiton to moving the location, it now
uses 'port' as argument so it can be port specific if required.
PD_DEFAULT_STATE was a board.h specific config, but in practice each
instance used to date was set to PD_STATE_SNK_DISCONNECTED if
CONFIG_USB_PD_DUAL_ROLE was defined and set to
PD_STATE_SRC_DISCONNECTED otherwise.
BUG=chrome-os-partner:61878
BRANCH=servo
TEST=Manual run 'make -j buildall' to verify that all instances of
PD_DEFAULT_STATE were removed.
Change-Id: Iaf40718668732f525485ed7942ee7fc246d3f75d
Signed-off-by: Scott <scollyer@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/431787
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
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When the board is using dynamic source PDOs, we need to ensure that we
are checking the incoming sink power request against the right set of
PDOs else we might reject a valid request (e.g. with high-power source,
we need to check against the 3.0A limit if we only have one port
connected).
Signed-off-by: Vincent Palatin <vpalatin@chromium.org>
BRANCH=gru
BUG=chrome-os-partner:56110
TEST=Connect Kevin to Caroline, ask Caroline to charge from the other
side and see it negotiating successfully a 5V/3A contract.
Change-Id: Ie1aa5746776be5946422bf07c08ae0f22faddd8c
Reviewed-on: https://chromium-review.googlesource.com/403088
Commit-Ready: Vincent Palatin <vpalatin@chromium.org>
Tested-by: Vincent Palatin <vpalatin@chromium.org>
Reviewed-by: Shawn N <shawnn@chromium.org>
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Add a policy to handle the case where the device can source the
`CONFIG_USB_PD_MAX_SINGLE_SOURCE_CURRENT` over one of its type-C port if
there is no sink connected on the other ones.
Signed-off-by: Vincent Palatin <vpalatin@chromium.org>
BRANCH=none
BUG=chrome-os-partner:56110
TEST=manual: on Kevin, plug and unplug various devices on the 2 ports,
while measuring the type-C pull-up with Twinkie.
Change-Id: Id5961f04d0a1b1073f5ab340068efd9079918209
Reviewed-on: https://chromium-review.googlesource.com/373818
Commit-Ready: Vincent Palatin <vpalatin@chromium.org>
Tested-by: Vincent Palatin <vpalatin@chromium.org>
Reviewed-by: Shawn N <shawnn@chromium.org>
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Since pretty much always, we've declared console commands to take
a "longhelp" argument with detailed explanations of what the
command does. But since almost as long, we've never actually used
that argument for anything - we just silently throw it away in
the macro. There's only one command (usbchargemode) that even
thinks it defines that argument.
We're never going to use this, let's just get rid of it.
BUG=none
BRANCH=none
CQ-DEPEND=CL:*279060
CQ-DEPEND=CL:*279158
CQ-DEPEND=CL:*279037
TEST=make buildall; tested on Cr50 hardware
Everything builds. Since we never used this arg anyway, there had
better not be any difference in the result.
Change-Id: Id3f71a53d02e3dc625cfcc12aa71ecb50e35eb9f
Signed-off-by: Bill Richardson <wfrichar@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/374163
Reviewed-by: Myles Watson <mylesgw@chromium.org>
Reviewed-by: Randall Spangler <rspangler@chromium.org>
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This feature is inconsistent. Not all boards have such a symlink
(for a obvious reason).
This feature is fragile. It's most likely not tested and going to be
broken if not already. Developers won't like it if they have to test
two different ways to build boards before submitting patches.
This feature is not necessary. If you build EC in the standard way
(e.g. make BOARD=samus), these symlinks are not needed.
This feature is wasteful. Extra disk spaces are used and extra lines
are added to Makefile (increasing code complexity slightly).
BUG=chromium:626776
BRANCH=none
TEST=make buildall
Change-Id: Id5444284d773cb0e9225f39abd877441b8f61440
Signed-off-by: Daisuke Nojiri <dnojiri@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/359321
Reviewed-by: Randall Spangler <rspangler@chromium.org>
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Previously CONFIG_USB_PD_TCPM_VBUS had two uses which were independent:
- When operating as a TCPC, it indicated that the VBUS level should be
tracked (through GPIO inputs) and sent to the external TCPM when
appropriate.
- When operating as a TCPM, it indicated that the VBUS level should be
obtained by querying the TCPC.
These two independent uses have been split into
CONFIG_USB_PD_TCPC_TRACK_VBUS and CONFIG_USB_PD_VBUS_DETECT_TCPC, which
sould be more clear.
In addition, CONFIG_USB_PD_VBUS_DETECT_* CONFIGs have been added for
other means of VBUS detection.
BUG=chromium:616580
BRANCH=None
TEST=Verify kevin continues to boot + charge.
Signed-off-by: Shawn Nematbakhsh <shawnn@chromium.org>
Change-Id: I936821481d6577e17e3e9c61ff97c037574d6923
Reviewed-on: https://chromium-review.googlesource.com/348950
Commit-Ready: Shawn N <shawnn@chromium.org>
Tested-by: Shawn N <shawnn@chromium.org>
Reviewed-by: Shawn N <shawnn@chromium.org>
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The EC code expects console commands to be no longer than 14
characters, otherwise the alignment of the help command output breaks.
This patch replaces flash_spi_sel_lock with flash_spi_lock and
fake_disconnect with fakedisconnect to make sure the command names
fit.
BRANCH=none
BUG=none
TEST=the 'help' command output is not misaligned any more
Change-Id: Ia65f1535850a07adccbef0812c8a0922c0264cea
Signed-off-by: Vadim Bendebury <vbendeb@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/345570
Reviewed-by: Randall Spangler <rspangler@chromium.org>
Reviewed-by: Mulin Chao <mlchao@nuvoton.com>
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Previously the maximum number of deferred routines was specified by the
the default maximum number of deferred routines you had to override
this, and if you wanted fewer, you still payed the price of having the
defer_until array statically allocated to be the maximum size.
This change removes that define and instead creates the RAM state of
the deferred routine (the time to wait until to call the deferred) when
the deferred is declared.
Signed-off-by: Anton Staaf <robotboy@chromium.org>
BRANCH=None
BUG=None
TEST=make buildall -j
manually test on discovery-stm32f072
Change-Id: Id3db84ee1795226b7818c57f68c1f637567831dc
Reviewed-on: https://chromium-review.googlesource.com/335597
Commit-Ready: Anton Staaf <robotboy@chromium.org>
Tested-by: Anton Staaf <robotboy@chromium.org>
Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
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Previously calls to hook_call_deferred were passed the function to call,
which was then looked up in the .rodata.deferred section with a linear
search. This linear search can be replaced with a subtract by passing
the pointer to the deferred_data object created when DECLARE_DEFERRED
was invoked.
Signed-off-by: Anton Staaf <robotboy@chromium.org>
BRANCH=None
BUG=None
CQ-DEPEND=CL:*255812
TEST=make buildall -j
Change-Id: I951dd1541302875b102dd086154cf05591694440
Reviewed-on: https://chromium-review.googlesource.com/334315
Commit-Ready: Bill Richardson <wfrichar@chromium.org>
Tested-by: Bill Richardson <wfrichar@chromium.org>
Reviewed-by: Bill Richardson <wfrichar@chromium.org>
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The scheme to disable PD communication in locked RO needs to be
implemented on other platforms, so move it to common code, behind
CONFIG_USB_PD_COMM_LOCKED.
BUG=chrome-os-partner:52157
BRANCH=glados
TEST=Manual on chell. Lock system and boot to recovery, then verify PD
communication is functional. Enable CONFIG_USB_PD_COMM_LOCKED and verify
PD communication isn't functional under the same test conditions.
Signed-off-by: Shawn Nematbakhsh <shawnn@chromium.org>
Change-Id: I8d1f24c0b60cf1c54e329af003b7083ee55ffc40
Reviewed-on: https://chromium-review.googlesource.com/338064
Commit-Ready: Shawn N <shawnn@chromium.org>
Tested-by: Shawn N <shawnn@chromium.org>
Reviewed-by: Randall Spangler <rspangler@chromium.org>
Reviewed-by: Duncan Laurie <dlaurie@chromium.org>
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With commit e9883124ff16, a GPIO_INT macro was added. That change
also required that all instances of GPIO_INT in a board's
gpio.inc file come before any GPIO macros, or the interrupt
handler wouldn't work properly.
This CL just adds a warning comment about requirement to all
gpio.inc files.
BUG=chromium:471331
BRANCH=none
TEST=make buildall, test image on Cr50
This is a change to comments only. There is no new behavior to
verify, although I did run try out one new image just to be sure
nothing stupid happened.
Change-Id: I83f7819929a53bce3a8bae04d15b3ee3bda11738
Signed-off-by: Bill Richardson <wfrichar@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/329334
Reviewed-by: Vadim Bendebury <vbendeb@chromium.org>
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Added a 'drp' option to the console command usbc_action that is
used to toggle dualrole mode operation on and off. The default
Plankton operation is not affected as this control is initialized
to be disabled. When dualrole mode is enabled, then both CC lines
are used and monitored.
BRANCH=none
BUG=chrome-os-partner:50074
TEST=Manual
Tested Plankton connected to Samus. Verified that when dualrole mode
is enabled that it can connect as both SRC and SNK. Tested with Type C
cable initially connected and disconnected. In addition, verified that
power role swaps behave correctly, and that when disabled, default
Plankton operation is resumed.
Change-Id: I60adfa25844a01a50ba45d5d92e17a3318f3e0a0
Signed-off-by: Scott <scollyer@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/325545
Commit-Ready: Scott Collyer <scollyer@chromium.org>
Tested-by: Scott Collyer <scollyer@chromium.org>
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
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Convert some uses of gpio_set_flags_by_mask to plain gpio_set_flags.
The result is usually more readable due to being able to use the
GPIO_* enum names, and it removes more instances of port/mask
implementation details leaking outside the gpio.c chip specific code.
Signed-off-by: Anton Staaf <robotboy@chromium.org>
BRANCH=None
BUG=None
TEST=make buildall -j
Change-Id: I06a7ad8a53e553a8e432a6abb5b38c25a98df6c6
Reviewed-on: https://chromium-review.googlesource.com/323815
Commit-Ready: Anton Staaf <robotboy@chromium.org>
Tested-by: Anton Staaf <robotboy@chromium.org>
Reviewed-by: Shawn N <shawnn@chromium.org>
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Cleanup our port-to-task and task-to-port macros to allow cleanly adding
a third port.
BUG=chromium:554243
BRANCH=None
TEST=Manual on glados / glados_pd. Verify that both USB-C ports are
functional for charging.
Signed-off-by: Shawn Nematbakhsh <shawnn@chromium.org>
Change-Id: Ib833de0dfaa9490f4de8efb08d2cdddd86d57896
Reviewed-on: https://chromium-review.googlesource.com/311785
Commit-Ready: Shawn N <shawnn@chromium.org>
Tested-by: Shawn N <shawnn@chromium.org>
Reviewed-by: Alec Berg <alecaberg@chromium.org>
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
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Some chips previously defined CONFIG_I2C and others didn't. Standardize
the usage by removing CONFIG_I2C from all config_chip files and force it
to be defined at the board level. Also, make boards define
CONFIG_I2C_MASTER and/or CONFIG_I2C_SLAVE based on the I2C interfaces
they will use - this will assist with some later cleanup.
BUG=chromium:550206
TEST=`make buildall -j`
BRANCH=None
Change-Id: I2f0970e494ea49611abc315587c7c9aa0bc2d14a
Signed-off-by: Shawn Nematbakhsh <shawnn@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/310070
Commit-Ready: Shawn N <shawnn@chromium.org>
Tested-by: Shawn N <shawnn@chromium.org>
Reviewed-by: Alec Berg <alecaberg@chromium.org>
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Remove duplicate code for checking request message, but keep
a board specific check of the request message for custom checks
needed on zinger and plankton.
BUG=chrome-os-partner:42490
BRANCH=none
TEST=make -j buildall. run on samus and connect a hoho, make
sure we successfully negotiate a contract.
Change-Id: I7398953a158d340e3e113f5a816b55445a857711
Signed-off-by: Alec Berg <alecaberg@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/305374
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
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When enable CCD, we expect DP/USB super speed MUX is switched to USB and
reset RFU polarity MUX for USB2 to recognize correct devices.
BRANCH=none
BUG=chrome-os-partner:44977
TEST=manual
Connect plankton's type-c to a PD sink, switch plankton to power source
switch DP MUX to DP, and press CCD button.
Super speed MUX should be switch to USB3 mode. And if the PD sink
supports CCD, host computer should be able to recognize CCD devices.
Signed-off-by: Rong Chang <rongchang@chromium.org>
Change-Id: I61c80d9a41c368450a9c9f33a20d99eef83a437d
Reviewed-on: https://chromium-review.googlesource.com/303285
Reviewed-by: Alec Berg <alecaberg@chromium.org>
Reviewed-by: Todd Broch <tbroch@chromium.org>
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Set USB communications capable flag in source/sink
capabilities PDO on boards that support USB. This
signals to other side that we are capable of
communication over D+/D- or SS Tx/Rx.
BUG=chrome-os-partner:34982
BRANCH=samus,smaug
TEST=load on samus, use twinkie to sniff traffic,
verify that USB comms capable bit is set in source
cap packet
Change-Id: I0f49cf19eb141512298c3439a4708c53101d674f
Signed-off-by: Alec Berg <alecaberg@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/300637
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
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Create new custom VDM to notify DUT to enter case closed
debugging mode. Send this VDM from Plankton when the case
closed debugging enable button is pressed. Once DUT
receives the CCD enable VDM, CCD remains enabled until
a reboot. Note, this is polarity dependent, so cable
might need to be flipped.
BUG=chrome-os-partner:42569
BRANCH=smaug
TEST=load on plankton and ryu. attach full feature C to C
cable (must have USB3.0 wires). make sure plankton is in
USB mode (USB_SS_USB_MODE light should be set, which can be
done by pressing DP_USB_TOGGLE button). Press CASE_CLOSE_EN
button to send VDM, and then attach micro-B to debug port
CN14 on plankton. See that VID/PID for Ryu show up in lsusb
on host, and EC console works. If device does not show up,
flip polarity of cable.
Change-Id: Ifa469e4a43e32089becd75fe6cdfe0ed462d950b
Signed-off-by: Alec Berg <alecaberg@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/287441
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
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Add ability for Plankton to detect whether a single or double
CC cable is used to connect to DUT. This is done by toggling
the active CC line until a connection is detected, then toggling
once more and checking if we still have a connection. If we
can connect to the DUT in both CC polarities, then it is a
double CC cable. Before we know the cable type, keep PD
communication disabled to avoid partially negotiating and then
disconnecting. Note, this increases the time it takes for
us to connect a form a stable PD contract with the DUT.
When we detect a double CC cable, the cable flip button actually
flips the active CC polarity, thus testing all pins in the
opposite polarity.
BUG=chrome-os-partner:42569
BRANCH=smaug
TEST=test with plankton and samus. test that we form a PD
contract with both single and double CC cables as both sink
and source. also test the cable flip button for both cables.
Change-Id: I522369302848d4cdbb70c55a40af3ad0b7c3fb8a
Signed-off-by: Alec Berg <alecaberg@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/286589
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
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This unifies all the EC header files to use __CROS_EC_FILENAME_H
as the include guard. Well, except for test/ util/ and extra/
which use __TEST_ __UTIL_ and __EXTRA_ prefixes respectively.
BUG=chromium:496895
BRANCH=none
TEST=make buildall -j
Signed-off-by: Bill Richardson <wfrichar@chromium.org>
Change-Id: Iea71b3a08bdec94a11239de810a2b2e152b15029
Reviewed-on: https://chromium-review.googlesource.com/278121
Reviewed-by: Randall Spangler <rspangler@chromium.org>
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