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* pompom: Move Refresh key to row 3Philip Chen2020-12-171-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | Starting from pompom rev2, the refresh key has been moved to F2, which maps to row 3 (KSI3) in the keyboard matrix. This CL intends to work together with a hardware change - routing KSI3 to H1, which will be implemented in the next pompom hardware spin. In pompom rev2 boards, since KSI2 is still routed to H1, this CL won't magically make the three finger gesture `Esc+Refresh+Pwr` work. We have to live with `Esc+F3+Pwr` temporarily in rev2 boards. Note that this CL will break the non-H1-triggered recovery with rev2. Since this is not what a normal user will do, I think it is OK to land the CL now. BUG=b:174290322 BRANCH=trogdor TEST=Entering recovery mode via `Esc+F3+Pwr` still works in pompom rev2 Signed-off-by: Philip Chen <philipchen@google.com> Change-Id: I9a3376e18a800d1023994d264fbed0eb0a30fdb9 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2596126 Reviewed-by: Wai-Hong Tam <waihong@google.com> Commit-Queue: Philip Chen <philipchen@chromium.org> Tested-by: Philip Chen <philipchen@chromium.org>
* task_set_event: remove the wait argumentDawid Niedzwiecki2020-12-141-1/+1
| | | | | | | | | | | | | | | | | | | | There is an option in the task_set_event function which force the calling task to wait for an event. However, the option is never used thus remove it. This also will help in the Zephyr migration process. BUG=b:172360521 BRANCH=none TEST=make buildall Signed-off-by: Dawid Niedzwiecki <dn@semihalf.com> Change-Id: Ic152fd3d6862d487bcc0024c48d136556c0b81bc Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2521599 Reviewed-by: Jett Rink <jettrink@chromium.org> Reviewed-by: Tom Hughes <tomhughes@chromium.org> Reviewed-by: Jack Rosenthal <jrosenth@chromium.org> Commit-Queue: Jack Rosenthal <jrosenth@chromium.org>
* pompom: Limit input current to fraction of negotiated limitjohnwc_yeh2020-11-251-0/+1
| | | | | | | | | | | | | | | Limit input current to 95% of negotiated limit BUG=b:172177779 BRANCH=none TEST=Connect adapter then check input current. Signed-off-by: johnwc_yeh <johnwc_yeh@compal.corp-partner.google.com> Change-Id: I5d2af134351611e44a331e1303e710b63912d3eb Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2557285 Reviewed-by: AlvinCC Hsu <alvincc_hsu@compal.corp-partner.google.com> Reviewed-by: Wai-Hong Tam <waihong@google.com> Tested-by: AlvinCC Hsu <alvincc_hsu@compal.corp-partner.google.com>
* Trogdor: Add the interrupt for USB-A overcurrentWai-Hong Tam2020-11-182-2/+20
| | | | | | | | | | | | | | | | | | | | | The USB-A VBUS is through a load switch. The FAULT_L pin of the load switch requires an external pull-up. Apply the pull-up on EC side. Add the interrupt of the FAULT_L pin. Route to the function board_overcurrent_event(), which currently prints an error message. BRANCH=Trogdor BUG=b:173154219 TEST=Plugged a USB load >1.5A to the USB-A port and checked the error message was printed: [73.738372 p2: overcurrent!] Change-Id: I5f5f82de942eaf26a33051ad17f14b90d8024b89 Signed-off-by: Wai-Hong Tam <waihong@google.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2547190 Reviewed-by: Alexandru M Stan <amstan@chromium.org>
* Trogdor: Move CONFIG_CMD_AP_RESET_LOG out of bringup listWai-Hong Tam2020-11-161-1/+0
| | | | | | | | | | | | | Move this CONFIG from bringup to production. BRANCH=None BUG=b:169736149 TEST=Built the image. Change-Id: I490499f3a85f91c6f07a0e099b8c0738bf0eb787 Signed-off-by: Wai-Hong Tam <waihong@google.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2538262 Reviewed-by: Stephen Boyd <swboyd@chromium.org>
* Trogdor: Apply internal PU to the interrupt of PI3USB9201Wai-Hong Tam2020-11-071-1/+1
| | | | | | | | | | | | | | | | | The BC1.2 chip PI3USB9281 some Trogdor old revisions used has push-pull output on the interrupt pin. But the PI3USB9201 some latest revisions used has open-drain output. These lines don't have external PU. So apply EC internal PU. BRANCH=Trogdor BUG=b:172674040 TEST=Plugged a C-to-A adapter to a CDP port, the BC1.2 interrupted and detected the 1.5A source. Change-Id: I15e27221bff1ce35fc35b03ac38340b5dfb1055d Signed-off-by: Wai-Hong Tam <waihong@google.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2523298 Reviewed-by: Stephen Boyd <swboyd@chromium.org>
* Trogdor: Apply PD to sensors' interrupts before entering hibernateWai-Hong Tam2020-11-021-0/+9
| | | | | | | | | | | | | | | | Sensors are unpowered in hibernate. Apply PD to the interrupt lines such that they don't float. Don't need to remove the PD as they will be restored to the gpio.inc configs before the interrupts are enabled. BRANCH=None BUG=b:169595541 TEST=Triggered EC hibernate, woke up, and verified sensors working. Change-Id: I18819700d454fbbc16b28f65dad9533d97aa7d4c Signed-off-by: Wai-Hong Tam <waihong@google.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2511805 Reviewed-by: Alexandru M Stan <amstan@chromium.org> Reviewed-by: Stephen Boyd <swboyd@chromium.org>
* Trogdor: Configure OE_L and SEL of DP muxes to prevent leakageWai-Hong Tam2020-10-311-2/+2
| | | | | | | | | | | | | | | | | | | | | The OE_L has external pull-up. It is actually an open-drain output. Configuring it to push-pull has leakage through the pull-up to an unpowered rail during EC hibernate. Also configure SEL to output low if OE_L is deasserted. The SEL has no meaning if the muxes are disabled. When EC hibernate, the muxing ICs are unpowered. Outputing low prevents leakage through the muxing ICs. BRANCH=None BUG=b:169595541 TEST=Plugged a HDMI monitor to port-0 and port-1; checked the DP mux settings correctly. Change-Id: Icf0e81172626c09bc556756f1bcdddb83f45ac68 Signed-off-by: Wai-Hong Tam <waihong@google.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2508864 Reviewed-by: Stephen Boyd <swboyd@chromium.org>
* Trogdor: Define the NC strap and output it lowWai-Hong Tam2020-10-311-0/+3
| | | | | | | | | | | | | Define the NC strap and output it low for power saving. BRANCH=None BUG=b:169595541 TEST=Built the images and booted fine. Change-Id: Ic2f1a098218403c3bff534b921b385ba893a83cf Signed-off-by: Wai-Hong Tam <waihong@google.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2508863 Reviewed-by: Stephen Boyd <swboyd@chromium.org>
* Trogdor: Do not activate g-sensors in S5Wai-Hong Tam2020-10-231-2/+2
| | | | | | | | | | | | | | | | | The g-sensors are not necessary to be active in S5; no gesture recognition in Trogdor designs. Do not activate it in S5. Though without this change, EC doesn't read the g-sensors as there is no config (zero odr) for S5. BRANCH=None BUG=b:170288119 TEST=Still read the g-sensors on S0 and S3. Change-Id: I54e8012e2674e13273e5fe9b96e9e9e6086e6490 Signed-off-by: Wai-Hong Tam <waihong@google.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2492529 Reviewed-by: Stephen Boyd <swboyd@chromium.org>
* Trogdor: Deprecate PMIC_FAULT_L signalWai-Hong Tam2020-10-221-1/+1
| | | | | | | | | | | | | | This signal is no longer connected to PMIC on recent hardware revisions. It is unused. Deprecate it. BRANCH=None BUG=b:171245607 TEST=Built the affected Trogdor images. Change-Id: I75562f1aa9e411df38afd321ab63b51e91e7d4f7 Signed-off-by: Wai-Hong Tam <waihong@google.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2488660 Reviewed-by: Alexandru M Stan <amstan@chromium.org>
* Pompom: Define unused GPIOsWai-Hong Tam2020-10-221-6/+27
| | | | | | | | | | | | | | | For the GPIOs connecting to nothing, define them. The unused GPIOs are configured as input with pull-up to save power. BRANCH=None BUG=b:169595541 TEST=Checked EC booted up correctly. Should be no change except power numbers. Change-Id: I425a120c0944342f5f12707bfc03df65d191995d Signed-off-by: Wai-Hong Tam <waihong@google.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2486292 Reviewed-by: Alexandru M Stan <amstan@chromium.org>
* Trogdor: Remove GPIO 1.8V flagsWai-Hong Tam2020-10-201-6/+6
| | | | | | | | | | | | | | | | | | | | | | | The supply of the following GPIOs are VSPI/VHIF which is 1.8V. Their voltage levels are not configurable. The 1.8V flag is unnecessary. * PS_HOLD * PMIC_FAULT_L * AP_SUSPEND * ACCEL_GYRO_INT_L The following GPIOs are on 3.3V supply and not configurable. The 1.8V flag doesn't work. As they are used as open-drain, should be fine. * PM845_RESIN_L * PMIC_KPD_PWR_ODL BRANCH=None BUG=b:169595541 TEST=Tested the power-on and power-off sequence. Change-Id: I309c1a925b78e1140967cf3702e4ec3bba2a4583 Signed-off-by: Wai-Hong Tam <waihong@google.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2485910 Reviewed-by: Alexandru M Stan <amstan@chromium.org>
* Trogdor: Enable pull-down on SHI signalsWai-Hong Tam2020-10-201-0/+9
| | | | | | | | | | | | | | | Enable pull-down to avoid these signals floating. It is believed that it can get better power number in S5/G3. BRANCH=None BUG=b:169595541 TEST=Host commands between EC and AP work as expected. Check the GPIOs are low when AP is off. Change-Id: I1bcf882bf8f29b06a129700faebee8552085f0ef Signed-off-by: Wai-Hong Tam <waihong@google.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2469505 Reviewed-by: Alexandru M Stan <amstan@chromium.org>
* pompom: Change TCPC from PS8805 to PS8755 for board rev2AlvinCC_Hsu2020-10-192-2/+5
| | | | | | | | | | | | | | This patch adds a configuration to support PS8755 and use board ID to determine which TCPC is used. BUG=b:169733917 BRANCH=none TEST=make BOARD=pompom Signed-off-by: AlvinCC_Hsu <alvincc_hsu@compal.corp-partner.google.com> Change-Id: I82cb57ecf27b776829ae31c30e711f0113756e57 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2465613 Reviewed-by: Wai-Hong Tam <waihong@google.com>
* Trogdor: Enable PPC power sink path before hibernate on old boardsWai-Hong Tam2020-10-081-0/+20
| | | | | | | | | | | | | | | | | | | | | | The old boards don't have the hardware fix b/169797080. They need the workaround to make ACOK functional to wake EC up from hibernate. EC enables the PPC power sink path before EC enters hibernate, such that the ACOK won't be blocked by PPC. Otherwise, the PPC keeps the sink path disconnected; ACOK won't go High and can't wake EC up. Do it in board_hibernate() instead of board_hibernate_late(), which has I2C disabled. BRANCH=None BUG=b:170324206 TEST=Tested on Lazor, without the hardware rework. Triggered EC into hibernate; plugging AC can wake EC up. Change-Id: I3a97f59a344aff88b12fb19e2ea3ae126d1a8715 Signed-off-by: Wai-Hong Tam <waihong@google.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2461939 Reviewed-by: Stephen Boyd <swboyd@chromium.org>
* Trogdor: Assert a GPIO to turn off rails before enter hibernateWai-Hong Tam2020-10-081-0/+1
| | | | | | | | | | | | | | | | We disabled the PSL mode hibernate. We uses another GPIO to control switches, which were originally controlled by PSL_OUT. Add this GPIO, named HIBERNATE_L, such that the non-PSL mode hibernate can retrofit the original design. BRANCH=None BUG=b:169797080 TEST=Triggered EC hibernate and checked the HIBERNATE_L GPIO asserted. Change-Id: I69c0d0296f701f3027adfd4d27fa51bdae0844a5 Signed-off-by: Wai-Hong Tam <waihong@google.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2446662 Reviewed-by: Alexandru M Stan <amstan@chromium.org>
* Trogdor: Disable PSL mode hibernateWai-Hong Tam2020-10-081-15/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The RTC stops counting under PSL mode. The Trogdor design relies on EC to give the RTC counter. Disable the PSL mode hibernate and use the traditional non-PSL mode way, i.e. power down all RAM blocks except the last one. BRANCH=None BUG=b:169595541 TEST=Tested on Lazor; triggered hibernate, and waked it up using: * power button press * lid open * servo toggling EC_RST_ODL * AC plug (doesn't work, need to investigate why) TEST=Verified RTC still counting in hibernate: 2020-10-07 14:35:53 [244.922648 power state 9 = S5->G3, in 0x0005] 2020-10-07 14:35:53 RTC: 0x5f7e34b9 (1602106553.00 s) 2020-10-07 14:35:53 [244.923417 power state 0 = G3, in 0x0005] 2020-10-07 14:35:53 [244.926855 SDC Safe] 2020-10-07 14:35:53 [244.927138 Hibernate due to G3 idle] 2020-10-07 14:36:20 2020-10-07 14:36:20 2020-10-07 14:36:20 --- UART initialized after reboot --- 2020-10-07 14:36:20 [Image: RO, lazor_v2.0.5690-d95436fd6 ...] 2020-10-07 14:36:20 [Reset cause: hibernate wake-pin] 2020-10-07 14:36:20 ... 2020-10-07 14:36:23 > rtc 2020-10-07 14:36:25 RTC: 0x5f7e34d9 (1602106585.00 s) First RTC diff from the wall clock: 6553-53 = 6500 Second RTC diff from the wall clock: 6585-(60+25) = 6500 TEST=Verified RTC wake up from hibernate: 2020-10-07 14:59:25 > hibernate 10 2020-10-07 14:59:27 Hibernating for 10.000000 s 2020-10-07 14:59:37 2020-10-07 14:59:37 2020-10-07 14:59:37 --- UART initialized after reboot --- Change-Id: I23f6a65115d5722cf183948fad81dc16d3a6af47 Signed-off-by: Wai-Hong Tam <waihong@google.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2447049 Reviewed-by: Alexandru M Stan <amstan@chromium.org>
* Trogdor: Mask proper Search key location on the board levelWai-Hong Tam2020-09-262-0/+22
| | | | | | | | | | | | | | | | | | | | Don't use the default key mask, which enables both the old location (KSO_01/KSI_00) and the new location (KSO_00/KSI_03) for the Search key. It makes EC over-doing ghost detection. Define the key mask on the board level: * Trogdor/Lazor uses the old location * Pompom uses the new location * Coachz has no keyboard BRANCH=None BUG=b:169361784 TEST=Tested on Lazor, enabled "ksstate on" in EC console, pressed Grave + Tab + Left-Ctrl and saw these keys detected. Change-Id: I0cf37921901a4f997edbef3ac6a89e4351e742d7 Signed-off-by: Wai-Hong Tam <waihong@google.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2432449 Reviewed-by: Douglas Anderson <dianders@chromium.org>
* Pompom: Change to runtime config for TCPC partWai-Hong Tam2020-09-172-3/+10
| | | | | | | | | | | | | | | | The existing TCPC config is a compile time config. Have to create different images for different board revs. This CL changes it to runtime config such that a single image can be used for all board revs. BRANCH=none BUG=b:167476139 TEST=Built and tested the Pompom EC image. Change-Id: I113e410b9b07232a8a7d2fed9258a041e9117230 Signed-off-by: Wai-Hong Tam <waihong@google.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2416991 Reviewed-by: Stephen Boyd <swboyd@chromium.org>
* Trogdor: Move the I2C config to the board levelWai-Hong Tam2020-09-171-0/+14
| | | | | | | | | | | | | | | | | Move the I2C config to the board level such that they can have different configs. Also add the extra I2C bus for WLC on Coachz. The device on this I2C bus supports fast-mode plus, 1Mbit/s. BRANCH=None BUG=b:167884598 TEST=Built all Trogdor variants. Change-Id: Ibcb0e110e1b2c67f8ba843c2dc08efabeb5fe9ba Signed-off-by: Wai-Hong Tam <waihong@google.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2412821 Reviewed-by: Stephen Boyd <swboyd@chromium.org>
* Coachz: Remove the keyboard backlight supportWai-Hong Tam2020-09-171-0/+3
| | | | | | | | | | | | | | | | Coachz doesn't has an internal keyboard. Move the CONFIG from baseboard to board, as the keyboard backlight is not a common feature. BRANCH=None BUG=b:167884598 TEST=Built the Coachz image. Change-Id: Idd5937da9ad6a3ab1be277e537bbd2e70e2b1d9a Signed-off-by: Wai-Hong Tam <waihong@google.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2410855 Reviewed-by: Stephen Boyd <swboyd@chromium.org>
* Trogdor: Remove the references to BC1.2 VBUS detection GPIOWai-Hong Tam2020-09-161-3/+0
| | | | | | | | | | | | | | | We switched to use the TCPC to detect the VBUS, instead of the BC1.2, from CL:2086092. But the BC1.2 VBUS detection GPIOs are still used. Remove these references. BRANCH=None BUG=b:150682632, b:167884598 TEST=Built the affected Trogdor boards. Change-Id: I66d59b16cd93b1dbf460a56a9bc97268d571f6d1 Signed-off-by: Wai-Hong Tam <waihong@google.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2410851 Reviewed-by: Stephen Boyd <swboyd@chromium.org>
* Trogdor: Move GPIO aliases from baseboard to boardWai-Hong Tam2020-09-161-0/+2
| | | | | | | | | | | | | | Move some GPIO aliases from baseboard to board such that they can be customized to use different names. BRANCH=None BUG=b:167884598 TEST=Built the affect Trogdor boards. Change-Id: Id8d68d9b03d43010a81565f7625b8033aab14594 Signed-off-by: Wai-Hong Tam <waihong@google.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2410850 Reviewed-by: Stephen Boyd <swboyd@chromium.org>
* pompom: Change TCPC from PS8751 to PS8805 for board rev1AlvinCC_Hsu2020-09-042-0/+28
| | | | | | | | | | | | | | | | This patch adds a marco to define the board version and use it to determine what TCPC is used. BUG=b:167476139 BRANCH=none TEST=make BOARD=pompom Signed-off-by: AlvinCC_Hsu <alvincc_hsu@compal.corp-partner.google.com> Change-Id: If8cb4a7f213c68b37883a8a8a6f53478d8fd5924 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2391027 Reviewed-by: Wai-Hong Tam <waihong@google.com> Commit-Queue: Wai-Hong Tam <waihong@google.com> Tested-by: Wai-Hong Tam <waihong@google.com>
* pompom: Remove TCPC port1 configurationAlvinCC_Hsu2020-09-044-49/+3
| | | | | | | | | | | | | | | | This patch removes configurations (I2C, GPIO, TASK and Interrupt...) about TCPC port1 for pompom. BUG=b:167476139 BRANCH=none TEST=power on after flashing FW and it works normal. Signed-off-by: AlvinCC_Hsu <alvincc_hsu@compal.corp-partner.google.com> Change-Id: I1275c1ef7e7d3e65d695dace834a9bcbb4e66dcc Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2391022 Reviewed-by: Wai-Hong Tam <waihong@google.com> Commit-Queue: Wai-Hong Tam <waihong@google.com> Tested-by: Wai-Hong Tam <waihong@google.com>
* sc7180: Decouple the switchcap control from the power sequenceWai-Hong Tam2020-09-022-0/+19
| | | | | | | | | | | | | | | | | Currently, SC7180 power sequence is tightly coupled with a single switchcap part, i.e. DA9313. Should decouple the switchcap control from the power sequence, such that more different switchcap parts can be supported. BRANCH=None BUG=b:163867792 TEST=Built the affect images and booted into kernel. Change-Id: I7f63cd22bbc308672c40a734be4f6dfc80e07158 Signed-off-by: Wai-Hong Tam <waihong@google.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2386480 Reviewed-by: Stephen Boyd <swboyd@chromium.org> Reviewed-by: Philip Chen <philipchen@chromium.org>
* pompom: detect lid angle in S3AlvinCC_Hsu2020-08-191-0/+4
| | | | | | | | | | | | | | This patch add a configuration of BASE_ACCEL to read BASE_ACCEL values in S3 BUG=b:160750560 BRANCH=none TEST=execute accelread in ec console Signed-off-by: AlvinCC_Hsu <alvincc_hsu@compal.corp-partner.google.com> Change-Id: Iac83ea448297c15d49c0e8df43e26194905bb65a Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2359627 Reviewed-by: Wai-Hong Tam <waihong@google.com>
* pompom: Modify standard reference of accel sensorsAlvinCC_Hsu2020-08-171-3/+3
| | | | | | | | | | | | | | | | This patch modify standard reference of base and lid accel sensors BUG=b:160750560 BRANCH=none TEST=execute ectool motionsense to get values Signed-off-by: AlvinCC_Hsu <alvincc_hsu@compal.corp-partner.google.com> Change-Id: I227aa694061f4c77d3d5836a0a8375a682b598a9 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2348235 Reviewed-by: Wai-Hong Tam <waihong@google.com> Reviewed-by: Elthan Huang <elthan_huang@compal.corp-partner.google.com> Tested-by: Elthan Huang <elthan_huang@compal.corp-partner.google.com>
* trogdor: Support AP-control LEDJian-Jia Su2020-08-141-2/+4
| | | | | | | | | | | | | | Respect led_auto_control_is_enabled when setting the LED color. BUG=b:164019439 BRANCH=none TEST=ectool led <led_id> <color>|auto Signed-off-by: Jian-Jia Su <jjsu@chromium.org> Change-Id: Iac11c504c42da489c2d8bf2d970a66e059ed0684 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2352967 Reviewed-by: Wai-Hong Tam <waihong@google.com> Commit-Queue: Wai-Hong Tam <waihong@google.com>
* sc7180: Monitor AP_RST_L from PMIC to notify HOOK_CHIPSET_RESETWai-Hong Tam2020-08-081-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | The HOOK_CHIPSET_RESET should be notified when the AP resets. In x86 platforms, EC monitors the LPC LRESET pin. This LRESET pin is asserted when the chipset resets. However, ARM platforms don't use LPC. We need another way to monitor AP reset. This CL modifies the SC7180 power sequence, to monitor the AP_RST_L signal from PMIC. PMIC uses the AP_RST_L to notify AP reset. A complete warm reset sequence will toggle the AP_RST_L signal 3 times. EC monitors the AP_RST_L signal and wait it transition 3 times to notify the HOOK_CHIPSET_RESET. In case, the AP_RST_L is not toggled 3 times, still notifies the hook but prints a warning message. BRANCH=None BUG=b:163078082 TEST=Checked the HOOK_CHIPSET_RESET is notified after AP warm reset. Change-Id: I4e7b0f0d266e01526deaf54afcdfd2ac1037b8f6 Signed-off-by: Wai-Hong Tam <waihong@google.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2343753 Reviewed-by: Stephen Boyd <swboyd@chromium.org>
* pompom: Modify TCPC reset pinAlvinCC_Hsu2020-08-041-2/+2
| | | | | | | | | | | | | | | | | Change GPIOF1 and GPIOE4 to OUTPUT HIGH. Follow Trogdor reference board. BUG=b:162395077 BRANCH=none TEST=execute gpioget command to get value. Signed-off-by: AlvinCC_Hsu <alvincc_hsu@compal.corp-partner.google.com> Change-Id: I254857214a6e2e958067d4460312a1ce99c8e23d Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2328624 Reviewed-by: Wai-Hong Tam <waihong@google.com> Reviewed-by: Elthan Huang <elthan_huang@compal.corp-partner.google.com> Tested-by: Elthan Huang <elthan_huang@compal.corp-partner.google.com> Commit-Queue: Wai-Hong Tam <waihong@google.com>
* trogdor: Increase stack sizesWai-Hong Tam2020-07-311-12/+12
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Some tasks don't have enough stacks and may result stack overflow. Increase the stack sizes. Use the stack analyzer to check the deepest call flow. The annotations are WIP (still has a lot missing). The result is used as reference only. The PD and KEYSCAN tasks are assigned more than the analyer result. Their sizes come from other boards' values. BRANCH=None BUG=b:162039557 TEST=Checked lazor RW, using "make analyzestack": Task: HOOKS, Max size: 948 (724 + 224), Allocated size: 1056 Task: USB_CHG_P0, Max size: 756 (532 + 224), Allocated size: 800 Task: USB_CHG_P1, Max size: 756 (532 + 224), Allocated size: 800 Task: CHIPSET, Max size: 940 (716 + 224), Allocated size: 1056 Task: CHARGER, Max size: 948 (724 + 224), Allocated size: 1056 Task: MOTIONSENSE, Max size: 812 (588 + 224), Allocated size: 928 Task: HOSTCMD, Max size: 980 (756 + 224), Allocated size: 1056 Task: CONSOLE, Max size: 972 (748 + 224), Allocated size: 1056 Task: KEYSCAN, Max size: 588 (364 + 224), Allocated size: 928 Task: PD_C0, Max size: 844 (620 + 224), Allocated size: 1056 Task: PD_C1, Max size: 844 (620 + 224), Allocated size: 1056 Task: PD_INT_C0, Max size: 1020 (796 + 224), Allocated size: 1056 Task: PD_INT_C1, Max size: 1020 (796 + 224), Allocated size: 1056 Change-Id: I6d95f27db7ce1c50ba9bf9c262e7c7e2d352a940 Signed-off-by: Wai-Hong Tam <waihong@google.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2318374 Reviewed-by: Douglas Anderson <dianders@chromium.org> Commit-Queue: Douglas Anderson <dianders@chromium.org>
* trogdor: Increase HOSTCMD task stack sizeDouglas Anderson2020-07-271-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Running "taskinfo" on a lazor device (in this case, right after running chrome://system) shows that we're very close to the edge. Presumably we actually go over the edge in some situations since we've seen cases where going to chrome://system gets a stack overflow crash reported against the HOSTCMD task. After this change, taskinfo (after running chrome://system) looks like: > taskinfo Task Ready Name Events Time (s) StkUsed 0 R << idle >> 00000001 141.717533 112/672 1 HOOKS 00000000 0.402382 656/800 2 USB_CHG_P0 00000000 0.006707 448/672 3 USB_CHG_P1 00000000 0.000214 440/672 4 CHIPSET 00000000 0.002645 536/800 5 CHARGER 00000000 0.853712 560/800 6 R MOTIONSENSE 00000002 1.677563 696/928 7 R HOSTCMD 00000001 1.379692 792/928 8 R CONSOLE 00000000 0.172554 384/800 9 KEYSCAN 00000000 1.970870 308/672 10 PD_C0 00000000 3.960594 584/800 11 PD_C1 00000000 0.056556 584/800 12 PD_INT_C0 00000000 0.026221 544/672 13 PD_INT_C1 00000000 0.006403 480/672 BRANCH=None BUG=b:162039557 TEST=taskinfo looks good now Signed-off-by: Douglas Anderson <dianders@chromium.org> Change-Id: I5c2ff959e37b26f2dcda64536a8d3ecb1dd247e5 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2318635 Reviewed-by: Wai-Hong Tam <waihong@google.com> Reviewed-by: Philip Chen <philipchen@chromium.org>
* pompom: implement LED behaviorJosh Tsai2020-07-212-51/+82
| | | | | | | | | | | | | | Implement the EC LED code dependent on spec. BUG=b:160744331 BRANCH=none TEST=make buildall Signed-off-by: Josh Tsai <josh_tsai@compal.corp-partner.google.com> Change-Id: I727981464c5df078351aa6df76a4040272566351 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2297215 Reviewed-by: Wai-Hong Tam <waihong@google.com> Commit-Queue: Wai-Hong Tam <waihong@google.com>
* pompom: Modify battery informationJosh Tsai2020-07-212-36/+41
| | | | | | | | | | | | | Modify battery information to match spec BUG=b:160721493 BRANCH=none TEST=make buildall Signed-off-by: Josh Tsai <josh_tsai@compal.corp-partner.google.com> Change-Id: If23c5d60dceaac9feabfbd8e4378adf980903d47 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2298844 Reviewed-by: Wai-Hong Tam <waihong@google.com>
* power: Use a general name for PMIC_RESIN_L signal on sc7180 and sdm845Wai-Hong Tam2020-07-201-1/+2
| | | | | | | | | | | | | Don't bound to the PMIC part name. BRANCH=None BUG=b:148113568 TEST=Built the affected images. Change-Id: I3c2e8851294b957aa133c6a8528de3960a3e468c Signed-off-by: Wai-Hong Tam <waihong@google.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2303815 Reviewed-by: Stephen Boyd <swboyd@chromium.org>
* pompom: Initial EC imageJosh Tsai2020-07-117-0/+1026
Create the initial EC image for the pompom variant by copying the lazor reference board EC files into a new directory named for the variant. (Auto-Generated by create_initial_ec_image.sh version 1.0.3). BUG=b:160105629 BRANCH=none TEST=make BOARD=pompom Signed-off-by: Josh Tsai <josh_tsai@compal.corp-partner.google.com> Change-Id: I1341f09bb8d48f0a8cc750906f36171f8ba0eaca Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2289470 Reviewed-by: Bob Moragues <moragues@chromium.org> Reviewed-by: Wai-Hong Tam <waihong@google.com> Commit-Queue: Bob Moragues <moragues@chromium.org>
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