| Commit message (Collapse) | Author | Age | Files | Lines |
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1. The original driver of OPT3001
a. didn't support to process the command of offset.
b. implemented command of range to setter/getter of Range Number Field
of chip.
But reffering to cros_ec_light_prox.c from linux kernel side, these two
commands are actually leveraged for in_illuminance_calib[bias|scale]
and these calibration factors should be applied into raw lux value read
from the chip.
2. Move ALS in Poppy / Soraka boards from ALS_TASK to MOTIONSENSE_TASK.
3. Mofify parameters of ALS in Reef board in order to adapt changes
here.
BUG=b:69236269
BRANCH=none
TEST=Manually test on the DUT.
Change-Id: Ic3b593feb3e4bc6da0bada6b5d614975f0cf2280
Signed-off-by: Marco Chen <marcochen@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/774341
Reviewed-by: Shawn N <shawnn@chromium.org>
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Nearly every board had a buttons array defined in which its contents had
the standard volume buttons. This commit creates a single common
buttons array that can contain the standard volume buttons and recovery
buttons. If a board has volume up and down buttons, they can simply
define CONFIG_VOLUME_BUTTONS and it will populate the buttons array with
the standard definition. The buttons are active low and have a 30 ms
debounce period. Similiarly, if a board has a dedicated recovery
button, defining CONFIG_DEDICATED_RECOVERY_BUTTON will also populate the
buttons array with a recovery button.
BUG=chromium:783371
BRANCH=None
TEST=make -j buildall.
TEST=Flash a device with CONFIG_VOLUME_BUTTONS, verify pressing volume
buttons still work.
Change-Id: Ie5d63670ca4c6b146ec8ffb64d40ea9ce437b913
Signed-off-by: Aseda Aboagye <aaboagye@google.com>
Reviewed-on: https://chromium-review.googlesource.com/773794
Commit-Ready: Aseda Aboagye <aaboagye@chromium.org>
Tested-by: Aseda Aboagye <aaboagye@chromium.org>
Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org>
Reviewed-by: Shawn N <shawnn@chromium.org>
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EC seems to miss sample while providing sensor data at 200Hz.
Limit sensors ODR to 100Hz.
BUG=b:67112751
BRANCH=none
TEST=compile, tbd
Change-Id: Ic324c3d989854ae8b7f6b27bf6338266ce01ceda
Signed-off-by: Gwendal Grignou <gwendal@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/753434
Commit-Ready: Li1 Feng <li1.feng@intel.com>
Tested-by: Li1 Feng <li1.feng@intel.com>
Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
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Since poppy provides a custom battery present hw gpio, enable the
config option CONFIG_BATTERY_HW_PRESENT_CUSTOM.
BUG=b:65864825
BRANCH=None
TEST=Verified that when AC power is provided without battery present,
then EC auto powers up the AP. THis is essential for factory
testing. However, in order to make this work, CONFIG_SYSTEM_UNLOCKED
needs to be disabled. Verified device boots reliably after hardware
and software battery cutoff.
Change-Id: I9da1c68dfca3fd8c76570c78259adf42bf52522f
Signed-off-by: Furquan Shaikh <furquan@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/752686
Reviewed-by: Nicolas Boichat <drinkcat@chromium.org>
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Bump up port80 buffer size to 256.
BUG=None
BRANCH=None
TEST=Verified that all port80 messages from a boot-up or S3 resume are
present in port80 history buffer.
Change-Id: I76c95f308eaa30cc3789b93e59235a2dac0f632f
Signed-off-by: Furquan Shaikh <furquan@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/747121
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
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We define battery_is_present in board/poppy/battery.c, so we should
also set CONFIG_BATTERY_PRESENT_CUSTOM.
BRANCH=none
BUG=b:67984464
TEST=Flash soraka, battery status when connected and disconnected is correct.
TEST=Recovery from battery-cutoff is fine
TEST=Device does not get stuck in reboot loop when in critical battery
condition
Change-Id: I02a597e30513a1bb4dab86a21ea107fc4876a63b
Signed-off-by: Nicolas Boichat <drinkcat@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/727444
Reviewed-by: Furquan Shaikh <furquan@chromium.org>
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According to the USB-C spec, when a debug accessory is identified, we may
optionally establish USB PD communication over CC. Some DTS partners
(eg. servo_v4) expect us to speak PD, so let's make it so. There is no
need for special ACCESSORY states, these do not exist in the PD spec.
BRANCH=servo
BUG=chromium:737755,b:65837068
TEST=On scarlet, attach servo_v4 and verify scarlet charges. Also verify
EC and cr50 consoles are available through servo_v4.
Change-Id: I59d1ca50b4766509eccf38562cdf926578138585
Signed-off-by: Shawn Nematbakhsh <shawnn@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/693294
Commit-Ready: Shawn N <shawnn@chromium.org>
Tested-by: Shawn N <shawnn@chromium.org>
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
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- Deprecate poppy rev0.
- Remove FP_INT_L
BRANCH=none
BUG=b:65104436
TEST=make buildall -j
Change-Id: Ie2afae95a4fed43e8c2dc9e18031cf3e82eb3536
Signed-off-by: Nicolas Boichat <drinkcat@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/689817
Reviewed-by: Furquan Shaikh <furquan@chromium.org>
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In case of battery cut-off on Soraka, there is a battery requirement
that AC power should not be applied for at least 9 seconds after the
cut-off is performed. Performing battery cut-off when battery is at
critical level results in a bad user experience if the user connects
AC power within the 9-second window. Thus, instead of performing a
battery cut-off, make the EC hibernate in critical battery conditions.
BUG=b:64703097
BRANCH=None
TEST=make -j buildall
Change-Id: I40827faccd52c8628b69773cb22ccc6ed19915ed
Signed-off-by: Furquan Shaikh <furquan@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/656609
Reviewed-by: Nicolas Boichat <drinkcat@chromium.org>
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Reworked suzy-q and suzy-qable all provide Rp, so there is no need for
special detection handling in S5. Also, CONFIG_USB_PD_QUIRK_SLOW_CC_STATUS
is no longer relevant, since we no longer take special action when VBUS
is seen without Rp.
BUG=chromium:737755
BRANCH=None
TEST=On kevin, verify reworked suzy-q and suzy-qable are detected in S5.
Also, verify zinger works in S5 on reef.
Signed-off-by: Shawn Nematbakhsh <shawnn@chromium.org>
Change-Id: I50967bd6415d964a038b2e7d134374132eda11ec
Reviewed-on: https://chromium-review.googlesource.com/656067
Commit-Ready: Shawn N <shawnn@chromium.org>
Tested-by: Shawn N <shawnn@chromium.org>
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
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BRANCH=none
BUG=b:64196191
TEST=Boot soraka, hash done time goes down from ~1.30s to ~1.16s,
with a ~750 bytes code size increase.
Change-Id: I36c4253c4e89f35e13943041c9a0ddb61a314df8
Signed-off-by: Nicolas Boichat <drinkcat@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/656877
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
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Now that we have a custom battery presence function, we do not need
the disconnect behavior as it will recover better by letting the state
machine handle it with precharge directly.
Without this change, EC was stuck in "battery found in disconnect
state" after battery cut-off.
(Reference: https://chromium-review.googlesource.com/c/582538)
BUG=b:64370648,b:64460667
BRANCH=None
TEST=manual testing with cut-off batteries shows more consistent
behavior to boot AP after plugging in adapter.
Change-Id: I8d1072d29c42e5b10b133d880897287882bd698b
Signed-off-by: Furquan Shaikh <furquan@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/607036
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-by: Nicolas Boichat <drinkcat@chromium.org>
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Just checking for battery present gpio is not sufficient to determine
the state of the battery. On the lines of the changes made by Eve, add
a new battery_is_present function which:
1. Checks hardware gpio signal to determine if battery is present
2. If yes, then checks following if its status just changed to present:
a. Battery is not in cut-off state
b. Battery is not in disconnect state (charging and discharging
disabled)
c. Battery initialization is complete
Only if all the above conditions are true, then battery is considered
as present.
BUG=b:64460667,b:64370648
BRANCH=None
TEST=Verified that with this change recovering system from battery
cut-off is more consistent.
Change-Id: I10abdf603e01f404c9b8e2094e36bc068adf5450
Signed-off-by: Furquan Shaikh <furquan@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/607035
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-by: Nicolas Boichat <drinkcat@chromium.org>
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Instead of going to hibernate when the battery is critically low
we should cut off power entirely.
Even with the PMIC shut down the H1 chip consumes more power than
is healthy when the battery is already critically low, depleting it
to dangerously low voltage levels faster than it should.
(Reference: https://chromium-review.googlesource.com/582543)
BUG=b:64460667
BRANCH=None
TEST=Manual testing to ensure that EC cuts off battery when it is
critically low instead of hibernating on soraka.
Change-Id: I3befd583df64c44d43d73cda69a6486219578192
Signed-off-by: Furquan Shaikh <furquan@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/605015
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-by: Nicolas Boichat <drinkcat@chromium.org>
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With a battery that has 1% charge there may not be enough to boot the
AP, resulting in a brown out. Raise this to 2% to get more consistent
behavior to let the battery charge before booting.
(Reference: https://chromium-review.googlesource.com/582540)
BUG=b:64460667
BRANCH=None
TEST=Manual testing to ensure that EC does not attempt to boot the AP
unless the battery charge is >=2%.
Change-Id: I2c3d0e292470d44ffd8fd33e8a58c59a19548513
Signed-off-by: Furquan Shaikh <furquan@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/605013
Reviewed-by: Nicolas Boichat <drinkcat@chromium.org>
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These config options change the behavior of charge_prevent_power_on
and ignore the minimum battery percentage for booting. Since we don't
have any AP code to actually handle this state, we don't want it to
always boot the AP or it might brown out with a battery that is
critically low.
(Reference: https://chromium-review.googlesource.com/c/582539)
BUG=b:64460667
BRANCH=None
TEST=manual testing with low battery to ensure it does not attempt to
boot the AP.
Change-Id: I670a2bf7eba4354ae522d1ea2423c90ff07f5ea6
Signed-off-by: Furquan Shaikh <furquan@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/605012
Reviewed-by: Nicolas Boichat <drinkcat@chromium.org>
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We can re-use our pd_log FIFO for other purposes, such as TPM logging.
Carve out event_log, a generic logging module which pd_log is compatible
with.
BUG=b:63760920
TEST=On kevin, verify PD logging is still functional and entries are
seen in dmesg.
BRANCH=None
Change-Id: I8e6ad6f93e9eebc676aca64652c60f81da471a94
Signed-off-by: Shawn Nematbakhsh <shawnn@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/597314
Commit-Ready: Shawn N <shawnn@chromium.org>
Tested-by: Shawn N <shawnn@chromium.org>
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
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The primary purpose of the Pericom PI3USB9281 is for BC1.2 detection.
Therefore, move the driver to the bc12/ directory.
Additonally, rename the config option to match.
CONFIG_USB_SWITCH_PI3USB9281 => CONFIG_BC12_DETECT_PI3USB9281
BUG=None
BRANCH=None
TEST=`make -j buildall`
Change-Id: I02f17064c0625e62d6779f895e69899c24898f74
Signed-off-by: Aseda Aboagye <aaboagye@google.com>
Reviewed-on: https://chromium-review.googlesource.com/594710
Commit-Ready: Aseda Aboagye <aaboagye@chromium.org>
Tested-by: Aseda Aboagye <aaboagye@chromium.org>
Reviewed-by: Shawn N <shawnn@chromium.org>
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This ended up not being populated on poppy or soraka.
BRANCH=none
BUG=b:62396794
TEST=Flash poppy, barometer is not present in `accelinfo on` data.
Change-Id: I5a7bc79598e1aacf088db2e7cdcf961ceaefab20
Signed-off-by: Nicolas Boichat <drinkcat@google.com>
Reviewed-on: https://chromium-review.googlesource.com/590331
Commit-Ready: Nicolas Boichat <drinkcat@chromium.org>
Tested-by: Nicolas Boichat <drinkcat@chromium.org>
Reviewed-by: Gwendal Grignou <gwendal@chromium.org>
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EC currently uses a host command from kernel to enter s0ix.
This patch waits for the SLP_S0 interrupt to come after receiving
the host command before entering S0ix.
On the exit path, the SLP_S0 interrupt directly triggers the
exit rather than waiting for the host command.
BRANCH=none
BUG=b:37443151
TEST=check in EC logs for SLP_S0 entry and powerindebug output,
check suspend_stress_test on reef and soraka works fine,
make -j8 buildall runs fine
Change-Id: Ie5507b7a1e723532f07bc0671c2abd364f6224a2
Signed-off-by: Subramony Sesha <subramony.sesha@intel.com>
Signed-off-by: Archana Patni <archana.patni@intel.com>
Signed-off-by: Jenny TC <jenny.tc@intel.com>
Reviewed-on: https://chromium-review.googlesource.com/513705
Commit-Ready: Jenny Tc <jenny.tc@intel.com>
Tested-by: Jenny Tc <jenny.tc@intel.com>
Reviewed-by: Furquan Shaikh <furquan@chromium.org>
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BUG=b:63680313
BRANCH=none
TEST=ectool backlight 0/1 should disable/enable
display panel backlight.
Change-Id: Idcbacb3b2a3145db7bfa44917842383569869944
Signed-off-by: Jagadish Krishnamoorthy <jagadish.krishnamoorthy@intel.com>
Reviewed-on: https://chromium-review.googlesource.com/570669
Reviewed-by: Nicolas Boichat <drinkcat@chromium.org>
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On Poppy and Soraka designs PECI_DATA is not physically wired to CPU PECI
interface effectively rendering PECI feature dead. This patch disables PECI
module to be built for Poppy & Soraka.
BUG=b:63618104
BRANCH=None
TEST=Build and boot on Poppy/Soraka, PECI module should not be built.
Change-Id: Ibbf045f913a412cb68a1958527802c1e339ce860
Signed-off-by: Rajneesh Bhardwaj <rajneesh.bhardwaj@intel.com>
Reviewed-on: https://chromium-review.googlesource.com/567796
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-by: Sumeet R Pawnikar <sumeet.r.pawnikar@intel.com>
Reviewed-by: Furquan Shaikh <furquan@chromium.org>
Reviewed-by: Nicolas Boichat <drinkcat@chromium.org>
Reviewed-by: Kyoung Il Kim <kyoung.il.kim@intel.com>
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BUG=b:62076222
BRANCH=None
TEST=make -j buildall
Change-Id: Id1482cc959233b41b0d917e8650866651d9a61fe
Signed-off-by: Furquan Shaikh <furquan@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/530137
Reviewed-by: Mulin Chao <mlchao@nuvoton.com>
Reviewed-by: Nicolas Boichat <drinkcat@chromium.org>
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The first 3 board id straps stay binary, and the 4th is a tristate,
set as Z on all existing boards, so we translate Z=>0, 0=>1, 1=>2.
A few examples:
Z000 => rev0 (Z=>0 * 8 + 0b000 = 0)
Z010 => rev2 (Z=>0 * 8 + 0b010 = 2)
Z111 => rev7 (Z=>0 * 8 + 0b111 = 7)
0000 => rev8 (0=>1 * 8 + 0b000 = 8)
1001 => rev17 (1=>2 * 8 + 0b001 = 17)
BRANCH=none
BUG=b:62242438
TEST=make BOARD=poppy -j, flash, rev0/1/2 shows "Board ID" correctly.
Change-Id: Ifde5e1200b19a17a677875b0464775bd1cd8af1f
Reviewed-on: https://chromium-review.googlesource.com/522083
Commit-Ready: Nicolas Boichat <drinkcat@chromium.org>
Tested-by: Nicolas Boichat <drinkcat@chromium.org>
Reviewed-by: Furquan Shaikh <furquan@chromium.org>
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The system power monitor function, aka. PSYS, of the ISL9238 chip
is disabled by default, this patch enables PSYS monitor in the
EC driver.
BUG=b:62041842
BRANCH=none
TEST=Able to read non-zero value at the MSR of
MSR_PLATFORM_ENERGY_STATUS (0x64D) by iotools;
Also, kernel powercap driver probes PSYS domain correctly;
Such that the kernel exports the sysfs node of intel-rapl:1
Change-Id: I7a533032815e873ae74dca42ec07041be0d0f975
Signed-off-by: Harry Pan <harry.pan@intel.com>
Reviewed-on: https://chromium-review.googlesource.com/520549
Tested-by: Kane Chen <kane.chen@intel.com>
Reviewed-by: Nicolas Boichat <drinkcat@chromium.org>
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This applies the simple rule: Charging port led is on, other
is off. When charging, LED is amber, otherwise it's white.
Open questions:
- Do we want blinking on low battery? On which side(s)? In
which AP states?
- No blinking in S3? That's ok?
- Need to add led blinking support for special debug mode
- Recovery mode blinking does not work as LED is powered from
a rail that is not on when AP is in S5.
BRANCH=none
BUG=b:37970194
TEST=Charge from one side, led is first amber, then white when
battery is full. Switch side, led behaves the same way.
Change-Id: I0531d72cd621148c0d0cce57a32b7310792d9936
Reviewed-on: https://chromium-review.googlesource.com/497372
Commit-Ready: Nicolas Boichat <drinkcat@chromium.org>
Tested-by: Nicolas Boichat <drinkcat@chromium.org>
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
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Update GPIO pinout for poppy rev1. The incompatible changes
are gated with #ifdef POPPY_REV1, which can be set in board.h.
For soraka, rev1 is the default.
For poppy, we'll switch the default board revision at a later stage.
BRANCH=none
BUG=b:35585396
TEST=Build and boot poppy and soraka on poppy-rev0, still works fine.
Change-Id: Iaca1721f38566848cd725dbc396d93e4913de0d7
Reviewed-on: https://chromium-review.googlesource.com/481564
Commit-Ready: Nicolas Boichat <drinkcat@chromium.org>
Tested-by: Nicolas Boichat <drinkcat@chromium.org>
Reviewed-by: Furquan Shaikh <furquan@chromium.org>
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board_print_tcpc_fw_version is no longer called or defined.
BUG=none
BRANCH=none
TEST=make buildall
Change-Id: I11b625156c999eb811cc0298a1f2cad1a838088a
Signed-off-by: Daisuke Nojiri <dnojiri@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/491988
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
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Poppy should be able to use the low power idle mode for the npcx EC
to get lower power in S3, and in S5 before we enter hibernate.
BUG=b:36372576
BRANCH=none
TEST=build and boot on poppy (with HW VBUS rework and HACK CLs),
enter S3 or S5 and observe, using idlestats, that dsleep gets
enabled after the 15 second console idle timeout.
Change-Id: Ide656711ef87313aec396e34284982b77040dc23
Reviewed-on: https://chromium-review.googlesource.com/487921
Commit-Ready: Nicolas Boichat <drinkcat@chromium.org>
Tested-by: Nicolas Boichat <drinkcat@chromium.org>
Reviewed-by: Furquan Shaikh <furquan@chromium.org>
Reviewed-by: Ruben Rodriguez Buchillon <coconutruben@chromium.org>
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In npcx's fan driver, ec selected mode 5 and capturer A as tachometer's
input. Choosing TB2 as the second tachometer source is not correct since
we didn't initialize the registers for TB2. This patch modified the
second tachometer's input from TB2 to TA2 and passed the verification by
following changes.
1. Add the second fan settings in pwm_channels, fans, and mft_channels
arraies.
2. Modified ALTERNATE marco for pwm-type fans.
3. Set CONFIG_FAN from 1 to 2.
4. Set NPCX_TACH_SEL2 to 1 to test tachometer input 2. (ie.GPIO73/A6)
BRANCH=none
BUG=none
TEST=test dual fans with fanset command on npcx_evb and use faninfo for
verifying. Measure the actual rpm by scope.
Change-Id: Ia1af2732d9a64e24285d12371223eb0e77e53357
Signed-off-by: Mulin Chao <mlchao@nuvoton.com>
Reviewed-on: https://chromium-review.googlesource.com/472310
Reviewed-by: Randall Spangler <rspangler@chromium.org>
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This patch enables the entry/exit model for S0ix based on host
commands. The kernel will send host events on kernel freeze/thaw exit;
EC will initiate the S0ix entry based on host command and exit via
another host command from kernel.
BRANCH=none
BUG=b:36630881
TEST=Build/flash EC and check 'echo freeze > /sys/power/state'
command in OS shell. Verify EC goes to S0ix state, and on wake
it comes back to S0 state.
Change-Id: I22405021aead8488a5a1f166400cbde76faac59b
Signed-off-by: Subramony Sesha <subramony.sesha@intel.com>
Signed-off-by: Archana Patni <archana.patni@intel.com>
Reviewed-on: https://chromium-review.googlesource.com/446219
Commit-Ready: Archana Patni <archana.patni@intel.corp-partner.google.com>
Tested-by: Archana Patni <archana.patni@intel.corp-partner.google.com>
Reviewed-by: Furquan Shaikh <furquan@chromium.org>
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This will eventually be used for debug mode.
BRANCH=none
BUG=b:35775099
TEST=sysrq available in EC console
TEST=sysrq h => help message in AP console
TEST=sysrq b => AP reboots
Change-Id: I56b3a1f8f4b32d3ead91b83d474546356b65d221
Reviewed-on: https://chromium-review.googlesource.com/462757
Commit-Ready: Nicolas Boichat <drinkcat@chromium.org>
Tested-by: Nicolas Boichat <drinkcat@chromium.org>
Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
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Allows simulating volume buttons using "button vup/vdown"
BRANCH=none
BUG=b:36444691
TEST=button vup, evtest sees the event.
Change-Id: I0a464601e2e36c481cc834a6a744bfcd6b4cdc7b
Reviewed-on: https://chromium-review.googlesource.com/457004
Commit-Ready: Nicolas Boichat <drinkcat@chromium.org>
Tested-by: Nicolas Boichat <drinkcat@chromium.org>
Reviewed-by: Furquan Shaikh <furquan@chromium.org>
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In order to enable toggling on/off of LTE based on chipset power state
transitions, define WIRELESS_GPIO_WWAN that would allow the common
wireless component to take care of the gpio toggling.
BUG=b:36447195
BRANCH=None
TEST=Verified that PP3300_A drops down from 0.9V to 0.63V when
apshutdown is done on EC console and system transitions to fake G3.
Change-Id: Id46bcbdffde06e4929910b6ab87a6d9a96d18a23
Signed-off-by: Furquan Shaikh <furquan@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/457402
Commit-Ready: Nicolas Boichat <drinkcat@chromium.org>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-by: Jerry Parson <jwp@chromium.org>
Reviewed-by: Nicolas Boichat <drinkcat@chromium.org>
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With this change when external power adapter is plugged in
without a battery it will not prevent power on if there is
enough power.
BUG=b:35775049
BRANCH=None
TEST=On poppy: unplug battery, connect external power adapter
and the board should boot up.
Change-Id: I533ab6a5de5ebc17f6c05c772db742489a44c327
Signed-off-by: Divya Sasidharan <divya.s.sasidharan@intel.com>
Reviewed-on: https://chromium-review.googlesource.com/455277
Commit-Ready: Divya S Sasidharan <divya.s.sasidharan@intel.com>
Tested-by: Divya S Sasidharan <divya.s.sasidharan@intel.com>
Reviewed-by: Vijay P Hiremath <vijay.p.hiremath@intel.com>
Reviewed-by: Nicolas Boichat <drinkcat@chromium.org>
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BUG=b:35775100
BRANCH=None
TEST=Verified that tablet mode switch events can be seen in evtest.
Event: time 1489093184.754803, -------------- SYN_REPORT ------------
Event: time 1489093196.842930, type 5 (EV_SW), code 1 (SW_TABLET_MODE), value 0
Event: time 1489093196.842930, -------------- SYN_REPORT ------------
Event: time 1489093198.839809, type 5 (EV_SW), code 1 (SW_TABLET_MODE), value 1
Event: time 1489093198.839809, -------------- SYN_REPORT ------------
Change-Id: Id47e817ba12294cc07281df3e04a9d68dec40ee7
Signed-off-by: Furquan Shaikh <furquan@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/451582
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
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This is used for passing button information from EC to AP.
BUG=b:3577493
BRANCH=None
TEST=Verified using evtest that kernel is able to see button
press/release information.
Change-Id: Ifcad417c232c4e6e27e1024d2bed27133250fa07
Signed-off-by: Furquan Shaikh <furquan@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/450937
Reviewed-by: Nicolas Boichat <drinkcat@chromium.org>
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Enable CONFIG_USB_PD_TCPC_LOW_POWER, and add cable detection handling.
BRANCH=none
BUG=chrome-os-partner:62964
TEST=on poppy, connect USB-A keyboard to ANX port via A-C adapter:
keyboard works; charging works
Change-Id: I0751cc7b5fc8ba71388f08b7001c0daceda37bb6
Reviewed-on: https://chromium-review.googlesource.com/443747
Commit-Ready: Nicolas Boichat <drinkcat@chromium.org>
Tested-by: Nicolas Boichat <drinkcat@chromium.org>
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
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This removes CONFIG_USB_PD_TCPC_FW_VERSION.
board_print_tcpc_fw_version is removed since it's no longer called.
PD chip info is printed in usb_pd_protocol.c.
BUG=none
BRANCH=none
TEST=buildall. Boot Electro, verify chip info is printed.
Change-Id: I2ff860c2a1b17ceea124644ba8feb356b9cca2eb
Signed-off-by: Daisuke Nojiri <dnojiri@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/434911
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
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Servo_v4 requires the ability to have a different default state per
port. In previous devices, the assumption was that each supported port
had the same default usb pd state and power role. This CL moves the
by the default power role which in turn is derived from
CONFIG_USB_PD_DUAL_ROLE. In addiiton to moving the location, it now
uses 'port' as argument so it can be port specific if required.
PD_DEFAULT_STATE was a board.h specific config, but in practice each
instance used to date was set to PD_STATE_SNK_DISCONNECTED if
CONFIG_USB_PD_DUAL_ROLE was defined and set to
PD_STATE_SRC_DISCONNECTED otherwise.
BUG=chrome-os-partner:61878
BRANCH=servo
TEST=Manual run 'make -j buildall' to verify that all instances of
PD_DEFAULT_STATE were removed.
Change-Id: Iaf40718668732f525485ed7942ee7fc246d3f75d
Signed-off-by: Scott <scollyer@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/431787
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
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BRANCH=none
BUG=chrome-os-partner:61098
TEST="amon" in EC consoles, values make sense.
Change-Id: Id1299aff3a6a24c306c8990c5eaf523aa0c27e45
Reviewed-on: https://chromium-review.googlesource.com/430475
Commit-Ready: Nicolas Boichat <drinkcat@chromium.org>
Tested-by: Nicolas Boichat <drinkcat@chromium.org>
Reviewed-by: Shawn N <shawnn@chromium.org>
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Move GPIOs around so that VBUS detection is done via 2 GPIOs on
the EC side.
BRANCH=none
BUG=chrome-os-partner:61098
BUG=chrome-os-partner:61929
BUG=chrome-os-partner:61997
TEST=Rework board, VBUS detection works on both ports.
Change-Id: I5021b0877eff2e5710a42c7ba244faa557a361cb
Reviewed-on: https://chromium-review.googlesource.com/428485
Commit-Ready: Nicolas Boichat <drinkcat@chromium.org>
Tested-by: Nicolas Boichat <drinkcat@chromium.org>
Reviewed-by: Shawn N <shawnn@chromium.org>
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Base has 5.1K pull-down on detection pin, and there is a 100K
pull-up in the lid.
Accepts ADC values between 140 mV and 180 mV (4.4K to 5.8K) to
detect the base, and debounce for 5 ms. These values should be
verified later on with real hardware.
BRANCH=none
BUG=chrome-os-partner:61970
TEST=Manually with 5.1K resistor between BASE_DET_A and GND.
Change-Id: Ifded8475b06f8245e2636aa683beb0d2d0a9721d
Reviewed-on: https://chromium-review.googlesource.com/428733
Commit-Ready: Nicolas Boichat <drinkcat@chromium.org>
Tested-by: Nicolas Boichat <drinkcat@chromium.org>
Reviewed-by: Shawn N <shawnn@chromium.org>
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Also program EC_PLATFORM_RST as an out signal from the EC.
BUG=chrome-os-partner:61883
BRANCH=None
TEST=Verified that reboot on EC console works fine for poppy. Board is
no longer stuck in G3.
Change-Id: I0a2b052790fec2d55417e32f5aea53a7438a038f
Signed-off-by: Furquan Shaikh <furquan@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/431193
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
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poppy enters recovery mode by pressing volume up+down keys
BRANCH=none
BUG=chrome-os-partner:61930
TEST=Press Power+Volume Up+Volume Down, poppy enters recovery
Change-Id: I052277a3107b2133bdec46b1219cfc6ff6c54680
Reviewed-on: https://chromium-review.googlesource.com/428531
Commit-Ready: Nicolas Boichat <drinkcat@chromium.org>
Tested-by: Nicolas Boichat <drinkcat@chromium.org>
Reviewed-by: Shawn N <shawnn@chromium.org>
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Very similar to CL:424846, enable sensor FIFO, accel interrupt.
BUG=chrome-os-partner:61098
TEST=Not test on actual hardware.
BRANCH=none
Change-Id: Ie5c7304fcc00919cce62ed47a548104e8d0ac454
Signed-off-by: Gwendal Grignou <gwendal@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/426880
Reviewed-by: Nicolas Boichat <drinkcat@chromium.org>
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Add support for poppy board with:
- chip: npcx
- pmic: bd999992GW
- charger: isl9238
- tcpc: 1x anx3429, 1x ps8751
- bc12: pi3usb9218c
BRANCH=none
BUG=chrome-os-partner:61098
TEST=make BOARD=poppy -j
Change-Id: I3439399b85ba49b4c733536d614118faeeeb0f93
Reviewed-on: https://chromium-review.googlesource.com/422263
Commit-Ready: Nicolas Boichat <drinkcat@chromium.org>
Tested-by: Nicolas Boichat <drinkcat@chromium.org>
Reviewed-by: Duncan Laurie <dlaurie@google.com>
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