| Commit message (Collapse) | Author | Age | Files | Lines |
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In the interest of making long-term branch maintenance incur as little
technical debt on us as possible, we should not maintain any files on
the branch we are not actually using.
This has the added effect of making it extremely clear when merging CLs
from the main branch when changes have the possibility to affect us.
The follow-on CL adds a convenience script to actually pull updates from
the main branch and generate a CL for the update.
BUG=b:204206272
BRANCH=ish
TEST=make BOARD=arcada_ish && make BOARD=drallion_ish
Signed-off-by: Jack Rosenthal <jrosenth@chromium.org>
Change-Id: I17e4694c38219b5a0823e0a3e55a28d1348f4b18
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3262038
Reviewed-by: Jett Rink <jettrink@chromium.org>
Reviewed-by: Tom Hughes <tomhughes@chromium.org>
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pd_timer was changed to use bitmask_uint64 to
create the equivalent of BIT(o) for uint64_t
bitmasks
BUG=none
BRANCH=none
TEST=make buildall
Signed-off-by: Denis Brockus <dbrockus@google.com>
Change-Id: I7cc6a24771a9c5e1050fa1c3ff1391ef77518b80
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3182631
Tested-by: Denis Brockus <dbrockus@chromium.org>
Auto-Submit: Denis Brockus <dbrockus@chromium.org>
Commit-Queue: Yuval Peress <peress@google.com>
Reviewed-by: Yuval Peress <peress@google.com>
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This removes the use of adc_chip.h where adc.h is also used. In this
case, adc_chip.h is redundant.
BRANCH=none
BUG=b:181271666
TEST=buildall passes
Change-Id: Id7baf9aef949447a4d47934242f9bae97c971262
Signed-off-by: Caveh Jalali <caveh@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3120317
Reviewed-by: Keith Short <keithshort@chromium.org>
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Rename CONFIG_CROS_BOARD_INFO to CONFIG_CBI_EEPROM to make it clear
that the information comes from on-board EEPROM.
It sets up the groundwork for adding more options of CBI sources later.
BRANCH=None
BUG=b:186264627
TEST=make buildall -j
Signed-off-by: Philip Chen <philipchen@google.com>
Change-Id: I9a6feee0a8b35bbf29e445544243485507767ad8
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2945792
Reviewed-by: Philip Chen <philipchen@chromium.org>
Commit-Queue: Philip Chen <philipchen@chromium.org>
Tested-by: Philip Chen <philipchen@chromium.org>
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Commands that are send peridically or in high number are not
reported on the console through CONFIG_SUPPRESSED_HOST_COMMANDS
variable.
Use the same set of commands throughout to avoid misses like
newer command EC_CMD_GET_UPTIME_INFO.
BUG=none
BRANCH=none
TEST=buildall
Signed-off-by: Gwendal Grignou <gwendal@google.com>
Change-Id: I0041576538a8cc659c262118b1503777b9ea8578
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2851452
Reviewed-by: Gwendal Grignou <gwendal@chromium.org>
Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org>
Reviewed-by: Craig Hesling <hesling@chromium.org>
Tested-by: Gwendal Grignou <gwendal@chromium.org>
Commit-Queue: Gwendal Grignou <gwendal@chromium.org>
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Today some platforms include MKBP_KEYBOARD because they use side buttons,
switches or other events that share the same driver with MKBP keyboard.
Those platforms don't enable KEYSCAN task. The CL is moving key emulation
functionality to MKBP input devices, to make a clear separation
between the real keyboard usage and emulation/buttons/switches/etc.
All boards that were selecting `CONFIG_KEYBOARD_PROTOCOL_MKBP` without
KEYSCAN task are now updated to select `CONFIG_MKBP_INPUT_DEVICES`
BUG=b:170966461
BRANCH=main,firmware-dedede-13606.B,firmware-volteer-13672.B-main
TEST=None
Signed-off-by: Boris Mittelberg <bmbm@google.com>
Change-Id: I515140ebf6e175f4b29991329f92266ffca232a8
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2824044
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Move the "thermistor.h" header to the include/driver/temp_sensor
directory. It is used by the Zephyr shim, so the change is useful to
include the header.
BUG=b:180403276
BRANCH=none
TEST=make buildall
Signed-off-by: Dawid Niedzwiecki <dn@semihalf.com>
Change-Id: I0e83df97e50a3b324440b65ddb900ddf135f2439
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2843323
Reviewed-by: Keith Short <keithshort@chromium.org>
Commit-Queue: Keith Short <keithshort@chromium.org>
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Use board-specific override files when generating VIFs for boards.
BUG=b:172276715
TEST=make buildall
BRANCH=none
Signed-off-by: Abe Levkoy <alevkoy@chromium.org>
Change-Id: I197365018ceb8197c22d631cebf4cbce1c0119f7
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2785506
Reviewed-by: Denis Brockus <dbrockus@chromium.org>
Commit-Queue: Denis Brockus <dbrockus@chromium.org>
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Almost every relevant board copy-pastes 5000 us. Make that the default
and get rid of the redundant definitions. This is the approximate result
of this command:
find . -type f -name *.h | xargs sed -i -E \
'/#define CONFIG_USBC_VCONN_SWAP_DELAY_US[[:space:]]+5000[[:space:]]/d'
BUG=b:144165680
TEST=make buildall
BRANCH=none
Change-Id: Ife86f9752971abcd7ab5ad5a5e607eb2ccbde2ba
Signed-off-by: Abe Levkoy <alevkoy@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2628132
Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
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Replace PD_VCONN_SWAP_DELAY with CONFIG_USBC_VCONN_SWAP_DELAY_US. This
is the approximate result of the following command, run from
platform/ec:
find . -type f -\( -name '*.c' -o -name '*.h' -\) | \
xargs sed -iE 's/PD_VCONN_SWAP_DELAY/CONFIG_USBC_VCONN_SWAP_DELAY/g'
Fix some latent formatting errors in usb_pd_protocol.c, because they
were preventing pre-upload hooks from passing.
BUG=b:144165680
TEST=make buildall
BRANCH=none
Signed-off-by: Abe Levkoy <alevkoy@chromium.org>
Change-Id: Icaf3b309c08fdcd162e960cf5dc88185016b5d2d
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2628131
Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
Commit-Queue: Aseda Aboagye <aaboagye@chromium.org>
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In Zephyr CONFIG_FLASH_SIZE is a Kconfig value that is used
throughout. The issue is that the units don't match. In
Zephyr the value is in KiB instead of bytes. This refactor
simply renames CONFIG_FLASH_SIZE in platform/ec to include
the unit (via _BYTES).
BRANCH=none
BUG=b:174873770
TEST=make buildall
be generated by the build instead of per board
Signed-off-by: Yuval Peress <peress@chromium.org>
Change-Id: I44bf3c7a20fcf62aaa9ae15715be78db4210f384
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2627638
Reviewed-by: Jack Rosenthal <jrosenth@chromium.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Tom Hughes <tomhughes@chromium.org>
Commit-Queue: Jack Rosenthal <jrosenth@chromium.org>
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This header cannot currently be accessed by Zephyr since it is in a
driver directory, not an include directory. This header has quite a
bit of public stuff in it, so it seems reasonable to consider
everything public.
Move the header file and update all users.
BUG=b:175434113
BRANCH=none
TEST=make buildall -j30
build volteer on zephyr
Signed-off-by: Simon Glass <sjg@chromium.org>
Change-Id: Ibba37f47a06783fafb5095f853f2a68d92b6df87
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2607745
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Now that the DPM will be handling source-out decisions for TCPMv2,
remove references to its old configuration options from TCPMv2 boards in
order to avoid any confusion as to what code is running now. Also
remove the charge manager notifications of sink attach/detach since the
policy is being centralized into the DPM.
Note that the previous configuration options only ever allocated one 3.0
A port, and so the default number of 3.0 A ports has been set to 1.
BRANCH=None
BUG=b:168862110,b:141690755
TEST=make -j buildall
Signed-off-by: Diana Z <dzigterman@chromium.org>
Change-Id: Ie452e3da32b04226503539daa67b6b9f4a58aa58
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2597431
Reviewed-by: Keith Short <keithshort@chromium.org>
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This header file is used from quite a few files, relying on the EC
build system to find includes in the driver/tcpm directory. For Zephyr
we don't want to add that as an include.
It makes more sense for header files to be in an include directory, so
move it and fix up the users.
BUG=b:175434113
BRANCH=none
TEST=build Zephyr and ECOS on volteer
Signed-off-by: Simon Glass <sjg@chromium.org>
Change-Id: I5851914b1a7d3fdc1ba911c0fbe9046afbaf6f5d
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2597985
Reviewed-by: Keith Short <keithshort@chromium.org>
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Rename CONFIG_I2C_CONTROLLER and related comments.
BRANCH=None
BUG=None
TEST=make -j buildall
Signed-off-by: Diana Z <dzigterman@chromium.org>
Change-Id: Ied6a1829bf54a5c9a32e6772982a4b8aa31aaf23
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2518659
Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org>
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Update new thermal table
BUG=b:166696500
BRANCH=master
TEST=Thermal team verified thermal policy is expected.
Signed-off-by: David Huang <david.huang@quanta.corp-partner.google.com>
Change-Id: I86e1a6a3eecf9dc4088a866f8801a2a2088f7de2
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2417787
Reviewed-by: Andrew McRae <amcrae@chromium.org>
Commit-Queue: Andrew McRae <amcrae@chromium.org>
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When the LED alert is turned off, set the correct LED state
by using the hook functions.
BUG=b:168189235
TEST=Check LED state during multiple power cycles
when powering with type-C adapter.
BRANCH=none
Signed-off-by: Andrew McRae <amcrae@google.com>
Change-Id: I0c81878cffb7fc89902e0364448b958a755d8de7
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2404909
Tested-by: Andrew McRae <amcrae@chromium.org>
Reviewed-by: Peter Marheine <pmarheine@chromium.org>
Commit-Queue: Andrew McRae <amcrae@chromium.org>
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Use FW_CONFIG to set correct thermal config for different sku.
BUG=b:166696500, b:167477885
BRANCH=master
TEST=Thermal team verified thermal policy is expected.
Signed-off-by: David Huang <david.huang@quanta.corp-partner.google.com>
Change-Id: I53a4998da5b01cfa4c69335062a64cbff2433752
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2391033
Reviewed-by: Andrew McRae <amcrae@chromium.org>
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A new field has been added to the f/w config for defining
the thermal solution used on the board.
Add support for this new field. The config specific handling
for this field has not been added yet.
BUG=b:167981895
TEST=make buildall
BRANCH=none
Signed-off-by: Andrew McRae <amcrae@google.com>
Change-Id: Idd2616ef25fdf13245d31f63751e47b4565cad07
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2396975
Reviewed-by: Peter Marheine <pmarheine@chromium.org>
Reviewed-by: Andrew McRae <amcrae@chromium.org>
Commit-Queue: Andrew McRae <amcrae@chromium.org>
Tested-by: Andrew McRae <amcrae@chromium.org>
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Update new thermal table
BUG=b:166696500
BRANCH=master
TEST=Thermal team verified thermal policy is expected.
Signed-off-by: David Huang <david.huang@quanta.corp-partner.google.com>
Change-Id: Ie729cb44469ab07bb7a72b661685f833a7871ede
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2379367
Reviewed-by: Andrew McRae <amcrae@chromium.org>
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The PPC (sn5s330) internally disables PP1 if the source drops,
so upon CPU restart when the rail is up, check whether we are
sourcing VBUS and re-enable it if necessary.
BUG=b:161963268
TEST=Run firmware_FwScreenPressPower test and monitor VBUS via twinkie.
BRANCH=none
Signed-off-by: Andrew McRae <amcrae@google.com>
Change-Id: Ibe1c2151526ac1c20690e1891272efbb811f3d8c
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2377063
Reviewed-by: Peter Marheine <pmarheine@chromium.org>
Commit-Queue: Andrew McRae <amcrae@chromium.org>
Tested-by: Andrew McRae <amcrae@chromium.org>
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Earlier board versions did not always have the correct CBI settings, so
a hack was added to correctly set the fw_config for those boards.
This is no longer necessary, and should be removed before RO.
BUG=b:165883533
TEST=Build and run on puff.
BRANCH=puff
Signed-off-by: Andrew McRae <amcrae@google.com>
Change-Id: I596f5b0f4c76a834e23e3c833f440308e5bb4b85
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2367425
Tested-by: Sam McNally <sammc@chromium.org>
Reviewed-by: Sam McNally <sammc@chromium.org>
Commit-Queue: Andrew McRae <amcrae@chromium.org>
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Description taken from crrev/2337430:
TPMs with old firmware version cannot detect AP initiated reset eg. AP
gets reset when CSE Lite SKU jumps from RO to RW. Enable AP reset
command handler so that AP can request EC to perform the reset. This
will lead to TPM detecting the AP reset.
BUG=b:162290856
TEST=FAFT EC tests
BRANCH=puff
Signed-off-by: Andrew McRae <amcrae@google.com>
Change-Id: I2c3b805b2099e6cc5fff8dc945b575a89ef04465
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2366313
Tested-by: Edward O'Callaghan <quasisec@chromium.org>
Commit-Queue: Andrew McRae <amcrae@chromium.org>
Commit-Queue: Edward O'Callaghan <quasisec@chromium.org>
Reviewed-by: Edward O'Callaghan <quasisec@chromium.org>
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The latest Puff board variants remove temperature sensor 2
and change the location of temperature sensor 1 to the SoC core.
Since one sensor has been removed, this change is backwards compatible
with previous boards (with the only exception that the location of the
sensor has changed, so the description is different). For previous
boards, the second temp sensor will be ignored.
BUG=b:162909373
TEST=Confirm that puff and variants only monitor one temp sensor.
BRANCH=none
Signed-off-by: Andrew McRae <amcrae@google.com>
Change-Id: I0b03cbb24460a6569d36fbc6a0dab1c3c58dffbd
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2336350
Tested-by: Andrew McRae <amcrae@chromium.org>
Reviewed-by: Peter Marheine <pmarheine@chromium.org>
Commit-Queue: Andrew McRae <amcrae@chromium.org>
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This change prepares to separate the sleep failure detection out of
intel_x86, such that other chipset power sequence can reuse the code.
It only touches the naming. No logic changes.
* Rename to CONFIG_POWER_SLEEP_FAILURE_DETECTION
* Modify the function and variable names, to avoid S0ix
* Modify the comment to more neutral
BRANCH=None
BUG=b:162083524
TEST=make buildall -j
Change-Id: I6a61c3b0a63af60913ee89e0ca343085fbd22308
Signed-off-by: Wai-Hong Tam <waihong@google.com>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2321872
Reviewed-by: Eric Yilun Lin <yllin@chromium.org>
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Google is working to change its source code to use more inclusive
language. To that end, replace the terms "sane", "sanity check", and
similar with inclusive/non-stigmatizing alternatives.
BUG=b:161832469
BRANCH=None
TEST=`make buildall -j` succeeds. `grep -Eir "sane|sanity" .` shows
results only in third-party code or documentation.
Signed-off-by: Paul Fagerburg <pfagerburg@chromium.org>
Change-Id: I29e78ab27f84f17b1ded75cfa10868fa4e5ae88c
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2311169
Reviewed-by: Jett Rink <jettrink@chromium.org>
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In readiness for production, turn off CONFIG_SYSTEM_UNLOCKED.
BUG=b:161495311
TEST=Run test platform_ServoPowerStateController_USBPluggedin
BRANCH=none
Signed-off-by: Andrew McRae <amcrae@google.com>
Change-Id: Iac6eb3c785a8bdf56f01c58edb96abd0eebc1688
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2304229
Reviewed-by: Peter Marheine <pmarheine@chromium.org>
Commit-Queue: Andrew McRae <amcrae@chromium.org>
Tested-by: Andrew McRae <amcrae@chromium.org>
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Delay turning off the power LED during suspend/shutdown.
The CPU CSME-Lite processing introduced extra CPU transitions,
which caused the power LED to turn on/off/on during startup.
BUG=b:160282627
TEST=Ensure that powering on does not blink the LED.
BRANCH=none
Change-Id: I4d605f3d484159ba4e6384e85cf194873655e674
Signed-off-by: Andrew McRae <amcrae@google.com>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2297078
Reviewed-by: Peter Marheine <pmarheine@chromium.org>
Reviewed-by: Andrew McRae <amcrae@chromium.org>
Commit-Queue: Andrew McRae <amcrae@chromium.org>
Tested-by: Andrew McRae <amcrae@chromium.org>
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- Reset the port partner by applying CC Open on both CC lines
- Reuse the existing error recovery state to apply CC values
- Extend error recovery timer to 240 msec to account for us being able
to source Vconn
- Since we always reset on startup, we don't need to store previous
contracts in BBRAM.
BRANCH=none
BUG=b:159495742,b:158802939
TEST=see that we apply CC Open upon reset
TEST=see that we do not get a fault on Trembyle went setting CC open
TEST=apple 3-1 dongle with display port and power on Puff will come back
with power and display after a `reboot` EC command (which will trigger
the ErrorRecovery brownout path)
Signed-off-by: Jett Rink <jettrink@chromium.org>
Change-Id: Iaac09d62e4a31557492cebb354d3a34371c1e9bb
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2271002
Reviewed-by: Denis Brockus <dbrockus@chromium.org>
Reviewed-by: Diana Z <dzigterman@chromium.org>
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BUG=none
BRANCH=none
TEST=Verify current can up to 3A after attached usbc dock.
Signed-off-by: Devin Lu <Devin.Lu@quantatw.com>
Change-Id: I52a346c600ce464733d0523d4ae950378b429ba8
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2289331
Reviewed-by: Andrew McRae <amcrae@chromium.org>
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Puff has dev_key for signing RW copies because Puff used to boot
on EFS1. Puff has switched to EFS2. This patch removes dev_key.pem.
BUG=b:147298634
BRANCH=none
TEST=make BOARD=puff
Signed-off-by: Daisuke Nojiri <dnojiri@chromium.org>
Change-Id: I1b55707deb1f1773315f749f33cb0b3597b386db
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2254543
Reviewed-by: Andrew McRae <amcrae@chromium.org>
Reviewed-by: Peter Marheine <pmarheine@chromium.org>
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Noibat does not include USB A port 4.
Add a field to the fw_config to represent this, and use the field
to determine whether the port overcurrent interrupt should be
enabled or accessed.
BUG=b:156988621
TEST=build all and check that Puff still works.
BRANCH=none
Change-Id: Ie602974db0e9492d4dc44be53349d41f4565112d
Signed-off-by: Andrew McRae <amcrae@google.com>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2269395
Tested-by: Andrew McRae <amcrae@chromium.org>
Reviewed-by: Peter Marheine <pmarheine@chromium.org>
Commit-Queue: Andrew McRae <amcrae@chromium.org>
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Status lines from USB port 2 & 3 power controllers.
Added in board version 2, and present in all later versions.
BUG=b:160114237
TEST=buildall and check on puff variant.
BRANCH=none
Signed-off-by: Andrew McRae <amcrae@google.com>
Change-Id: I916bdc7681e66c9003bc57b1d1aae02882a9a942
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2272417
Reviewed-by: Peter Marheine <pmarheine@chromium.org>
Commit-Queue: Andrew McRae <amcrae@chromium.org>
Tested-by: Andrew McRae <amcrae@chromium.org>
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Reset the TCPC after a power-on restart, and clear any explicit
PD contract so that the previous state is not restored.
Even though Puff does not have BBRAM, the state is required
for restarts so that PD can determine when power needs to be
renegotiated explicitly through sending a soft reset, or
not since the system is starting from a fresh connection.
The impact was that a system powered from a type-C charger
would not go into recovery since a restart assumed it was
an initial charger connection (so no soft reset was sent),
the wait for capabilities timed out, and a hard reset was sent,
causing the charger to cycle power, and thereby skipping the
recovery stage.
BUG=b:159281839
TEST=Confirm that recovery can be entered using type-C charger.
BRANCH=none
Signed-off-by: Andrew McRae <amcrae@google.com>
Change-Id: Ibecf75e999ae5ff15580ce69c3a58a3c49930b48
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2251706
Tested-by: Andrew McRae <amcrae@chromium.org>
Reviewed-by: Peter Marheine <pmarheine@chromium.org>
Commit-Queue: Andrew McRae <amcrae@chromium.org>
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Monitor the power usage and if necessary apply
throttles to reduce power demand.
go//puff-power-distro
BUG=b:151252619
TEST=Reduce power margin and check that throttling occurs.
BRANCH=none
Signed-off-by: Andrew McRae <amcrae@google.com>
Change-Id: Ib385cbf561795be0b424cf6a9a15c976e20d8b80
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2224677
Reviewed-by: Peter Marheine <pmarheine@chromium.org>
Commit-Queue: Andrew McRae <amcrae@chromium.org>
Tested-by: Andrew McRae <amcrae@chromium.org>
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The CR50 will reset the EC on some platforms after power-on.
Add a reset flag to detect this and treat the second
restart as a power-on restart rather than reset.
Subsume the CONFIG_GPIO_INIT_POWER_ON_DELAY_MS config
to make it clear what the behaviour will be.
BUG=b:151329011
TEST=Confirm on dalboz, puff & variants that second reset is
treated correctly.
BRANCH=none
Change-Id: Ib66de920403f08099b87d1eff797270606b44f8f
Signed-off-by: Andrew McRae <amcrae@google.com>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2255830
Reviewed-by: Peter Marheine <pmarheine@chromium.org>
Commit-Queue: Andrew McRae <amcrae@chromium.org>
Tested-by: Andrew McRae <amcrae@chromium.org>
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Follow the thermal team test, modify parameter that max/min Fan
rpm and thermal config table.
BUG=b:159172924
BRANCH=none
TEST=Thermal team verified thermal policy is expected.
Change-Id: I9b1442c8c2591dea5e7fcbdcd106ca19a3a7f4ae
Signed-off-by: Ben Chen <ben.chen2@quanta.corp-partner.google.com>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2249650
Reviewed-by: Andrew McRae <amcrae@chromium.org>
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For board versions 1 and 2, the fw_config field was not set correctly
in the factory, so attempt to use the SKU ID to set it to a correct
value.
BUG=b:158728444
TEST=Boot on various SKU ids and check they are recognised.
BRANCH=none
Signed-off-by: Andrew McRae <amcrae@google.com>
Change-Id: Ie590f9f6d9ee230b6f55764bf3d6e9ae1e42c82f
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2241074
Tested-by: Andrew McRae <amcrae@chromium.org>
Reviewed-by: Sam McNally <sammc@chromium.org>
Commit-Queue: Andrew McRae <amcrae@chromium.org>
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To allow for up to 16 barreljack ratings, expand
the fw_config barreljack field to 4 bits.
This is backwards compatible with the existing fw_config
allocation.
BUG=b:158716456
TEST=Confirm correct power adapter parameters are selected.
BRANCH=none
Signed-off-by: Andrew McRae <amcrae@google.com>
Change-Id: If7470b88233c12be81ff1200ec4d1c1af550f3e2
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2237452
Tested-by: Andrew McRae <amcrae@chromium.org>
Commit-Queue: Peter Marheine <pmarheine@chromium.org>
Reviewed-by: Peter Marheine <pmarheine@chromium.org>
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Using measured values from b/143501304 adjust the
USB PD timing parameters:
tVBUSON = 1.9ms
tVBUSOFF = 472us
tVCONNON = 80.5us
tVCONNOFF = 6.157ms
BUG=b:143501304
TEST=Connect/disconnect type C hub and monitor and ensure they still work.
BRANCH=none
Change-Id: Ib45d2c3c7fbbd6f67e17d8a41185096412f8b7d9
Signed-off-by: Andrew McRae <amcrae@google.com>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2235234
Tested-by: Andrew McRae <amcrae@chromium.org>
Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
Commit-Queue: Andrew McRae <amcrae@chromium.org>
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Reset the TCPC even in RW if there has been a system reset
or after power on.
BUG=b:155145509
TEST=Confirm on Kaisa that type-C power replug works.
BRANCH=none
Change-Id: Ib9fc1298cf165aed2ee386a7f158ee73ba15eb37
Signed-off-by: Andrew McRae <amcrae@google.com>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2227788
Reviewed-by: Peter Marheine <pmarheine@chromium.org>
Tested-by: Andrew McRae <amcrae@chromium.org>
Commit-Queue: Andrew McRae <amcrae@chromium.org>
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BUG=b:157554433
TEST=Run on Puff
BRANCH=none
Change-Id: I9566dd8bc59b6a508ab2a98d08ffcc2708c121e0
Signed-off-by: Andrew McRae <amcrae@google.com>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2217601
Reviewed-by: Jett Rink <jettrink@chromium.org>
Tested-by: Andrew McRae <amcrae@chromium.org>
Commit-Queue: Andrew McRae <amcrae@chromium.org>
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After a reset of the TCPC, clear the saved PD state
from BBRAM.
BUG=b:155145509
TEST=Build and boot puff.
BRANCH=none
Change-Id: I4e7af5ecb9b12d9b1fd93a7a2c72be91789f0c85
Signed-off-by: Andrew McRae <amcrae@google.com>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2206524
Tested-by: Andrew McRae <amcrae@chromium.org>
Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
Commit-Queue: Andrew McRae <amcrae@chromium.org>
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Extend the tcpci register dump command to allow chip specific
register dumps to be displayed.
BUG=b:157206143
TEST=Display ANX3447 registers on Puff.
BRANCH=none
Change-Id: Ib2bf1adcbe3bce75ff54c36c4306b17356eae96f
Signed-off-by: Andrew McRae <amcrae@google.com>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2208344
Tested-by: Andrew McRae <amcrae@chromium.org>
Auto-Submit: Andrew McRae <amcrae@chromium.org>
Reviewed-by: Peter Marheine <pmarheine@chromium.org>
Reviewed-by: Jett Rink <jettrink@chromium.org>
Commit-Queue: Andrew McRae <amcrae@chromium.org>
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Use second input for dedicated recovery button, except for
Puff version 1, which will still only use the H1 recovery button input.
BUG=b:157005674
TEST=Confirm recovery button still works on Puff.
BRANCH=none
Change-Id: Ib4cb9ec360f56fc19ddd80ee291f779fbee5c4e4
Signed-off-by: Andrew McRae <amcrae@google.com>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2208338
Commit-Queue: Andrew McRae <amcrae@chromium.org>
Tested-by: Andrew McRae <amcrae@chromium.org>
Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
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The TCPMv2 stack defaults to PD2.0 functionality. Defining
CONFIG_USB_PD_REV30 enables PD3.0 functionality.
BUG=b:155879504
BRANCH=none
TEST=make -j buildall
Manual tests:
passed FAFT_PD running on kohaku
Before patch:
*** 18624 bytes in flash and 29216 bytes in RAM on kohaku RO ****
*** 18544 bytes in flash and 29216 bytes in RAM on kohaku RW ****
After patch:
*** 23320 bytes in flash and 30336 bytes in RAM on kohaku RO ****
*** 23228 bytes in flash and 30336 bytes in RAM on kohaku RW ****
Flash savings of 4696 bytest
Ram savings of 1120
Signed-off-by: Sam Hurst <shurst@google.com>
Change-Id: I082cf62617a91b487d2d3567afd5e340bd52258c
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2184547
Reviewed-by: Jett Rink <jettrink@chromium.org>
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The PDCMD task is only pulling interrupts from the TCPCs on most boards,
which is unnecessary since the PD_INT tasks handle this job now.
Remove it from any boards using the PD_INT command which are not using
the older CONFIG_HOSTCMD_PD functionality (ex. samus, oak).
Located boards using:
find -name "ec.tasklist" | xargs grep -l PD_INT | xargs grep PDCMD
BRANCH=None
BUG=b:154959596
TEST=make -j buildall
Signed-off-by: Diana Z <dzigterman@chromium.org>
Change-Id: I29be8ab1d7a2616603fb55236aed4329ed8654f5
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2208221
Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
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On Puff we need to increase some IRQ priorities to meet strict timing
requirements. To support that, provide a function encapsulating the bit
manipulations to adjust the priority of a single IRQ and update task.c
to take advantage of it.
BUG=None
BRANCH=None
TEST=Still builds.
Signed-off-by: Peter Marheine <pmarheine@chromium.org>
Change-Id: I9534f5733db48b9650a55f30e5209918a5eb24b1
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2192456
Reviewed-by: Andrew McRae <amcrae@chromium.org>
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BUG=none
BRANCH=none
TEST=make buildall -j
Change-Id: I33a63d6ac45bbd46da74db34a21d1bb130476362
Signed-off-by: Vijay Hiremath <vijay.p.hiremath@intel.com>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2196946
Reviewed-by: Sooraj Govindan <sooraj.govindan@intel.corp-partner.google.com>
Reviewed-by: Keith Short <keithshort@chromium.org>
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BUG=b:154657629
TEST=make buildall -j; chgsup reports current according to fw config
BRANCH=none
Change-Id: Ieea86484ee49e056c368a6e764a217958bae3835
Signed-off-by: Sam McNally <sammc@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2198816
Reviewed-by: Andrew McRae <amcrae@chromium.org>
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