| Commit message (Collapse) | Author | Age | Files | Lines |
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Rename CONFIG_CROS_BOARD_INFO to CONFIG_CBI_EEPROM to make it clear
that the information comes from on-board EEPROM.
It sets up the groundwork for adding more options of CBI sources later.
BRANCH=None
BUG=b:186264627
TEST=make buildall -j
Signed-off-by: Philip Chen <philipchen@google.com>
Change-Id: I9a6feee0a8b35bbf29e445544243485507767ad8
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2945792
Reviewed-by: Philip Chen <philipchen@chromium.org>
Commit-Queue: Philip Chen <philipchen@chromium.org>
Tested-by: Philip Chen <philipchen@chromium.org>
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Use board-specific override files when generating VIFs for boards.
BUG=b:172276715
TEST=make buildall
BRANCH=none
Signed-off-by: Abe Levkoy <alevkoy@chromium.org>
Change-Id: I197365018ceb8197c22d631cebf4cbce1c0119f7
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2785506
Reviewed-by: Denis Brockus <dbrockus@chromium.org>
Commit-Queue: Denis Brockus <dbrockus@chromium.org>
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Almost every relevant board copy-pastes 5000 us. Make that the default
and get rid of the redundant definitions. This is the approximate result
of this command:
find . -type f -name *.h | xargs sed -i -E \
'/#define CONFIG_USBC_VCONN_SWAP_DELAY_US[[:space:]]+5000[[:space:]]/d'
BUG=b:144165680
TEST=make buildall
BRANCH=none
Change-Id: Ife86f9752971abcd7ab5ad5a5e607eb2ccbde2ba
Signed-off-by: Abe Levkoy <alevkoy@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2628132
Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
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Replace PD_VCONN_SWAP_DELAY with CONFIG_USBC_VCONN_SWAP_DELAY_US. This
is the approximate result of the following command, run from
platform/ec:
find . -type f -\( -name '*.c' -o -name '*.h' -\) | \
xargs sed -iE 's/PD_VCONN_SWAP_DELAY/CONFIG_USBC_VCONN_SWAP_DELAY/g'
Fix some latent formatting errors in usb_pd_protocol.c, because they
were preventing pre-upload hooks from passing.
BUG=b:144165680
TEST=make buildall
BRANCH=none
Signed-off-by: Abe Levkoy <alevkoy@chromium.org>
Change-Id: Icaf3b309c08fdcd162e960cf5dc88185016b5d2d
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2628131
Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
Commit-Queue: Aseda Aboagye <aaboagye@chromium.org>
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In Zephyr CONFIG_FLASH_SIZE is a Kconfig value that is used
throughout. The issue is that the units don't match. In
Zephyr the value is in KiB instead of bytes. This refactor
simply renames CONFIG_FLASH_SIZE in platform/ec to include
the unit (via _BYTES).
BRANCH=none
BUG=b:174873770
TEST=make buildall
be generated by the build instead of per board
Signed-off-by: Yuval Peress <peress@chromium.org>
Change-Id: I44bf3c7a20fcf62aaa9ae15715be78db4210f384
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2627638
Reviewed-by: Jack Rosenthal <jrosenth@chromium.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Tom Hughes <tomhughes@chromium.org>
Commit-Queue: Jack Rosenthal <jrosenth@chromium.org>
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There is an option in the task_set_event function which force
the calling task to wait for an event. However, the option is never
used thus remove it.
This also will help in the Zephyr migration process.
BUG=b:172360521
BRANCH=none
TEST=make buildall
Signed-off-by: Dawid Niedzwiecki <dn@semihalf.com>
Change-Id: Ic152fd3d6862d487bcc0024c48d136556c0b81bc
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2521599
Reviewed-by: Jett Rink <jettrink@chromium.org>
Reviewed-by: Tom Hughes <tomhughes@chromium.org>
Reviewed-by: Jack Rosenthal <jrosenth@chromium.org>
Commit-Queue: Jack Rosenthal <jrosenth@chromium.org>
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Rename CONFIG_I2C_CONTROLLER and related comments.
BRANCH=None
BUG=None
TEST=make -j buildall
Signed-off-by: Diana Z <dzigterman@chromium.org>
Change-Id: Ied6a1829bf54a5c9a32e6772982a4b8aa31aaf23
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2518659
Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org>
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Different DB options may cause different numbers of charger chips to be
present on the system. Remove constant count for charger chips, and
instead always call into the overridable function to query the count.
BRANCH=None
BUG=b:155963446
TEST=make -j buildall
Signed-off-by: Diana Z <dzigterman@chromium.org>
Change-Id: I0e65b8af351ecabe6f7b823e0e56f1932cc280a6
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2277833
Commit-Queue: Aseda Aboagye <aaboagye@chromium.org>
Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
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EFS2 boards need to call system_jumped_late in HOOK_INIT to avoid
running init code twice per boot.
system_jumped_to_this_image and system_jumped_late are functionally
equivalent for non EFS2 boards.
This patch will prevent system_jumped_to_this_image from being used
for EFS2 boards when code is copied from a past project.
BUG=chromium:1072743
BRANCH=none
TEST=buildall
Signed-off-by: Daisuke Nojiri <dnojiri@chromium.org>
Change-Id: I73fb5cedc5325d1c80825f9346954013046ee1df
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2267685
Reviewed-by: Keith Short <keithshort@chromium.org>
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The PDCMD task is only pulling interrupts from the TCPCs on most boards,
which is unnecessary since the PD_INT tasks handle this job now.
Remove it from any boards using the PD_INT command which are not using
the older CONFIG_HOSTCMD_PD functionality (ex. samus, oak).
Located boards using:
find -name "ec.tasklist" | xargs grep -l PD_INT | xargs grep PDCMD
BRANCH=None
BUG=b:154959596
TEST=make -j buildall
Signed-off-by: Diana Z <dzigterman@chromium.org>
Change-Id: I29be8ab1d7a2616603fb55236aed4329ed8654f5
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2208221
Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
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BUG=none
BRANCH=none
TEST=make buildall -j
Change-Id: I33a63d6ac45bbd46da74db34a21d1bb130476362
Signed-off-by: Vijay Hiremath <vijay.p.hiremath@intel.com>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2196946
Reviewed-by: Sooraj Govindan <sooraj.govindan@intel.corp-partner.google.com>
Reviewed-by: Keith Short <keithshort@chromium.org>
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Future USB-PD discovery changes will need that space. In each case,
reduce the size of the buffer by half (must be a power of 2).
Note: This change is only to save shared memory space in the ToT build.
It should not be picked onto release branches.
BUG=b:152420269,b:152419795
TEST=make buildall
BRANCH=none
Change-Id: Ia26c1cdd7eb4068d410b81bb4a3335d2c9142049
Signed-off-by: Abe Levkoy <alevkoy@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2163795
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Replace some macro of BMI160 to BMI version for common function of
BMI series.
Make board config include the accelgyro_bmi_common.h instead of
accel_gyro_bmi160.h.
BRANCH=None
BUG=b:146144827
TEST=make buildall -j
Change-Id: I043ff8a92f15295ead3fa5c1e292319e2b4fa21a
Signed-off-by: Ching-Kang Yen <chingkang@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2156525
Reviewed-by: Gwendal Grignou <gwendal@chromium.org>
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Vivaldi is a new keyboard that allows individual boards to have
additional or different top row keys and/or to reorder those keys.
The primary agenda of vivaldi is to allow customization of the top
row keys. However, as a secondary objective, it also allows coreboot
to send a keymap to the kernel, for only the keys that are actually
present on the keyboard.
As part of enabling vivaldi, another feature that get enabled
is to start sending action codes instead of function codes for the top
row of the keyboard.
go/vivaldi-prd
go/vivaldi-design
go/vivaldi-fw-design
With this patch, things remain unchanged for any boards that do not provide
board_set_vivaldi_keybd_config(). For boards that do provide it:
* EC begins to send action scancodes instead of function scancodes for the
top row when top row keys are pressed.
* EC responds to an EC command from the coreboot, that asks for the
layout for the keyboard. Coreboot uses this to expose corresponding
keycodes to the kernel.
BUG=b:146501925
TEST=Check on Jinlon the (new) expected scancodes are output from EC.
BRANCH=firmware-hatch-12672.B
Signed-off-by: Rajat Jain <rajatja@google.com>
Change-Id: I1f45ce6eee138a984f8d4caef1ec76c9538dd30b
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2135566
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This makes retimers appear as generic muxes. By allowing a
chain of muxes they can be stacked up to the new configurations
that zork requires and will continue to work as they did before
on configurations that only have a single mux.
The code used to have two different arrays, 1) muxes and 2)
retimers. On one of the zork configurations the processor
MUX stopped being the primary mux and the retimer took its
place. In a different configuration of that same platform
it left the primary and secondary alone but the mux_set
FLIP operation had to be ignored. Since the same
interfaces needed to be available for both it stopped making
sense to have two different structures and two different
methods of handling them. This consolodates the two into
one.
The platforms that do not have retimers, this change will
not make any difference. For platforms like zork, it will
remove the retimers and make them chained muxes. So
testing on trembyle makes sense to verify,
BUG=b:147593660
BRANCH=none
TEST=verify USB still works on trembyle
Change-Id: I286cf1e302f9bd3dd7e81098ec08514a2a009fe3
Signed-off-by: Denis Brockus <dbrockus@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2066794
Commit-Queue: Jett Rink <jettrink@chromium.org>
Reviewed-by: Edward Hill <ecgh@chromium.org>
Reviewed-by: Jett Rink <jettrink@chromium.org>
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The current use of the PD Config Flags are a bit confusing and
has been changed to the following:
The CONFIG_USB_POWER_DELIVERY flag is used to enable and disable
the TCPMv1 and TCPMv2 stacks. And when CONFIG_USB_POWER_DELIVERY
is enabled, one of the following must be enabled:
CONFIG_USB_PD_TCPMV1 - legacy power delivery state machine
CONFIG_USB_PD_TCPMV2 - current power delivery state machine
BUG=b:149993808
BRANCH=none
TEST=make -j buildall
Change-Id: Ie3f8615a75b15b4f1c703f57f3db9e152a471238
Signed-off-by: Sam Hurst <shurst@google.com>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2068519
Reviewed-by: Diana Z <dzigterman@chromium.org>
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The action_delay_sec field hasn't actually been referenced by
any code since 2013. Removing the corresponding struct field.
BUG=None
BRANCH=None
TEST=builds
Change-Id: Ia7334c26b85d0161ff61bb51fbdda61bb921595a
Signed-off-by: Diana Z <dzigterman@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2054945
Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
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This commit removes the temporary common charger chip configuration and
instead puts the configuration in each board.
BRANCH=none
BUG=b:147672225
TEST=builds, runs on waddledoo and octopus
Change-Id: If81aef31e48c65999a87e202494f286716114bbb
Signed-off-by: Diana Z <dzigterman@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2031855
Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
Reviewed-by: Jett Rink <jettrink@chromium.org>
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This is the second half of b/147290482
Cleaning up to use pd_data_role instead of int
BUG=b:147314832
BRANCH=none
TEST=make buildall -j
Change-Id: I2445b06f5f5469fb1f3a968034a83e3ee792e7c7
Signed-off-by: Denis Brockus <dbrockus@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1991845
Reviewed-by: Jett Rink <jettrink@chromium.org>
Reviewed-by: Edward Hill <ecgh@chromium.org>
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Required by Android CDD - Section 7.3.1 - Paragraph C.1.4
Modified mechanically with:
for i in $(grep -lr "\.default_range" board); do
sed -i '/.default_range =/s#\(.*\.default_range = \).* /\
\* g.*#\14, /* g, to meet CDD 7.3.1/C-1-4 reqs */#' $i
done
Manually reworked to only change the accelerometer that matters to
android:
The lid accelerometer or the base accelerometer if the base also hosts
the gyroscope.
This is only for future EC, no need to land the change on branches:
mems_setup will take care to set accelerometer ranges at 4g on startup.
BUG=b:144004449
BRANCH=none
TEST=compile
Change-Id: If8c14b2e928c9c70c0ce51451adcfcd674a9e73b
Signed-off-by: Gwendal Grignou <gwendal@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1957375
Reviewed-by: Justin TerAvest <teravest@chromium.org>
Reviewed-by: Alexandru M Stan <amstan@chromium.org>
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There is a board specific usb_pd_policy.c file that contains a lot of
code for handling DisplayPort Alternate mode, Google Firmware Update
Alternate mode, as well as some PD policy functions such as deciding to
Accept or Reject a data role swap or a power role swap. Several boards
simply copy/paste this code from project to project as a lot of this
functionality is not actually board specific.
This commit tries to refactor this by pulling the functions that are not
mainly board specific into common code. The functions are made
overridable such that boards that truly do require a different
implementation may do so.
Additionally, this consolidation changes the policy behaviour for some
boards, but they should be for the better. Some examples include that
data swaps are always allowed if we are a UFP (no system image
requirement), power swaps are allowed to become a sink if we are no
longer dual role (e.g. - in suspend), and DisplayPort Alternate Mode is
not entered if the AP is off.
In order to facilitate this refactor, a couple CONFIG_* options were
introduced:
- CONFIG_USB_PD_DP_HPD_GPIO
/* HPD is sent to the GPU from the EC via a GPIO */
- CONFIG_USB_PD_CUSTOM_VDO
/*
* Define this if a board needs custom SNK and/or SRC PDOs.
*
* The default SRC PDO is a fixed 5V/1.5A with PDO_FIXED_FLAGS indicating
* Dual-Role power, USB Communication Capable, and Dual-Role data.
*
* The default SNK PDOs are:
* - Fixed 5V/500mA with the same PDO_FIXED_FLAGS
* - Variable (non-battery) min 4.75V, max PD_MAX_VOLTAGE_MV,
* operational current PD_MAX_CURRENT_MA,
* - Battery min 4.75V, max PD_MAX_VOLTAGE_MV, operational power
* PD_OPERATING_POWER_MW
*/
BUG=chromium:1021724,b:141458448
BRANCH=<as many as we can that are still supported>
TEST=`make -j buildall`
TEST=Flash a kohaku, verify that DP Alt Mode still works with a variety
of DP peripherals
TEST=Repeat above with a nocturne
TEST=Repeat above with an atlas
Change-Id: I18fd7e22dc77fe1dc6c21c38cd7f1bc53cae86cb
Signed-off-by: Aseda Aboagye <aaboagye@google.com>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1949052
Tested-by: Aseda Aboagye <aaboagye@chromium.org>
Reviewed-by: Paul Fagerburg <pfagerburg@chromium.org>
Reviewed-by: Diana Z <dzigterman@chromium.org>
Reviewed-by: Denis Brockus <dbrockus@chromium.org>
Commit-Queue: Aseda Aboagye <aaboagye@chromium.org>
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Certain SKUs of certain boards have lesser number of USB PD ports than
defined by CONFIG_USB_PD_PORT_COUNT. Hence rename
CONFIG_USB_PD_PORT_COUNT as CONFIG_USB_PD_PORT_MAX_COUNT.
BUG=b:140816510, b:143196487
BRANCH=octopus
TEST=make -j buildall; Boot to ChromeOS
Change-Id: I7c33b27150730a1a3b5813b7b4a72fd24ab73c6a
Signed-off-by: Karthikeyan Ramasubramanian <kramasub@google.com>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1879337
Tested-by: Karthikeyan Ramasubramanian <kramasub@chromium.org>
Reviewed-by: Jett Rink <jettrink@chromium.org>
Commit-Queue: Jett Rink <jettrink@chromium.org>
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this changes the declaration and definitions of
typec_set_source_current_limit() to take an enum tcpc_rp_value instead
of int.
BRANCH=none
BUG=none
TEST=buildall passes
Change-Id: If633641a581eeb6085b94bc727e23fb57f7cd435
Signed-off-by: Caveh Jalali <caveh@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1889117
Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org>
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Split the configuration option CONFIG_HOSTCMD_ESPI_VW_SLP_SIGNALS into
separate options controlling SLP_S3 and SLP_S4. Allow volteer to
configure SLP_S3 as a GPIO and SLP_S4 as an eSPI virtual wire. Cause a
build error if virtual wires are configured, but eSPI is not.
BUG=b:139553375,b:143288478
TEST=make buildall
TEST=Build volteer with CONFIG_HOSTCMD_ESPI_VW_S4 defined but
CONFIG_HOSTCMD_ESPI undefined; observe build error
BRANCH=none
Change-Id: I8c6737e2ccb1a77a882e5fa65c6eddb342209b61
Signed-off-by: Abe Levkoy <alevkoy@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1881758
Reviewed-by: Keith Short <keithshort@chromium.org>
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GMR sensors can be used to
(1) detect clamshell/tablet mode
(2) detect lid open/closed
But hall sensors can only do (2).
Therefore the naming related to "hall sensor" for tablet mode
application is incorrect.
This patch performs the following renaming to better reflect the reality:
config:
CONFIG_HALL_SENSOR -> CONFIG_GMR_TABLET_MODE
CONFIG_HALL_SENSOR_CUSTOM -> CONFIG_GMR_TABLET_MODE_CUSTOM
CONFIG_DPTF_MOTION_LID_NO_HALL_SENSOR ->
CONFIG_DPTF_MOTION_LID_NO_GMR_SENSOR
GPIO:
HALL_SENSOR_GPIO_L -> GMR_TABLET_MODE_GPIO_L
functions:
hall_sensor_disable() -> gmr_tablet_switch_disable()
hall_sensor_isr() -> gmr_tablet_switch_isr()
hall_sensor_int() -> gmr_tablet_switch_init()
variable:
hall_sensor_at_360 -> gmr_sensor_at_360
BUG=b:139378190
BRANCH=none
TEST=make buildall
Change-Id: I28393d056ddd128d8ffafc16a1f9fefee5455ccc
Signed-off-by: Philip Chen <philipchen@google.com>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1757275
Reviewed-by: Furquan Shaikh <furquan@chromium.org>
Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
Commit-Queue: Philip Chen <philipchen@chromium.org>
Tested-by: Philip Chen <philipchen@chromium.org>
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For all boards that defined CONFIG_CHARGER, CONFIG_CHARGER_V2 is also
defined. Remove references to CONFIG_CHARGER_V2 from board header files.
Replace CONFIG_CHARGER_V2 in common C modules with CONFIG_CHARGER when
appropriate.
BUG=b:139699769
BRANCH=none
TEST=make buildall -j
Change-Id: I6b54baf4ad2406bbed629b6b272dad9ea6a81280
Signed-off-by: Keith Short <keithshort@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1789420
Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org>
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This change allows us to use the IS_ENABLED condition to replace
the various ifdef guards around the CONFIG_ACCEL_FIFO
BUG=b:137758297,chromium:981990
BRANCH=None
TEST=buildall and CTS tests on Arcada
Change-Id: I65d36bac19855e51c830a33e6f3812575e8d15d9
Signed-off-by: Yuval Peress <peress@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1704164
Reviewed-by: Jack Rosenthal <jrosenth@chromium.org>
Reviewed-by: Gwendal Grignou <gwendal@chromium.org>
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This CL annotates __overridable to the following functions:
board_system_is_idle
power_chipset_handle_host_sleep_event
power_board_handle_host_sleep_event
TEST=make buildall
BUG=none
BRANCH=none
Change-Id: I0168b69c49fab5672238711d4f3a6a5517cdd8b3
Signed-off-by: Yilun Lin <yllin@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1761759
Reviewed-by: Furquan Shaikh <furquan@chromium.org>
Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org>
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The extentions were added to make the compiler perform most
of the verification that the conversion was being done correctly
to remove 8bit addressing as the standard I2C/SPI address type.
Now that the compiler has verified the code, the extra
extentions are being removed
BUG=chromium:971296
BRANCH=none
TEST=make buildall -j
TEST=verify sensor functionality on arcada_ish
Change-Id: I36894f8bb9daefb5b31b5e91577708f6f9af2a4f
Signed-off-by: Denis Brockus <dbrockus@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1704792
Reviewed-by: Jack Rosenthal <jrosenth@chromium.org>
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Opt for 7bit slave addresses in EC code. If 8bit is
expected by a driver, make it local and show this in
the naming.
Use __7b, __7bf and __8b as name extensions for i2c/spi
addresses used in the EC codebase. __7b indicates a
7bit address by itself. __7bf indicates a 7bit address
with optional flags attached. __8b indicates a 8bit
address by itself.
Allow space for 10bit addresses, even though this is
not currently being used by any of our attached
devices.
These extensions are for verification purposes only and
will be removed in the last pass of this ticket. I want
to make sure the variable names reflect the type to help
eliminate future 7/8/7-flags confusion.
BUG=chromium:971296
BRANCH=none
TEST=make buildall -j
Change-Id: I2fc3d1b52ce76184492b2aaff3060f486ca45f45
Signed-off-by: Denis Brockus <dbrockus@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1699893
Reviewed-by: Jack Rosenthal <jrosenth@chromium.org>
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Currently chipset specific power signals are defined at board/baseboard
level. These power signals are moved to chipset specific file to minimize
the redundant power signals array defined for each board/baseboard.
BUG=b:134079574
BRANCH=none
TEST=make buildall -j
Change-Id: I351904f7cd2e0f27844c0711beb118d390219581
Signed-off-by: Vijay Hiremath <vijay.p.hiremath@intel.com>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1636837
Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
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Currently, tcpc_config assumes TCPCs are on I2C bus. ITE's EC has an
embedded TCPC.
This patch adds bus_type field to struct tcpc_config_t so that a TCPC
location on other type of bus can be specified.
Signed-off-by: Daisuke Nojiri <dnojiri@chromium.org>
BUG=none
BRANCH=none
TEST=buildall
Change-Id: Ieac733011700b351e6323f46070dcf46d9e1154b
Reviewed-on: https://chromium-review.googlesource.com/1640305
Commit-Ready: Daisuke Nojiri <dnojiri@chromium.org>
Tested-by: Daisuke Nojiri <dnojiri@chromium.org>
Legacy-Commit-Queue: Commit Bot <commit-bot@chromium.org>
Reviewed-by: Jett Rink <jettrink@chromium.org>
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This changes requires all boards to define the maximum number
of sensors they support. This will allow us to later create
static arrays with the appropriate length.
BUG=chromium:966506
BRANCH=None
TEST=make buildall
Change-Id: I5a2fa8f0fdcaef69065dfd4c2bfea4e3f371e986
Signed-off-by: Yuval Peress <peress@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1637414
Reviewed-by: Jett Rink <jettrink@chromium.org>
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In usb_port_power_smart.c, we restore charging mode to
CONFIG_USB_PORT_POWER_SMART_DEFAULT_MODE instead of USB_CHARGE_MODE_CDP
directly. The benefit is that when we change the default mode, we don't
need to amend usb_port_power_smart.c. This should be applied to this
board.c as well.
BUG=b:130767435
BRANCH=rammus
TEST=`make BOARD=rammus -j4`
Change-Id: I0aef5bf3856eca82cb210c2a48ba31065e58e710
Signed-off-by: Marco Chen <marcochen@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/1621450
Legacy-Commit-Queue: Commit Bot <commit-bot@chromium.org>
Reviewed-by: Zhuohao Lee <zhuohao@chromium.org>
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tcpc_config contained a field for both the alert polarity and open
drain/push pull configuration. There is also a possible difference in TCPC
reset polarity. Instead of adding yet another field to describe this
configuration, it would be better to convert alert polairty, open
drain and reset polarity into a single flags field.
This CL modifies the tcpc_config struct to use a single flags field
and adds defines for what existing flag options can be.
BUG=b:130194031
BRANCH=none
TEST=make -j buildall
Change-Id: Ifb7e7604edb7021fb2d36ee279049eb52fefc99e
Signed-off-by: Scott Collyer <scollyer@google.com>
Signed-off-by: Furquan Shaikh <furquan@google.com>
Reviewed-on: https://chromium-review.googlesource.com/1551581
Commit-Ready: Furquan Shaikh <furquan@chromium.org>
Tested-by: Furquan Shaikh <furquan@chromium.org>
Reviewed-by: Jett Rink <jettrink@chromium.org>
Reviewed-by: Paul Fagerburg <pfagerburg@chromium.org>
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It's simply a bad idea to describe a macro in multiple locations.
It'll make it hard to change. It'll be difficult to keep all
locations in sync.
This patch replaces the comment duplicated in all ec.tasklist with
a pointer to the CONFIG_TASK_LIST definition. The macro will be
described in a single place (just like all/most other macros).
Signed-off-by: Daisuke Nojiri <dnojiri@chromium.org>
BUG=none
BRANCH=none
TEST=buildall
Change-Id: Id658b9d68e742e4334c692b804d9c98c8de21313
Reviewed-on: https://chromium-review.googlesource.com/1551579
Commit-Ready: ChromeOS CL Exonerator Bot <chromiumos-cl-exonerator@appspot.gserviceaccount.com>
Tested-by: Daisuke Nojiri <dnojiri@chromium.org>
Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org>
Reviewed-by: Jett Rink <jettrink@chromium.org>
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Rammus boards do not have a dedicated GPIO for MKBP events
between EC and AP. On boards without this hardware support, the
tight timestamps feature cannot be reliably supported due to
issues with the performance of the ACPI SCI chain, compared to
a dedicated interrupt.
Disabling tight_timestamps restores legacy behavior that is known
to fare better with sensors events over SCI.
BUG=b:123700100
BRANCH=rammus
TEST=tight_timestamps is 0, ran CtsSensorTestCases
Change-Id: I459f2673abad7ff75ba9e8a844b7702dee1ef8c0
Signed-off-by: Enrico Granata <egranata@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/1524667
Commit-Ready: ChromeOS CL Exonerator Bot <chromiumos-cl-exonerator@appspot.gserviceaccount.com>
Reviewed-by: Alexandru M Stan <amstan@chromium.org>
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Mechanical replacement of bit operation where operand is a constant.
More bit operation exist, but prone to errors.
Reveal a bug in npcx:
chip/npcx/system-npcx7.c:114:54: error: conversion from 'long unsigned int' to 'uint8_t' {aka 'volatile unsigned char'} changes value from '16777215' to '255' [-Werror=overflow]
BUG=None
BRANCH=None
TEST=None
Change-Id: I006614026143fa180702ac0d1cc2ceb1b3c6eeb0
Signed-off-by: Gwendal Grignou <gwendal@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/1518660
Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org>
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Requested for linux integration, use BIT instead of 1 <<
First step replace bit operation with operand containing only digits.
Fix an error in motion_lid try to set bit 31 of a signed integer.
BUG=None
BRANCH=None
TEST=compile
Change-Id: Ie843611f2f68e241f0f40d4067f7ade726951d29
Signed-off-by: Gwendal Grignou <gwendal@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/1518659
Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org>
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Define macros to define custom events used by sensor interrupt handlers.
Remove CONFIG_ for activity events.
BUG=none
BRANCH=none
TEST=compile, sensors work on eve.
Change-Id: I08ef6ed2a004466ebc5f7650d6952a150b9de713
Signed-off-by: Gwendal Grignou <gwendal@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/1272189
Reviewed-by: Jett Rink <jettrink@chromium.org>
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This patch turns the USB type-a charging off by default in suspend mode.
If the DUT power on with connecting a USB device, the OS must send an
event to clear inhibit_charging_in_suspend. Otherwise, the USB device
will lost the power in suspend mode, and the wakeup event won't be
generated if the device is a wakeup source (eg. USB keyboard or mouse).
BUG=b:121438672
BRANCH=firmware-rammus-11275
CQ-DEPEND=CL:1423758
TEST=Power on DUT without connecting USB, then suspend the DUT.
Verfied the USB type-a charging off.
Change-Id: I39a0f85d7033b798a80e80cc302a2c72cebae8d6
Signed-off-by: Zhuohao Lee <zhuohao@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/1424042
Reviewed-by: Furquan Shaikh <furquan@chromium.org>
Reviewed-by: Jett Rink <jettrink@chromium.org>
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On Rammus, the power mode of the USB Type-A is CDP. However, the default
configuration is SDP2. We don't meet any problem on previous setting
because of missing CONFIG_USB_PORT_POWER_SMART_INVERTED.
This patch fixes the incorrect CONFIG in board.h.
BUG=none
BRANCH=firmware-rammus-11275
TEST=make -j buildall
connect phone to type-a port, CDP works
Change-Id: I19a6f2c01faa452131fa036a28be2fc37ce06e58
Signed-off-by: Zhuohao Lee <zhuohao@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/1424039
Reviewed-by: Jett Rink <jettrink@chromium.org>
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On Shyvana, we found that if we put the Parade PS8751 and Analogix
ANX3447 on the same i2c bus, the ANX3447 would be broken because
of PS8751 i2c bus error. To avoid this kind of problem, we decided
to separate the TCPC i2c bus starting from board version >= 2.
The new assignment are ANX3447:i2c_0_0, PS8751:i2c_0_1.
This patch also adds a new config CONFIG_USB_PD_TCPC_RUNTIME_CONFIG
for enabling runtime switching the TCPC setting.
BUG=b:118063849
BRANCH=firmware-rammus-11275
TEST=verified on DUT with board_version <= 1
verified on reworked DUT with board_version >= 2
Change-Id: I0bdc930c1a5e691239f5f5c256d380d0111eed91
Signed-off-by: Zhuohao Lee <zhuohao@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/1381600
Commit-Ready: ChromeOS CL Exonerator Bot <chromiumos-cl-exonerator@appspot.gserviceaccount.com>
Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org>
Reviewed-by: Jett Rink <jettrink@chromium.org>
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This patch removes the CONFIG_SYSTEM_UNLOCKED to lock the EC and
adds the CONFIG_USB_PD_COMM_LOCKED to enable USB PD only when EC
is in RW.
BUG=b:111816190,b:119929973
BRANCH=master
TEST=make buildall -j pass
Change-Id: Id812a4036b9a72e60d72a67d4cf4541aa84d5940
Signed-off-by: Zhuohao Lee <zhuohao@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/1350509
Commit-Ready: ChromeOS CL Exonerator Bot <chromiumos-cl-exonerator@appspot.gserviceaccount.com>
Reviewed-by: Furquan Shaikh <furquan@chromium.org>
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This change updates motion_lid driver to use CONFIG_TABLET_MODE to
decide if device requires reporting of tablet mode. This basically
makes the config options CONFIG_LID_ANGLE_INVALID_CHECK and
CONFIG_LID_ANGLE_TABLET_MODE obsolete. Now that EC will always report
tablet mode aligned with Chrome (at 180 degree), any device that
supports tablet mode and uses motion lid driver will require this by
default and should not require boards to individually select any
special config options. Thus, it also gets rid of unused
CONFIG_LID_ANGLE_TABLET_MODE and CONFIG_LID_ANGLE_INVALID_CHECK.
BUG=b:120050761
BRANCH=octopus
TEST=make -j buildall
Change-Id: Ib73af66ca1c17d4033cf54f0b4b86bf41793f3a3
Signed-off-by: Furquan Shaikh <furquan@google.com>
Reviewed-on: https://chromium-review.googlesource.com/1350470
Commit-Ready: Furquan Shaikh <furquan@chromium.org>
Tested-by: Furquan Shaikh <furquan@chromium.org>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-by: Jett Rink <jettrink@chromium.org>
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This change performs the following renaming:
1. CONFIG_TABLET_SWITCH -> CONFIG_HALL_SENSOR
Indicates if a device has hall sensor
2. TABLET_MODE_GPIO_L -> HALL_SENSOR_GPIO_L
Provides the interrupt line from hall sensor to EC.
3. tablet_mode_isr -> hall_sensor_isr
Interrupt routine that gets control on hall sensor interrupt.
4. tablet_mode_init -> hall_sensor_init
Init routine for initializing hall sensor interrupt.
5. tablet_switch_disable -> hall_sensor_disable
Disable hall sensor interrupt and tablet mode sub-system.
This is done to separate hall sensor interrupt from tablet mode
handling. It is another step towards aligning tablet mode detection on
EC with Chrome. Hall sensor interrupt occurs when the lid is in
360-degree flipped mode. If tablet mode is not already triggered by
lid motion driver, then hall_sensor_isr will set tablet mode and take
necessary actions to disable input peripherals.
CQ-DEPEND=CL:1351518
BUG=b:120050761
BRANCH=octopus
TEST=make -j buildall
Change-Id: I5841f6875d538a624cb888bc048f252397ab457c
Signed-off-by: Furquan Shaikh <furquan@google.com>
Reviewed-on: https://chromium-review.googlesource.com/1350469
Commit-Ready: Furquan Shaikh <furquan@chromium.org>
Tested-by: Furquan Shaikh <furquan@chromium.org>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-by: Jett Rink <jettrink@chromium.org>
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This should be the last step to make all boards on ToT follow
go/usb-pd-slow-response-time. Theses boards all have the higher priority
tasks, but they aren't being used since the tcpc interrupt wasn't
scheduling calls on it.
BRANCH=none
BUG=b:112088135
TEST=builds
Change-Id: I2c39e661e804f88edd5b34636b93e6e63a5af57f
Signed-off-by: Jett Rink <jettrink@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/1283452
Commit-Ready: ChromeOS CL Exonerator Bot <chromiumos-cl-exonerator@appspot.gserviceaccount.com>
Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
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Base on BMI160 location, the x axis is positive correlation
and the y, z axis negative correlation.
Correct the MB base reference direction.
BUG=b:118362153
BRANCH=ToT
TEST=Manual
1. Using EC console command "accelinfo on" the check the
Base Accel x, y, z value.
2. Run factory tool to verify.
Change-Id: I5c7968e9294b2fca511808d30aad3a99d524643f
Signed-off-by: michael_chen <michael5_chen@pegatroncorp.com>
Reviewed-on: https://chromium-review.googlesource.com/1307273
Commit-Ready: michael chen <michael5_chen@pegatroncorp.com>
Tested-by: michael chen <michael5_chen@pegatroncorp.com>
Reviewed-by: Zhuohao Lee <zhuohao@chromium.org>
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CONFIG_DPTF_DEVICE_ORIENTATION was added to indicate mode change to
the host to allow it to read the tablet mode flag from shared EC
memory and select the right DPTF table to load (if supported).
However, this config seems unnecessary because of the following
reasons:
1. Host sets SCI mask to indicate to the EC which events it wants to
process. Thus, even if the EC sets mode change flag, it will not be
notified to the host unless it supports mode change event.
2. Additionally, if host supports mode change event, but does not
support multiple DPTF tables, then EC ACPI code takes care of ensuring
that there is a thermal event handler present to reload tables.
3. CONFIG_DPTF_DEVICE_ORIENTATION was defined for almost all new x86
boards.
BUG=b:117844490
BRANCH=None
TEST=make -j buildall
Change-Id: Ic4097ae047e2d559673a321da4df86514f902993
Signed-off-by: Furquan Shaikh <furquan@google.com>
Reviewed-on: https://chromium-review.googlesource.com/1292359
Commit-Ready: Furquan Shaikh <furquan@chromium.org>
Tested-by: Furquan Shaikh <furquan@chromium.org>
Reviewed-by: Gwendal Grignou <gwendal@chromium.org>
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Per b:116180071 discussion, the V1.0A power rail should
keep at 1V during S0ix. This patch fixes the pmic setting
to avoid the potential stability issue.
BUG=b:116180071
BRANCH=master
TEST=Measure the V1.0A power rail during S0ix
Change-Id: Ic1d883d7d2427cdb2b8b871df17fbe701904e73e
Signed-off-by: Zhuohao Lee <zhuohao@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/1282550
Reviewed-by: Furquan Shaikh <furquan@chromium.org>
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