| Commit message (Collapse) | Author | Age | Files | Lines |
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This patch changes the entry/exit model for S0ix from a PCH
SLP_S0 signal based model to a hybrid host event/direct interrupt
model. The kernel will send host events on kernel freeze/thaw exit;
EC will initiate the S0ix entry based on host command and exit via
another host command from kernel.
The assertion of SLP_S0 comes later than HC(suspend) and deasserion
of SLP_S0 comes earlier than HC(resume).
________ ________
SLP_S0 |______________________|
_____ ________
HC |___________________________|
BRANCH=none
BUG=chrome-os-partner:58740
TEST=Build/flash EC and check 'echo freeze > /sys/power/state'
command in OS shell. Verify idle state transitions during display off
and periodic wakes from S0ix do not lead to state transitions in EC.
Change-Id: Ie18c6c2ac8998f59141641567d1d740cd72c2d2e
Signed-off-by: Kyoung Kim <kyoung.il.kim@intel.com>
Signed-off-by: Subramony Sesha <subramony.sesha@intel.com>
Signed-off-by: Divagar Mohandass <divagar.mohandass@intel.com>
Signed-off-by: Archana Patni <archana.patni@intel.com>
Reviewed-on: https://chromium-review.googlesource.com/401072
Commit-Ready: Vijay P Hiremath <vijay.p.hiremath@intel.com>
Tested-by: Vijay P Hiremath <vijay.p.hiremath@intel.com>
Reviewed-by: Shawn N <shawnn@chromium.org>
Reviewed-by: Furquan Shaikh <furquan@chromium.org>
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Add a new source policy to provide 3A if there is only one port used
as a source.
Also ensure that the load switch on VBUS when sourcing power is properly
configured to limit the current to 1.5A or 3.0A depending on the case.
Signed-off-by: Vincent Palatin <vpalatin@chromium.org>
BRANCH=none
BUG=chrome-os-partner:56110
TEST=manual: connect the laptop to a type-C sink with Twinkie in between,
without anything else connected on the laptop, see 3A flowing when measuring
with Twinkie ('tw vbus'), plug a dangling C-to-A receptacle dongle on the other
port and see 1.5A flowing through Twinkie.
Force the input current limit on the sink to 3.0A and see the laptop cutting
VBUS.
Change-Id: Ic94ba186fc0648e770c8d13be0f96b23e968f855
Reviewed-on: https://chromium-review.googlesource.com/403851
Commit-Ready: Vincent Palatin <vpalatin@chromium.org>
Tested-by: Vincent Palatin <vpalatin@chromium.org>
Reviewed-by: Shawn N <shawnn@chromium.org>
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No matrix was set, the reported data by the accelerometer
was not in the proper referential.
BUG=chrome-os-partner:58792
BRANCH=none
TEST=with ectool motionsense, check the data matches the standard.
Change-Id: I25aa3a1774ba80f1a0f8a41adc976af832436c63
Signed-off-by: Gwendal Grignou <gwendal@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/411358
Commit-Ready: Daisuke Nojiri <dnojiri@chromium.org>
Tested-by: Daisuke Nojiri <dnojiri@chromium.org>
Reviewed-by: David Hendricks <dhendrix@chromium.org>
Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org>
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BUG=chrome-os-partner:59309
BRANCH=none
TEST=Able to draw 1.5A from Type-A ports
Change-Id: I9c598f77a542650edf15f407ec4a10d0e7e7465e
Signed-off-by: Vijay Hiremath <vijay.p.hiremath@intel.com>
Reviewed-on: https://chromium-review.googlesource.com/411345
Commit-Ready: Vijay P Hiremath <vijay.p.hiremath@intel.com>
Tested-by: Vijay P Hiremath <vijay.p.hiremath@intel.com>
Reviewed-by: David Hendricks <dhendrix@chromium.org>
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Follow Banon's setting
BUG=chrome-os-partner:59535
BRANCH=master
TEST=`make -j buildall`, shipping mode works well.
Change-Id: Idf4b253ddb86a82752fca0f872ddb9603dee256c
Signed-off-by: Ryan Zhang <Ryan.Zhang@quantatw.com>
Reviewed-on: https://chromium-review.googlesource.com/411023
Commit-Ready: Ryan Zhang <ryan.zhang.quanta@gmail.com>
Tested-by: 志偉 黃 <David.Huang@quantatw.com>
Reviewed-by: Shawn N <shawnn@chromium.org>
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Follow Cyan's & Glados's setting.
BUG=chrome-os-partner:59536
BRANCH=master
TEST=system can boot up normally.
Change-Id: I6abfcef06e5b46cb974706b7472c73f00a644544
Signed-off-by: Ryan Zhang <Ryan.Zhang@quantatw.com>
Reviewed-on: https://chromium-review.googlesource.com/408497
Commit-Ready: Ryan Zhang <ryan.zhang.quanta@gmail.com>
Tested-by: 志偉 黃 <David.Huang@quantatw.com>
Reviewed-by: Mohammed Habibulla <moch@google.com>
Reviewed-by: Vincent Wang <vwang@chromium.org>
Reviewed-by: Shawn N <shawnn@chromium.org>
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Enable fast charging profile config (CONFIG_CHARGER_PROFILE_OVERRIDE)
so that the battery desired current & voltage can be selected for given
rated performance values.
BUG=chrome-os-partner:59779
BRANCH=none
TEST=Manually overrode the temperature and voltage. Observed correct
charge profile config is selected for each tests.
Change-Id: I080a3ace6d2f77bb6b97911b7705a44ec563258b
Signed-off-by: Vijay Hiremath <vijay.p.hiremath@intel.com>
Reviewed-on: https://chromium-review.googlesource.com/410824
Commit-Ready: Vijay P Hiremath <vijay.p.hiremath@intel.com>
Tested-by: Vijay P Hiremath <vijay.p.hiremath@intel.com>
Reviewed-by: Shawn N <shawnn@chromium.org>
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Added console command to read ManufacturerAccess() data on a given
register block.
BUG=chrome-os-partner:59660
BRANCH=none
TEST=Enabled config on Reef.
Successfully able to read ManufacturerAccess() data
Change-Id: Ic86ae1b44ca8016634c48b54b1130d30fdd2d3fa
Signed-off-by: Vijay Hiremath <vijay.p.hiremath@intel.com>
Reviewed-on: https://chromium-review.googlesource.com/409638
Commit-Ready: Vijay P Hiremath <vijay.p.hiremath@intel.com>
Tested-by: Vijay P Hiremath <vijay.p.hiremath@intel.com>
Reviewed-by: Shawn N <shawnn@chromium.org>
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BUG=chrome-os-partner:55158,chrome-os-partner:55889,chrome-os-partner:55890
BRANCH=none
TEST=on reef use ina (pp3300_pd_a_mw) to check tcpc power consumption
Change-Id: I5a2904f4e549b7da22242848bb3b1887331ecadd
Signed-off-by: Kevin K Wong <kevin.k.wong@intel.com>
Reviewed-on: https://chromium-review.googlesource.com/399882
Reviewed-by: David Hendricks <dhendrix@chromium.org>
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If PS8751 goes into low power mode during sysjump, then tcpm_init will
fail since PS8751 is not accessible via I2C, so force it to wake up
during hook_init.
BUG=chrome-os-partner:59693
BRANCH=none
TEST=Verified PS8751 port on reef is functional after sysjump.
Change-Id: I2aa5a80b2ea9c17a01e4cba04493f83cb0a39955
Signed-off-by: Kevin K Wong <kevin.k.wong@intel.com>
Reviewed-on: https://chromium-review.googlesource.com/410132
Reviewed-by: David Hendricks <dhendrix@chromium.org>
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BUG=chrome-os-partner:54248
BRANCH=gru
TEST=Manual on kevin, high temperature chamber(60C),
battery will require 0 voltage because of high temp,
then check 'chgstate' vbat maintained at 8688 mV.
Change-Id: I3b5835701c42a0cd861400ba921b3d3797152bbd
Signed-off-by: Wonjoon Lee <woojoo.lee@samsung.com>
Reviewed-on: https://chromium-review.googlesource.com/400088
Commit-Ready: Shawn N <shawnn@chromium.org>
Tested-by: Vijay P Hiremath <vijay.p.hiremath@intel.com>
Reviewed-by: Vijay P Hiremath <vijay.p.hiremath@intel.com>
Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
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BUG=chrome-os-partner:59285
chrome-os-partner:55861
BRANCH=none
TEST=make buildall -j
Change-Id: I2a22f5ef0072793701f4899cd6e669b8cccca78b
Signed-off-by: Vijay Hiremath <vijay.p.hiremath@intel.com>
Reviewed-on: https://chromium-review.googlesource.com/406682
Commit-Ready: Vijay P Hiremath <vijay.p.hiremath@intel.com>
Tested-by: Vijay P Hiremath <vijay.p.hiremath@intel.com>
Reviewed-by: Shawn N <shawnn@chromium.org>
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BUG=chrome-os-partner:54668
BRANCH=none
TEST=Verified SNK is detected in S0 (toggle on), S3 (toggle off),
and S5 (force sink). SRC is detect in S0 only, stays detected when
entered S3, but unplug/plug while in S3 will not re-detect until
system back in S0. When go to S5, SRC will get disconnected until
back in S0, and hotplug SRC in S5 will not get detected. Checked
power role swap with another chromebook in the above scenario also.
Change-Id: I2a487fca5cb04c45524aa3efde84fcd10ff0579e
Signed-off-by: Kevin K Wong <kevin.k.wong@intel.com>
Reviewed-on: https://chromium-review.googlesource.com/396918
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
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When sourcing current on the type-C port, set the OCP limit on the VBUS
load switch according to current dynamic capability.
(3.0A when only one port is a power source, 1.5A else)
Signed-off-by: Vincent Palatin <vpalatin@chromium.org>
BRANCH=gru
BUG=chrome-os-partner:56110
TEST=manual: connect Caroline to Kevin with Twinkie in between,
ask Caroline to sink current through the UI.
without anything else connected on Kevin, see 3A flowing when measuring
with Twinkie ('tw vbus'), plug a dangling C-to-A receptacle dongle on
the other Kevin port and see 1.5A flowing through Twinkie.
Force the input current limit on Caroline to 3.0A and see Kevin cutting
VBUS.
Change-Id: Ib879b1ed720b20aa702c5f3643948ba0575d1193
Reviewed-on: https://chromium-review.googlesource.com/403869
Commit-Ready: Vincent Palatin <vpalatin@chromium.org>
Tested-by: Vincent Palatin <vpalatin@chromium.org>
Reviewed-by: Shawn N <shawnn@chromium.org>
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Turn off the charger BGATE when the system is hibernated to
save maximum power.
BUG=chrome-os-partner:59001
BRANCH=none
TEST=Manually verified on the Reef.
System can boot from hibernate wake sources.
Following are the power measurement values at Battery
voltage = 8.3V & temperature = 23 deg C.
a. Normal operation 540uA, 3.500mW
b. BGATE OFF 80uA, 0.592mW
Change-Id: Ia30655ccefbf0dded623246150d53b2a815df2de
Signed-off-by: Vijay Hiremath <vijay.p.hiremath@intel.com>
Reviewed-on: https://chromium-review.googlesource.com/404685
Commit-Ready: Vijay P Hiremath <vijay.p.hiremath@intel.com>
Tested-by: Vijay P Hiremath <vijay.p.hiremath@intel.com>
Reviewed-by: Shawn N <shawnn@chromium.org>
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PD alternate mode is covered in tcpc interface. So tcpci_tcpm_init()
doesn't reset HPD. If keeping HDMI/DP type-C cable connected, doing
sysjump sets HPD signal to high while it's already high(this high comes
from previous state), then OS doesn't output to HDMI/DP monitor.
Reef Type-C port 1 follows TCPCI and has this issue.
BUG=chrome-os-partner:57689
BRANCH=none
TEST=Connect HDMI/DP type-C dongle, boot up system, OS detects HDMI/DP
monitor and extends screen to it; in console doing "sysjump RO"
or "sysjump RW", display goes out then comes back.
Change-Id: I12239a86490f29d0123fe8bad1b813d3be28d041
Signed-off-by: li feng <li1.feng@intel.com>
Reviewed-on: https://chromium-review.googlesource.com/398444
Commit-Ready: Li1 Feng <li1.feng@intel.com>
Tested-by: Li1 Feng <li1.feng@intel.com>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
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POR has both VCC & VBUS enabled. If the port is sourcing VBUS it will
also act as sync and AC_OK pin gets enabled. Hence disable the input
to the port when sourcing.
BUG=chrome-os-partner:59020
BRANCH=none
TEST=Manually verified on Reef. Connected HoHo and AC_OK is not
enabled.
Change-Id: Ic51b81f45759d7dddb2c9744d1c24dbafd1e1293
Signed-off-by: Vijay Hiremath <vijay.p.hiremath@intel.com>
Reviewed-on: https://chromium-review.googlesource.com/404168
Commit-Ready: Vijay P Hiremath <vijay.p.hiremath@intel.com>
Tested-by: Vijay P Hiremath <vijay.p.hiremath@intel.com>
Reviewed-by: Shawn N <shawnn@chromium.org>
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Till the charger task is initialized port is not set for the BD9995X
users and a false battery critical message is printed. Removed the
false message printed for BD9995X users to avoid confusion.
BUG=chrome-os-partner:58972
BRANCH=none
TEST=Manually tested on Reef.
False battery critical message is not printed on the EC console.
Change-Id: Iec8d0f354c4f6dc17efa9da8db38b125e57addab
Signed-off-by: Vijay Hiremath <vijay.p.hiremath@intel.com>
Reviewed-on: https://chromium-review.googlesource.com/402668
Commit-Ready: Vijay P Hiremath <vijay.p.hiremath@intel.com>
Tested-by: Vijay P Hiremath <vijay.p.hiremath@intel.com>
Reviewed-by: Shawn N <shawnn@chromium.org>
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BUG=chrome-os-partner:56183
BRANCH=none
TEST=Used dut-control command 'dut-control pp3300_ec_mw -r <n>'
to measure the pp3300 rail and power in S3 dropped from
~9mW to ~5mW.
Change-Id: I64b463351a6f191a94a41a31de9ee51ae6d9b7b4
Signed-off-by: Vijay Hiremath <vijay.p.hiremath@intel.com>
Reviewed-on: https://chromium-review.googlesource.com/400948
Commit-Ready: Vijay P Hiremath <vijay.p.hiremath@intel.com>
Tested-by: Vijay P Hiremath <vijay.p.hiremath@intel.com>
Reviewed-by: David Hendricks <dhendrix@chromium.org>
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Without this change the Alternate mode adapter with
multi-function capablity would only be configured as
DP instead of (DP + USB).
BUG=chrome-os-partner:58670
BRANCH=master
TEST=On Reef, with Dell dongle verified on both ports
that USB 3.0 device and ethernet is working.
Change-Id: I7a15a281306e29f589de2ef59da9c424f3f6710d
Signed-off-by: Divya Sasidharan <divya.s.sasidharan@intel.com>
Reviewed-on: https://chromium-review.googlesource.com/400080
Commit-Ready: Kevin K Wong <kevin.k.wong@intel.com>
Tested-by: Divya S Sasidharan <divya.s.sasidharan@intel.com>
Tested-by: Li1 Feng <li1.feng@intel.com>
Reviewed-by: Shawn N <shawnn@chromium.org>
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Signed-off-by: Todd Broch <tbroch@chromium.org>
BRANCH=glados,gru,oak
BUG=chrome-os-partner:57458
TEST=usbpd_GFU
Change-Id: I5a6bfde742a5c698680f99f342b1696084fd002a
Reviewed-on: https://chromium-review.googlesource.com/397862
Commit-Ready: Todd Broch <tbroch@chromium.org>
Tested-by: Todd Broch <tbroch@chromium.org>
Reviewed-by: Benson Leung <bleung@google.com>
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
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charge_temp_sensor_get_val() is used to get the battery temperature value
hence renamed it to charge_get_battery_temp().
BUG=none
BRANCH=none
TEST=make buildall -j
Change-Id: I2b52cac57dcde12a6b7405e7d712240e278954e2
Signed-off-by: Vijay Hiremath <vijay.p.hiremath@intel.com>
Reviewed-on: https://chromium-review.googlesource.com/397962
Commit-Ready: Vijay P Hiremath <vijay.p.hiremath@intel.com>
Tested-by: Vijay P Hiremath <vijay.p.hiremath@intel.com>
Reviewed-by: David Hendricks <dhendrix@chromium.org>
Reviewed-by: Randall Spangler <rspangler@chromium.org>
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Enable this EC console command for testing
BUG=None
BRANCH=master
TEST="accelinfo on" displays sensor readings
Change-Id: I27173b9109ae218c6a902e141b1ce0f85f04b6ad
Reviewed-on: https://chromium-review.googlesource.com/395572
Commit-Ready: Divya S Sasidharan <divya.s.sasidharan@intel.com>
Tested-by: Divya S Sasidharan <divya.s.sasidharan@intel.com>
Reviewed-by: Shawn N <shawnn@chromium.org>
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This command will be used to perform power validation.
BUG=none
BRANCH=none
TEST=ectool backlight command can be used to enable/disable Display
Backlight while system is in S0 state.
Change-Id: Ic61aa4cf5beadc83ea9dd38bb11cf10c53d4c20e
Signed-off-by: Shamile Khan <shamile.khan@intel.com>
Reviewed-on: https://chromium-review.googlesource.com/393007
Reviewed-by: Shawn N <shawnn@chromium.org>
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When the kernel reads sensor data via LPC, it expects the order to be:
- ACCEL
- ACCEL
- GYRO
(other sensors data are read through EC commands)
BMI160 expects ACCEL, GYRO and MAG to be next to each other.
Reorganize motion_sensor array to fit these 2 requirements:
If BMI160 in the lid:
- BASE_ACCEL
- LID_ACCEL
- LID_GYRO
...
If BMI160 in the base:
- LID_ACCEL
- BASE_ACCEL
- BASE_GRYO
...
BUG=none
BRANCH=amenia,reef,wheatley
TEST=On reef, check the sensor data pull directly by the AP (for chrome
for lid angle) is correct. Check ARC++ works are expected.
Change-Id: If9477be0de44472e38a057c0b8533cb54acee220
Signed-off-by: Gwendal Grignou <gwendal@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/394751
Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
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BUG=none
BRANCH=none
TEST=booted reef evt
Change-Id: I46aa5988a33b349007c3a21048f514b1720aacaf
Signed-off-by: Kevin K Wong <kevin.k.wong@intel.com>
Reviewed-on: https://chromium-review.googlesource.com/394215
Tested-by: Divya S Sasidharan <divya.s.sasidharan@intel.com>
Reviewed-by: Vijay P Hiremath <vijay.p.hiremath@intel.com>
Reviewed-by: Divya S Sasidharan <divya.s.sasidharan@intel.com>
Reviewed-by: David Hendricks <dhendrix@chromium.org>
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BUG=none (similar to chrome-os-partner:56765, though)
BRANCH=none
TEST=flashrom's "--flash-name" shows SPI chip info instead of EC info
on reef
Change-Id: I1090dd5d4079ff94201fce9fd3e03a384eb3cb7b
Signed-off-by: David Hendricks <dhendrix@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/392349
Reviewed-by: Shawn N <shawnn@chromium.org>
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This command will be used to perform power validation.
BUG=none
BRANCH=none
TEST=ectool extpwrlimit command can be used to set the max voltage/current
drawn from external charger.
Change-Id: Ic258954c1e3a714be7f648e77234dab594227ce0
Signed-off-by: Shamile Khan <shamile.khan@intel.com>
Reviewed-on: https://chromium-review.googlesource.com/388843
Reviewed-by: Shawn N <shawnn@chromium.org>
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Added i2ctest console command to test the reliability of the I2C.
By reading/writing to the known registers this tests provides the
number of successful read and writes.
BUG=chrome-os-partner:57487
TEST=Enabled the i2ctest config on Reef and tested the
i2c read/writes.
BRANCH=none
Change-Id: I9e27ff96f2b85422933bc590d112a083990e2dfb
Signed-off-by: Vijay Hiremath <vijay.p.hiremath@intel.com>
Reviewed-on: https://chromium-review.googlesource.com/290427
Commit-Ready: Vijay P Hiremath <vijay.p.hiremath@intel.com>
Tested-by: Vijay P Hiremath <vijay.p.hiremath@intel.com>
Reviewed-by: Shawn N <shawnn@chromium.org>
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Allow hibernation on AC for hibernate console commands and hardware
key sequence [ALT + VolumeUp + H].
BUG=chrome-os-partner:57724
BRANCH=none
TEST='hibernate' console command & hardware key sequence can
successfully hibernate the system on AC.
Change-Id: Idfcc37620a712faca4b48a680ec9a7903c26ed88
Signed-off-by: Vijay Hiremath <vijay.p.hiremath@intel.com>
Reviewed-on: https://chromium-review.googlesource.com/388591
Commit-Ready: Vijay P Hiremath <vijay.p.hiremath@intel.com>
Tested-by: Vijay P Hiremath <vijay.p.hiremath@intel.com>
Reviewed-by: Divya S Sasidharan <divya.s.sasidharan@intel.com>
Reviewed-by: Shawn N <shawnn@chromium.org>
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Modify USB enable GPIO name to comply with FAFT test.
It uses this name format USB%d_ENABLE to power
on/off all the USB ports.
BRANCH=none
BUG=none
TEST=on Reef FAFT test firmware_ECUsbPorts passes
Change-Id: I9b3b5d1668acfca5505dcff6708800f409555040
Signed-off-by: Divya Sasidharan <divya.s.sasidharan@intel.com>
Reviewed-on: https://chromium-review.googlesource.com/386854
Commit-Ready: Divya S Sasidharan <divya.s.sasidharan@intel.com>
Tested-by: Divya S Sasidharan <divya.s.sasidharan@intel.com>
Reviewed-by: Shawn N <shawnn@chromium.org>
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Except the CHIP_ID and charger name code is common between BD99955
and BD99956. Hence renamed the code to BD9995X so that valid
output is printed from console commands.
BUG=chrome-os-partner:57519
BRANCH=none
TEST=Manually tested on Reef. 'charger' console command prints
charger name as 'bd99956'
Change-Id: I3c995757941bcc5a6a8026dd807d76a7a47c9911
Signed-off-by: Vijay Hiremath <vijay.p.hiremath@intel.com>
Reviewed-on: https://chromium-review.googlesource.com/387119
Commit-Ready: Vijay P Hiremath <vijay.p.hiremath@intel.com>
Tested-by: Vijay P Hiremath <vijay.p.hiremath@intel.com>
Reviewed-by: Shawn N <shawnn@chromium.org>
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BUG=chrome-os-partner:56866
BRANCH=master
TEST=prints firmware version at boot up;make buildall -j
Change-Id: Idb067186924e6706ccfc69a64f2febd61f396074
Signed-off-by: Divya Sasidharan <divya.s.sasidharan@intel.com>
Reviewed-on: https://chromium-review.googlesource.com/380317
Commit-Ready: Divya S Sasidharan <divya.s.sasidharan@intel.com>
Tested-by: Divya S Sasidharan <divya.s.sasidharan@intel.com>
Reviewed-by: Vijay P Hiremath <vijay.p.hiremath@intel.com>
Reviewed-by: Shawn N <shawnn@chromium.org>
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Removed power LED support.
In case of discharging, if below critical level, LED should blink;
otherwise, will show power state;
In case of charging, will show charging/battery state.
BUG=chrome-os-partner:56932,chrome-os-partner:57025
BRANCH=none
TEST=Verified on EVT with <10% and <3% battery, LED is blinking
amber at proper duty cycle.
Also verified ectool led command works as expected.
Change-Id: I903396a9a1dc5e08618683f7124b09678678e233
Signed-off-by: li feng <li1.feng@intel.com>
Reviewed-on: https://chromium-review.googlesource.com/383880
Commit-Ready: Li1 Feng <li1.feng@intel.com>
Tested-by: Li1 Feng <li1.feng@intel.com>
Reviewed-by: Shawn N <shawnn@chromium.org>
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- Fix magnetometer matrix to match BMM150 physical position
- Increase HOSTCMD stack size, EC crash when calibrating gyroscope.
BUG=none
BRANCH=reef
TEST=No crash when calibrating from AP (echo 1 >
/sys/.../iio:deviceX/calibrate).
Change-Id: I2d7b73c295a71649f54ffa61ec8cafa1230c8a7d
Signed-off-by: Gwendal Grignou <gwendal@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/386442
Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
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- Enable MKBP events:
Allow EC to send sensor event to the kernel sensor stack.
- Disable APCI message display, to avoid overwhelming the console.
- Set the rotation matrices to match Android requirement.
BUG=b:27849483
CQ-DEPEND=CL:384341
BRANCH=reef
TEST=Check we can receive sensor events for ARC++.
Check the acceleromter axis are correct.
Change-Id: I5fa58e22167f027bd1b84e72f002060d15d882c4
Signed-off-by: Gwendal Grignou <gwendal@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/385082
Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
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BUG=chrome-os-partner:56040
BRANCH=none
TEST=Manually tested on Reef.
Used scope to monitor VBUS & it dropped to 0.8V within 650ms.
Change-Id: Icaea1dc11a7342a5cc1493d6d3c2ec3408d6d37b
Signed-off-by: Kevin K Wong <kevin.k.wong@intel.com>
Signed-off-by: Vijay Hiremath <vijay.p.hiremath@intel.com>
Reviewed-on: https://chromium-review.googlesource.com/367482
Commit-Ready: Vijay P Hiremath <vijay.p.hiremath@intel.com>
Tested-by: Vijay P Hiremath <vijay.p.hiremath@intel.com>
Reviewed-by: Shawn N <shawnn@chromium.org>
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charge_manager may request a charge current limit less than the
capability of the supply in certain cases (eg. during PD voltage
transition, to make an effort to comply with reduced load spec).
Depending on the battery / system state, setting a reduced charge
current limit may result in brownout.
Pass the uncapped / max negotiated current to board_set_charge_limit()
so that boards may use it instead of the requested limit in such
circumstances.
BUG=chrome-os-partner:56139
BRANCH=gru
TEST=Manual on kevin with subsequent commit, boot system with zinger +
low-charge battery, verify devices powers up to OS without brownout.
Change-Id: I2b8e0d44edcf57ffe4ee0fdec1a1ed35c6becbbd
Signed-off-by: Shawn Nematbakhsh <shawnn@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/383732
Commit-Ready: Shawn N <shawnn@chromium.org>
Tested-by: Shawn N <shawnn@chromium.org>
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
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LID_OPEN gpio is interrupt trigger on both the edge. If the system is
hibernated when LID is open and then LID is closed, system wakes from
hibernation. Hence setting the LID_OPEN GPIO as interrupt raising before
hibernation so that system won't wake up upon LID close in hibernation.
BUG=chrome-os-partner:57221
BRANCH=none
TEST=Issued hibernate when LID is open, closed the LID after hibernation
observed system won't boot back till LID is open again.
Change-Id: Idc89c3d85b7d246c3e18d0ced48e7d47bebeafec
Signed-off-by: Vijay Hiremath <vijay.p.hiremath@intel.com>
Reviewed-on: https://chromium-review.googlesource.com/383753
Commit-Ready: Vijay P Hiremath <vijay.p.hiremath@intel.com>
Tested-by: Vijay P Hiremath <vijay.p.hiremath@intel.com>
Reviewed-by: Shawn N <shawnn@chromium.org>
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This makes minor changes to GPIOs for the next build:
- USB_C0_PD_RST_L is actually push-pull in next build, so remove the
comments about USB_C0_PD_RST_ODL.
- Added TABLET_MODE
- Make the net name for volume up/down buttons match the name in the
schematic.
BUG=none
BRANCH=none
TEST=built and booted on Reef EVT
Change-Id: I0799de059d71809174e246b6bbd7f3a2fe25686a
Signed-off-by: David Hendricks <dhendrix@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/381791
Reviewed-by: Shawn N <shawnn@chromium.org>
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Data from the sensor (in Pa) does not fit in 16 bits.
Add set_range/get_range to allow the AP to set the precision.
For pressure around ~1000 hPa, we need to right shift by 2 bits.
BUG=chrome-os-partner:57117
BRANCH=reef
TEST=Check data is not truncated anymore:
> accelrange 4
Range for sensor 4: 262144 (Pa ~= 2621 hPa)
> accelread 4
Current data 4: 24030 0 0
Last calib. data 4: 24030 0 0 (x4 = 961.2 hPa)
Change-Id: I3f7280336e5120d903116612c9c830f4150d2ed7
Signed-off-by: Gwendal Grignou <gwendal@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/382323
Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
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Add FIFO to allow ARC++ sensors.
BUG=b:27849483
BRANCH=reef
TEST=Check cros_ec_sensor_ring is loaded.
Change-Id: Idca3a324530a29f33face8784dcf260fdafce83f
Signed-off-by: Gwendal Grignou <gwendal@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/382322
Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
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This patch makes a few small changes to gpio.inc:
- Correct NC1 assignment (GPIO00)
- Add ENG_STRAP (GPIOB6) which is currently not connected to anything.
- Cosmetic fix for LEDs (replace spaces with tabs for alignment)
BUG=none
BRANCH=none
TEST=built and booted on Reef
Change-Id: Ieca83be6c7423694d88f21ebfc3f57849bf42cde
Signed-off-by: David Hendricks <dhendrix@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/380449
Tested-by: Bill Richardson <wfrichar@chromium.org>
Reviewed-by: Bill Richardson <wfrichar@chromium.org>
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BUG=chrome-os-partner:56640
BRANCH=none
TEST=tested w/ follow-up CL
Change-Id: I1dad0bc8e23e265ba043e0d00c3d26ee5654c5e3
Signed-off-by: David Hendricks <dhendrix@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/380296
Reviewed-by: Shawn N <shawnn@chromium.org>
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This fixes an issue where the power+charge LED sometimes changes
more than once when power is plugged in.
BUG=chrome-os-partner:56471
BRANCH=none
TEST=Reef power+charger LED changes from one color to another instead
of back and forth (unless there are a lot of PD hard resets, but
that's another matter)
Change-Id: I0ea0dd59cbb7c86b758123fd4e6c8e7b20efa5df
Reviewed-on: https://chromium-review.googlesource.com/378756
Commit-Ready: David Hendricks <dhendrix@chromium.org>
Tested-by: David Hendricks <dhendrix@chromium.org>
Reviewed-by: Shawn N <shawnn@chromium.org>
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Both press and release of the volume button has to be detected in
order to process volume changes. Hence, trigger the interrupt on
both the edges for volume button GPIOs.
BUG=chrome-os-partner:56856
BRANCH=none
TEST=Volume slider can slide when volume buttons are pressed.
Change-Id: I0655f1c494d754904987cc2c76dcb3a39d5670ab
Signed-off-by: Vijay Hiremath <vijay.p.hiremath@intel.com>
Reviewed-on: https://chromium-review.googlesource.com/379621
Commit-Ready: Vijay P Hiremath <vijay.p.hiremath@intel.com>
Tested-by: Vijay P Hiremath <vijay.p.hiremath@intel.com>
Reviewed-by: Kevin K Wong <kevin.k.wong@intel.com>
Reviewed-by: Shawn N <shawnn@chromium.org>
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To support hibernate called from console commands, ectool commands
and key sequence added code to shutdown the AP before hibernating.
BUG=chrome-os-partner:56490
BRANCH=none
TEST=Using console command, ectool command & key sequence verified
both EC and AP are hibernated.
Change-Id: I7708377596d7d4175a44c202ae2385a239ca3d01
Signed-off-by: Vijay Hiremath <vijay.p.hiremath@intel.com>
Reviewed-on: https://chromium-review.googlesource.com/379157
Commit-Ready: Vijay P Hiremath <vijay.p.hiremath@intel.com>
Tested-by: Vijay P Hiremath <vijay.p.hiremath@intel.com>
Reviewed-by: Shawn N <shawnn@chromium.org>
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Field is not required: sensor->chip already has that information.
BRANCH=veyron
BUG=none
TEST=compile
(cherry picked from commit 90fcd6be2b5d2104301efef295113d7816e14042)
Reviewed-on: https://chromium-review.googlesource.com/379096
Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
Change-Id: I6c0bc2e71d7c848968caa78c749dd3fb916f6263
Signed-off-by: Gwendal Grignou <gwendal@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/379541
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Setting the higher limit of input current for BC1.2 & nonstandard
BC1.2 devices than their maximum current rating results in an
anti-collapse. BD99955 does not have a way to do hardware charge
ramp or to detect the anti-collapse for these chargers. Hence added
code to support software charge ramp for BC1.2 & nonstandard BC1.2
so that the input current is set to maximum of the respective
charger.
BUG=chrome-os-partner:54990, chrome-os-partner:55517
BRANCH=none
TEST=Manually tested on Amenia & Reef. BC1.2 & nonstandard BC12
devices can negotiate their respective maximum current rating.
Change-Id: I0033b3662362bd7822ad01cf4360d18caabd5249
Signed-off-by: Vijay Hiremath <vijay.p.hiremath@intel.com>
Reviewed-on: https://chromium-review.googlesource.com/358106
Commit-Ready: Vijay P Hiremath <vijay.p.hiremath@intel.com>
Tested-by: Vijay P Hiremath <vijay.p.hiremath@intel.com>
Reviewed-by: Shawn N <shawnn@chromium.org>
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Set the EC_WIRELESS_SWITCH flags in Board file. This signals the
common code to maintain the ON or OFF state of the power rails for
the Wifi/Bluetooth chip when chipset enters suspend state.
BUG=chrome-os-partner:56305
BRANCH=none
TEST=Boot the system with a Bluetooth Mouse paired. Open a Linux
shell and type powerd_dbus_suspend. When the system enters
sleep state, click the mouse. System should wake up.
Change-Id: I261ca03d34bc8a05d3a2aa5fcb777f714fe30572
Signed-off-by: Shamile Khan <shamile.khan@intel.com>
Reviewed-on: https://chromium-review.googlesource.com/374164
Commit-Ready: David Hendricks <dhendrix@chromium.org>
Tested-by: Jagadish Krishnamoorthy <jagadish.krishnamoorthy@intel.com>
Reviewed-by: David Hendricks <dhendrix@chromium.org>
Reviewed-by: Jagadish Krishnamoorthy <jagadish.krishnamoorthy@intel.com>
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