| Commit message (Collapse) | Author | Age | Files | Lines |
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Currently, all boards using the LED On/Off module have battery LEDs.
However, if we'd like to expand support to Chromeboxes then the battery
LED must become optional.
BRANCH=None
BUG=b:185508707
TEST=make -j buildall
Signed-off-by: Diana Z <dzigterman@chromium.org>
Change-Id: Ieae098829ebe6c8b103f23d5abdbf70e7bcbdf2d
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2832692
Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
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Move the LED on/off module towards using a more flexible LED support
approach. Define a weak power LED table and setter for boards to
override when needed. Note that during run-time these functions will
not get called since led_auto_control_is_enabled() will return false for
nonexistent LEDs.
This consumes an average of 165 additional bytes of flash space on
boards which do not use a power LED.
BRANCH=None
BUG=b:185508707
TEST=make -j buildall, load on guybrush (battery LED only) and confirm
no errors are seen. Load on Boten (both LEDs) and confirm behavior
appears normal
Signed-off-by: Diana Z <dzigterman@chromium.org>
Change-Id: Iaa1e22a7f5d8be39eb8792ee13d358087d7f7482
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2832691
Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
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Some items in faft_pd is failed
because of WA for S0iX power consumption.
WA is fixed, based on CL:2773218
BUG=b:186022475
BRANCH=none
TEST=make -j BOARD=sasuke & run faft_pd
Signed-off-by: YongBeum.Ha <ybha@samsung.corp-partner.google.com>
Change-Id: I9fe8a14c6e071f12d13012ec7809dad4d20e3192
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2842715
Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
Commit-Queue: Aseda Aboagye <aaboagye@chromium.org>
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Select usb mux on board init with cbi_ssfc.
BUG=b:182596801
BRANCH=none
TEST=make -j BOARD=sasuke & check if c1 port works
Signed-off-by: YongBeum.Ha <ybha@samsung.corp-partner.google.com>
Change-Id: Id5886a5dbe128cbb7c32af4cb24d930be302eaa0
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2801177
Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
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Add battery information for sunwoda.
BUG=b:182790995, b:181624369, b:178565802
BRANCH=None
TEST=make -j BOARD=sasuke
Signed-off-by: YongBeum.Ha <ybha@samsung.corp-partner.google.com>
Change-Id: I592f9ade6f700138d9302ca3c4bbca0e047e975a
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2812598
Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
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Enable pull-down of GPIOB4 & GPIOB5.
When I2C function is enabled,
the pull-down option for GPIOB4,GPIOB5 is not work.
So alternative setting for these GPIOs must be cleared.
BUG=b:184914946
BRANCH=None
TEST=make -j BOARD=sasuke
Signed-off-by: YongBeum.Ha <ybha@samsung.corp-partner.google.com>
Change-Id: I3d125e844816f0a7c07cb0b166390e7131100e6e
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2822277
Reviewed-by: Diana Z <dzigterman@chromium.org>
Commit-Queue: Aseda Aboagye <aaboagye@chromium.org>
Tested-by: Aseda Aboagye <aaboagye@chromium.org>
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Enable pull-down of GPIOB4 & GPIOB5
BUG=b:184914946
BRANCH=None
TEST=make -j BOARD=sasuke
Signed-off-by: YongBeum.Ha <ybha@samsung.corp-partner.google.com>
Change-Id: I27e1b612956f217418178783cf28c5c466f281ba
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2817140
Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
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Set NC pin to pull-down to reduce power consumption
BUG=b:178356507
BRANCH=None
TEST=make -j BOARD=sasuke
Signed-off-by: YongBeum.Ha <ybha@samsung.corp-partner.google.com>
Change-Id: I3725751abfe28302322a4fe3e0143b8b3a70fdcd
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2801179
Reviewed-by: Diana Z <dzigterman@chromium.org>
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Remove the CONFIG_SYSTEM_UNLOCKED option configurations and
enable CONFIG_USB_PD_COMM_LOCKED for final firmware.
BRANCH=none
BUG=b:183305545
TEST=flash on sasuke and PD communication did not negotiate (when
WP was asserted)in RO but did RW.
Signed-off-by: YongBeum.Ha <ybha@samsung.corp-partner.google.com>
Change-Id: Ia1fea35c6dd7ff126d273a8c86b453cfad7ae8b0
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2801174
Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
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With the previous change to disable the ASGATE from the charger side,
this actually ended up breaking sourcing VBUS.
This commit enables the ASGATE when we are attempting to source VBUS.
BUG=b:183220414
BRANCH=dedede
TEST=Build and flash madoo, plug in a Type-C sink, verify that VBUS is
sourced.
TEST=Verify that DUT can PR_Swap with peripheral.
Signed-off-by: Aseda Aboagye <aaboagye@google.com>
Change-Id: I1938f2b827e57a04ef72e2ad35ad6ff29ce18712
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2795073
Reviewed-by: Diana Z <dzigterman@chromium.org>
Commit-Queue: Aseda Aboagye <aaboagye@chromium.org>
Tested-by: Aseda Aboagye <aaboagye@chromium.org>
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This is a reland of f7fbc629f0655229cc7ffdadfb18c9e13118e3d2
Original change's description:
> dedede/raa489000: Disable ASGATE from READY state
>
> On the boards which use the RAA489000, we keep the ADC enabled while
> giving VBUS control to the charger side. This can cause a situation
> where VBUS is not quite zero volts when a charger is removed. This
> commit uses the charger side registers to control the ASGATE when
> selecting our active charge port. This is done in addition to the
> existing implementation which uses the TCPCI registers to control
> ASGATE. When we place the parts into low power mode, we move the VBUS
> control from the TCPC side of the IC to the charger side. It should
> be safe to issue both commands as if the TCPC side has control, the IC
> ignores the setting from the charger side registers.
>
> BUG=b:183220414
> BRANCH=dedede
> TEST=Build and flash madoo, plug in charger to port, unplug, verify
> that VBUS falls to < 200mV and decays from there.
>
> Signed-off-by: Aseda Aboagye <aaboagye@google.com>
> Change-Id: I8e8c8cc32575d18c9d3d1210ed3c5cf69ad5ca4b
> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2793058
> Tested-by: Aseda Aboagye <aaboagye@chromium.org>
> Reviewed-by: Diana Z <dzigterman@chromium.org>
> Commit-Queue: Aseda Aboagye <aaboagye@chromium.org>
Bug: b:183220414
Change-Id: I36db53f3e13ba848308cd7e0c94a1b5a3551c600
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2797549
Reviewed-by: Diana Z <dzigterman@chromium.org>
Commit-Queue: Aseda Aboagye <aaboagye@chromium.org>
Tested-by: Aseda Aboagye <aaboagye@chromium.org>
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This function prototype is defined in lots of files, none of which is
visible to Zephyr.
Add a prototype in one place and remove the others.
BUG=b:183296099
BRANCH=none
TEST=make buildall
Signed-off-by: Simon Glass <sjg@chromium.org>
Change-Id: Ia324327a69b117483ab9ee5c85eba93c0fb5ad9c
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2789799
Reviewed-by: Jack Rosenthal <jrosenth@chromium.org>
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This reverts commit f7fbc629f0655229cc7ffdadfb18c9e13118e3d2.
Reason for revert: Breaks sourcing of VBUS.
Original change's description:
> dedede/raa489000: Disable ASGATE from READY state
>
> On the boards which use the RAA489000, we keep the ADC enabled while
> giving VBUS control to the charger side. This can cause a situation
> where VBUS is not quite zero volts when a charger is removed. This
> commit uses the charger side registers to control the ASGATE when
> selecting our active charge port. This is done in addition to the
> existing implementation which uses the TCPCI registers to control
> ASGATE. When we place the parts into low power mode, we move the VBUS
> control from the TCPC side of the IC to the charger side. It should
> be safe to issue both commands as if the TCPC side has control, the IC
> ignores the setting from the charger side registers.
>
> BUG=b:183220414
> BRANCH=dedede
> TEST=Build and flash madoo, plug in charger to port, unplug, verify
> that VBUS falls to < 200mV and decays from there.
>
> Signed-off-by: Aseda Aboagye <aaboagye@google.com>
> Change-Id: I8e8c8cc32575d18c9d3d1210ed3c5cf69ad5ca4b
> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2793058
> Tested-by: Aseda Aboagye <aaboagye@chromium.org>
> Reviewed-by: Diana Z <dzigterman@chromium.org>
> Commit-Queue: Aseda Aboagye <aaboagye@chromium.org>
Bug: b:183220414
Change-Id: Ibf6c161adca9981a065e969b6c3b73dd408ef1ba
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2796411
Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
Commit-Queue: Aseda Aboagye <aaboagye@chromium.org>
Tested-by: Aseda Aboagye <aaboagye@chromium.org>
Bot-Commit: Rubber Stamper <rubber-stamper@appspot.gserviceaccount.com>
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On the boards which use the RAA489000, we keep the ADC enabled while
giving VBUS control to the charger side. This can cause a situation
where VBUS is not quite zero volts when a charger is removed. This
commit uses the charger side registers to control the ASGATE when
selecting our active charge port. This is done in addition to the
existing implementation which uses the TCPCI registers to control
ASGATE. When we place the parts into low power mode, we move the VBUS
control from the TCPC side of the IC to the charger side. It should
be safe to issue both commands as if the TCPC side has control, the IC
ignores the setting from the charger side registers.
BUG=b:183220414
BRANCH=dedede
TEST=Build and flash madoo, plug in charger to port, unplug, verify
that VBUS falls to < 200mV and decays from there.
Signed-off-by: Aseda Aboagye <aaboagye@google.com>
Change-Id: I8e8c8cc32575d18c9d3d1210ed3c5cf69ad5ca4b
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2793058
Tested-by: Aseda Aboagye <aaboagye@chromium.org>
Reviewed-by: Diana Z <dzigterman@chromium.org>
Commit-Queue: Aseda Aboagye <aaboagye@chromium.org>
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Use board-specific override files when generating VIFs for boards.
BUG=b:172276715
TEST=make buildall
BRANCH=none
Signed-off-by: Abe Levkoy <alevkoy@chromium.org>
Change-Id: I197365018ceb8197c22d631cebf4cbce1c0119f7
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2785506
Reviewed-by: Denis Brockus <dbrockus@chromium.org>
Commit-Queue: Denis Brockus <dbrockus@chromium.org>
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BRANCH=dedede
BUG=b:182232263
TEST=verified Sasuke can be charged by dual power role dongle.
verified Sasuke can use ethernet and power with type-c servo v4.
Signed-off-by: Jongpil Jung <jongpil19.jung@samsung.com>
Change-Id: I900cac732f0735715c08906fef5beb2990b0d30c
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2752566
Tested-by: Jongpil Jung <jongpil19.jung@samsung.corp-partner.google.com>
Tested-by: Edward Doan <edoan@chromium.org>
Reviewed-by: Edward Doan <edoan@chromium.org>
Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
Commit-Queue: Aseda Aboagye <aaboagye@chromium.org>
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Lower input voltage on S0iX to reduce power consumption
BUG=b:182221344
BRANCH=None
TEST=make -j BOARD=sasuke
Change-Id: I96d7a9d48cc0f52910e80528fc8fec09818cd40a
Signed-off-by: YongBeum.Ha <ybha@samsung.corp-partner.google.com>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2747532
Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
Commit-Queue: Aseda Aboagye <aaboagye@chromium.org>
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Enable ADC of c0 charger when entering z-sleep(hibernation)
BUG=b:180668220
BRANCH=None
TEST=make -j BOARD=sasuke
Signed-off-by: YongBeum.Ha <ybha@samsung.corp-partner.google.com>
Change-Id: Ic12bc3e0476ca618133a7b7ee4cca71c43f87a87
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2728004
Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
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Stop charging when battery temperature is over 50'C
BUG=b:181624369
BRANCH=None
TEST=make -j BOARD=sasuke
Signed-off-by: YongBeum.Ha <ybha@samsung.corp-partner.google.com>
Change-Id: Ib5ba5c8e68720324556bbe531ae0f1218af5f3c6
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2728005
Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
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define CONFIG_CHARGE_RAMP_HW
BUG=b:180166404
BRANCH=None
TEST=make -j BOARD=sasuke
flash EC, connect DCP charger and check if input current is 1.5A
Signed-off-by: YongBeum.Ha <ybha@samsung.corp-partner.google.com>
Change-Id: I9b8ec06c4851741c574f6b1b9f831072b6efda7f
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2717160
Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
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tune retimer to improve eDP signal
BUG=b:176862264
BRANCH=None
TEST=make -j BOARD=sasuke
Signed-off-by: YongBeum.Ha <ybha@samsung.corp-partner.google.com>
Change-Id: I57b62cc7f598d15478e837af508c59fa58c68d72
Signed-off-by: YongBeum.Ha <ybha@samsung.corp-partner.google.com>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2684082
Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
Commit-Queue: Aseda Aboagye <aaboagye@chromium.org>
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add WA to connect CCD
BUG=b:179624712
BRANCH=none
TEST=make -j BOARD=sasuke
Signed-off-by: YongBeum.Ha <ybha@samsung.corp-partner.google.com>
Change-Id: I402ed1d955c1104a049c2c2e73fa26348a627bca
Signed-off-by: YongBeum.Ha <ybha@samsung.corp-partner.google.com>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2684077
Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
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Thus far, it seems that boards that use the same OCPC PID constants
behave similarly. Therefore, this commit updates the constants that
were most recently used on madoo to the other OCPC boards that use the
same charger IC such that the behaviour meets the criteria at
go/ocpc-testing.
- Converges around the target current.
- Average steady state error is less than 4% of target.
- Current is reduced to target level in less than 5s when load is
suddenly released.
BUG=None
BRANCH=dedede
TEST=Build and flash magolor. Verify that battery can charge to 100%.
Verify that it meets or exceeds the constraints above.
TEST=Verify that DUT can come out of battery cutoff from sub board.
Signed-off-by: Aseda Aboagye <aaboagye@google.com>
Change-Id: I206854c097c307b941a64547f9b74c8259a7d499
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2691585
Tested-by: Aseda Aboagye <aaboagye@chromium.org>
Auto-Submit: Aseda Aboagye <aaboagye@chromium.org>
Reviewed-by: Diana Z <dzigterman@chromium.org>
Commit-Queue: Diana Z <dzigterman@chromium.org>
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Charging Voltage (Battery → Charger IC)
Need 100mV margin between battery allowable voltage
and Charger IC set voltage.
8860mV → 8760mV
8400mV → 8300mV
Charger Current
Need 10% marging between battery allowable current
and Charging current.
- Normal temperature (Battery → Charger IC)
~8.24V : 6916mA → 6224mA
~8.44V : 5320mA → 4788mA
~8.86V : 4256mA → 3830mA
BUG=b:178565802
BRANCH=None
TEST=make -j BOARD=sasuke
Signed-off-by: YongBeum.Ha <ybha@samsung.corp-partner.google.com>
Change-Id: I41dca90d7ff830a392093163d7d2141cbbd17f09
Signed-off-by: YongBeum.Ha <ybha@samsung.corp-partner.google.com>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2654666
Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
Commit-Queue: Aseda Aboagye <aaboagye@chromium.org>
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tune usb_eq and usb_gain on port 1
BUG=b:176862264
BRANCH=None
TEST=make -j BOARD=sasuke
update ec and check usb eq register
Signed-off-by: YongBeum.Ha <ybha@samsung.corp-partner.google.com>
Change-Id: Ief9bc8d545e94d2e4726ed61d12739e7e872aabc
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2649895
Reviewed-by: Diana Z <dzigterman@chromium.org>
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add function to tune usb eq and gain
BUG=b:176862264
BRANCH=None
TEST=make -j BOARD=sasuke
Signed-off-by: YongBeum.Ha <ybha@samsung.corp-partner.google.com>
Change-Id: I50ff040643cd2635968c5cfb988998ad3a82a836
Signed-off-by: YongBeum.Ha <ybha@samsung.corp-partner.google.com>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2649894
Reviewed-by: Diana Z <dzigterman@chromium.org>
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Boards using the RAA489000 TCPC should set output current on their ports
through the TCPC driver. This commit adds a board function to do this
for every dedede board currently using the RAA489000.
BRANCH=None
BUG=b:178064507
TEST=on madoo, verify OCP occurs if more than 1.5A is drawn on a non-PD
port, verify register is set to allow 3.0A for port partners requesting
that current in their sink capabilities
Signed-off-by: Diana Z <dzigterman@chromium.org>
Change-Id: Ieb7df916c122d5de1adaa7371a58ad5cf2954ee4
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2658377
Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
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retimer for port 0 is added.
BUG=b:175081710
BRANCH=none
TEST=make -j BOARD=sasuke
Signed-off-by: YongBeum.Ha <ybha@samsung.corp-partner.google.com>
Change-Id: Id89fe8677c8b47312279a94b1879b223ba80f8ff
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2652111
Reviewed-by: Diana Z <dzigterman@chromium.org>
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CtsSensorTestCases is failing on Drawcia because it requests 100
events from accelerometer and gyroscope but gets zero. We can
read sensor events just fine, but they never seem to push to the
kernel. Add CONFIG_MKBP_EVENT into the baseboard, and then clean up
all the one-off variants that have added this themselves. Also, add
some accel commands specific to drawcia for easier debugging.
BUG=b:171939568
BRANCH=none
TEST=Use amstan's script, which amounts to cat /dev/iio:deviceN
Signed-off-by: Evan Green <evgreen@chromium.org>
Change-Id: Ia796ec2f9a08d3628dcabb4b5fca425693af4099
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2638636
Reviewed-by: Diana Z <dzigterman@chromium.org>
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Change LED Gpio Setting from Open drain to push-pull
BUG=b:178061638
BRANCH=None
TEST=make -j BOARD=sasuke
Signed-off-by: YongBeum.Ha <ybha@samsung.corp-partner.google.com>
Change-Id: I29207281b05128b6db9abfcc8129293c693da109
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2641713
Reviewed-by: Diana Z <dzigterman@chromium.org>
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Almost every relevant board copy-pastes 5000 us. Make that the default
and get rid of the redundant definitions. This is the approximate result
of this command:
find . -type f -name *.h | xargs sed -i -E \
'/#define CONFIG_USBC_VCONN_SWAP_DELAY_US[[:space:]]+5000[[:space:]]/d'
BUG=b:144165680
TEST=make buildall
BRANCH=none
Change-Id: Ife86f9752971abcd7ab5ad5a5e607eb2ccbde2ba
Signed-off-by: Abe Levkoy <alevkoy@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2628132
Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
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Replace PD_VCONN_SWAP_DELAY with CONFIG_USBC_VCONN_SWAP_DELAY_US. This
is the approximate result of the following command, run from
platform/ec:
find . -type f -\( -name '*.c' -o -name '*.h' -\) | \
xargs sed -iE 's/PD_VCONN_SWAP_DELAY/CONFIG_USBC_VCONN_SWAP_DELAY/g'
Fix some latent formatting errors in usb_pd_protocol.c, because they
were preventing pre-upload hooks from passing.
BUG=b:144165680
TEST=make buildall
BRANCH=none
Signed-off-by: Abe Levkoy <alevkoy@chromium.org>
Change-Id: Icaf3b309c08fdcd162e960cf5dc88185016b5d2d
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2628131
Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
Commit-Queue: Aseda Aboagye <aaboagye@chromium.org>
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In madoo's design, there is a protection IC between USB
connector and TCPC. When EC is hibernate, the CC lines will
be disconnected, which cause the result that TCPC can't
detect AC power and Chromebook won't wake the system.
Enalbing ADC for all modes by setting 0x4C bit 0 to 1 (to be
more precise is that we don't clear bit 0 during hibernation)
can prevent issue mention above.
BUG=b:174971576
BRANCH=dedede
TEST=flash code and make sure ac in can wake system from hibernation
Signed-off-by: Ko_Ko <Ko_Ko@compal.corp-partner.google.com>
Change-Id: I2a83c69e34cbc4bfdff90d760f32817a7924dc26
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2626803
Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
Reviewed-by: Diana Z <dzigterman@chromium.org>
Reviewed-by: Ko Ko <ko_ko@compal.corp-partner.google.com>
Tested-by: Ko Ko <ko_ko@compal.corp-partner.google.com>
Commit-Queue: Aseda Aboagye <aaboagye@chromium.org>
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modify battery information for sasuke
BUG=b:175078396
BRANCH=None
TEST=make BOARD=sasuke
Signed-off-by: YongBeum.Ha <ybha@samsung.corp-partner.google.com>
Change-Id: I9b4c74508c715b7327ef212a2c8f5173cbab57d8
Signed-off-by: YongBeum.Ha <ybha@samsung.corp-partner.google.com>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2578232
Reviewed-by: Diana Z <dzigterman@chromium.org>
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CONFIG_USB_PORT_POWER_SMART for enabling/disabling
charging from USB-A ports.
BUG=b:172104731, b:172309597
BRANCH=dedede
TEST=make BOARD=sasuke
and make sure USB-A port works.
Signed-off-by: YongBeum.Ha <ybha@samsung.corp-partner.google.com>
Change-Id: I291a642ad5f3dbd9abb80b615f4dc6e02d73685a
Signed-off-by: YongBeum.Ha <ybha@samsung.corp-partner.google.com>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2612224
Reviewed-by: Diana Z <dzigterman@chromium.org>
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Initialize vivaldi keyboard.
BUG=b:176360055
TEST=Test the top row
Test the Alt + VolUp + r combo
Test the Esc + Refresh + Power combo
Test all the other keys also (this is important) for any regression.
BRANCH=master
Signed-off-by: YongBeum.Ha <ybha@samsung.corp-partner.google.com>
Change-Id: Ie797690bd800767a3f507f2fbf4554495f4cb3e0
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2620724
Reviewed-by: Henry Sun <henrysun@google.com>
Reviewed-by: Diana Z <dzigterman@chromium.org>
Commit-Queue: Henry Sun <henrysun@google.com>
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add function to tune usb_eq_rx
BUG=b:176566398
BRANCH=None
TEST=make -j BOARD=sasuke
update ec and check usb eq register
Signed-off-by: YongBeum.Ha <ybha@samsung.corp-partner.google.com>
Change-Id: Ia8a7b1ac7c7946c9c2b9be18c3b625170ed1fc2a
Signed-off-by: YongBeum.Ha <ybha@samsung.corp-partner.google.com>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2607964
Reviewed-by: Diana Z <dzigterman@chromium.org>
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This commit revises the USB-C interrupt handlers. Sometimes the
interrupt line can remain asserted once we've finished handling the
interrupt. This commit leverages the work that was done for the other
dedede boards to check if the interrupt is still asserted and rerun
the interrupt handlers if needed.
BUG=b:143166332
BRANCH=dedede
TEST=`make -j BOARD=sasuke`
Signed-off-by: Aseda Aboagye <aaboagye@google.com>
Change-Id: Ia3fcd1f38e6de10259276d171128fb5dfa967f47
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2601173
Tested-by: Aseda Aboagye <aaboagye@chromium.org>
Reviewed-by: Diana Z <dzigterman@chromium.org>
Commit-Queue: Aseda Aboagye <aaboagye@chromium.org>
Auto-Submit: Aseda Aboagye <aaboagye@chromium.org>
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Based on schemetic, add code for thermister
BUG=b:172309597
BRANCH=master
TEST=make BOARD=sasuke
Signed-off-by: YongBeum.Ha <ybha@samsung.corp-partner.google.com>
Change-Id: Ib9d2dd17ba8999edcbb183a7b0f9a2cfd4a4d910
Signed-off-by: YongBeum.Ha <ybha@samsung.corp-partner.google.com>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2603094
Reviewed-by: Diana Z <dzigterman@chromium.org>
Commit-Queue: Henry Sun <henrysun@google.com>
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Change EC chip to npcx7m7fc from npcx7m6fc.
BUG=b:172309597
BRANCH=master
TEST=make BOARD=sasuke
Signed-off-by: YongBeum.Ha <ybha@samsung.corp-partner.google.com>
Change-Id: Ie602038936a43230d1a0a8e9886853aab99b317c
Signed-off-by: YongBeum.Ha <ybha@samsung.corp-partner.google.com>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2578618
Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
Reviewed-by: Henry Sun <henrysun@google.com>
Commit-Queue: Aseda Aboagye <aaboagye@chromium.org>
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Now that the DPM will be handling source-out decisions for TCPMv2,
remove references to its old configuration options from TCPMv2 boards in
order to avoid any confusion as to what code is running now. Also
remove the charge manager notifications of sink attach/detach since the
policy is being centralized into the DPM.
Note that the previous configuration options only ever allocated one 3.0
A port, and so the default number of 3.0 A ports has been set to 1.
BRANCH=None
BUG=b:168862110,b:141690755
TEST=make -j buildall
Signed-off-by: Diana Z <dzigterman@chromium.org>
Change-Id: Ie452e3da32b04226503539daa67b6b9f4a58aa58
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2597431
Reviewed-by: Keith Short <keithshort@chromium.org>
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There is an option in the task_set_event function which force
the calling task to wait for an event. However, the option is never
used thus remove it.
This also will help in the Zephyr migration process.
BUG=b:172360521
BRANCH=none
TEST=make buildall
Signed-off-by: Dawid Niedzwiecki <dn@semihalf.com>
Change-Id: Ic152fd3d6862d487bcc0024c48d136556c0b81bc
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2521599
Reviewed-by: Jett Rink <jettrink@chromium.org>
Reviewed-by: Tom Hughes <tomhughes@chromium.org>
Reviewed-by: Jack Rosenthal <jrosenth@chromium.org>
Commit-Queue: Jack Rosenthal <jrosenth@chromium.org>
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Sync with schematics of sasuke
BUG=b:172869638
BRANCH=None
TEST=make BOARD=sasuke
Signed-off-by: YongBeum.Ha <ybha@samsung.corp-partner.google.com>
Change-Id: Ib19431e2f4dd6b9da1e5f2e06a44883496bead54
Signed-off-by: YongBeum.Ha <ybha@samsung.corp-partner.google.com>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2569070
Reviewed-by: Diana Z <dzigterman@chromium.org>
Reviewed-by: Raymond Chung <raymondchung@ami.corp-partner.google.com>
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Create the initial EC image for the sasuke variant by copying the
waddledoo reference board EC files into a new directory named for
the variant.
(Auto-Generated by create_initial_ec_image.sh version 1.3.0).
BUG=b:172104731
BRANCH=None
TEST=make BOARD=sasuke
Signed-off-by: Raymond Chung <raymondchung@ami.corp-partner.google.com>
Change-Id: I0bf2096e91a17d2b9b842128665b454ab1d77f35
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2562913
Reviewed-by: Henry Sun <henrysun@google.com>
Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
Commit-Queue: Henry Sun <henrysun@google.com>
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