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* Trogdor: Apply internal PU to the interrupt of PI3USB9201Wai-Hong Tam2020-11-071-1/+5
| | | | | | | | | | | | | | | | | The BC1.2 chip PI3USB9281 some Trogdor old revisions used has push-pull output on the interrupt pin. But the PI3USB9201 some latest revisions used has open-drain output. These lines don't have external PU. So apply EC internal PU. BRANCH=Trogdor BUG=b:172674040 TEST=Plugged a C-to-A adapter to a CDP port, the BC1.2 interrupted and detected the 1.5A source. Change-Id: I15e27221bff1ce35fc35b03ac38340b5dfb1055d Signed-off-by: Wai-Hong Tam <waihong@google.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2523298 Reviewed-by: Stephen Boyd <swboyd@chromium.org>
* Trogdor: Apply PD to sensors' interrupts before entering hibernateWai-Hong Tam2020-11-021-0/+9
| | | | | | | | | | | | | | | | Sensors are unpowered in hibernate. Apply PD to the interrupt lines such that they don't float. Don't need to remove the PD as they will be restored to the gpio.inc configs before the interrupts are enabled. BRANCH=None BUG=b:169595541 TEST=Triggered EC hibernate, woke up, and verified sensors working. Change-Id: I18819700d454fbbc16b28f65dad9533d97aa7d4c Signed-off-by: Wai-Hong Tam <waihong@google.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2511805 Reviewed-by: Alexandru M Stan <amstan@chromium.org> Reviewed-by: Stephen Boyd <swboyd@chromium.org>
* Trogdor: Configure OE_L and SEL of DP muxes to prevent leakageWai-Hong Tam2020-10-311-2/+2
| | | | | | | | | | | | | | | | | | | | | The OE_L has external pull-up. It is actually an open-drain output. Configuring it to push-pull has leakage through the pull-up to an unpowered rail during EC hibernate. Also configure SEL to output low if OE_L is deasserted. The SEL has no meaning if the muxes are disabled. When EC hibernate, the muxing ICs are unpowered. Outputing low prevents leakage through the muxing ICs. BRANCH=None BUG=b:169595541 TEST=Plugged a HDMI monitor to port-0 and port-1; checked the DP mux settings correctly. Change-Id: Icf0e81172626c09bc556756f1bcdddb83f45ac68 Signed-off-by: Wai-Hong Tam <waihong@google.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2508864 Reviewed-by: Stephen Boyd <swboyd@chromium.org>
* Trogdor: Define the NC strap and output it lowWai-Hong Tam2020-10-311-0/+3
| | | | | | | | | | | | | Define the NC strap and output it low for power saving. BRANCH=None BUG=b:169595541 TEST=Built the images and booted fine. Change-Id: Ic2f1a098218403c3bff534b921b385ba893a83cf Signed-off-by: Wai-Hong Tam <waihong@google.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2508863 Reviewed-by: Stephen Boyd <swboyd@chromium.org>
* Trogdor: Do not activate g-sensors in S5Wai-Hong Tam2020-10-231-2/+2
| | | | | | | | | | | | | | | | | The g-sensors are not necessary to be active in S5; no gesture recognition in Trogdor designs. Do not activate it in S5. Though without this change, EC doesn't read the g-sensors as there is no config (zero odr) for S5. BRANCH=None BUG=b:170288119 TEST=Still read the g-sensors on S0 and S3. Change-Id: I54e8012e2674e13273e5fe9b96e9e9e6086e6490 Signed-off-by: Wai-Hong Tam <waihong@google.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2492529 Reviewed-by: Stephen Boyd <swboyd@chromium.org>
* Trogdor: Deprecate PMIC_FAULT_L signalWai-Hong Tam2020-10-221-1/+1
| | | | | | | | | | | | | | This signal is no longer connected to PMIC on recent hardware revisions. It is unused. Deprecate it. BRANCH=None BUG=b:171245607 TEST=Built the affected Trogdor images. Change-Id: I75562f1aa9e411df38afd321ab63b51e91e7d4f7 Signed-off-by: Wai-Hong Tam <waihong@google.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2488660 Reviewed-by: Alexandru M Stan <amstan@chromium.org>
* Trogdor: Remove GPIO 1.8V flagsWai-Hong Tam2020-10-201-6/+6
| | | | | | | | | | | | | | | | | | | | | | | The supply of the following GPIOs are VSPI/VHIF which is 1.8V. Their voltage levels are not configurable. The 1.8V flag is unnecessary. * PS_HOLD * PMIC_FAULT_L * AP_SUSPEND * ACCEL_GYRO_INT_L The following GPIOs are on 3.3V supply and not configurable. The 1.8V flag doesn't work. As they are used as open-drain, should be fine. * PM845_RESIN_L * PMIC_KPD_PWR_ODL BRANCH=None BUG=b:169595541 TEST=Tested the power-on and power-off sequence. Change-Id: I309c1a925b78e1140967cf3702e4ec3bba2a4583 Signed-off-by: Wai-Hong Tam <waihong@google.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2485910 Reviewed-by: Alexandru M Stan <amstan@chromium.org>
* Trogdor: Enable pull-down on SHI signalsWai-Hong Tam2020-10-201-0/+9
| | | | | | | | | | | | | | | Enable pull-down to avoid these signals floating. It is believed that it can get better power number in S5/G3. BRANCH=None BUG=b:169595541 TEST=Host commands between EC and AP work as expected. Check the GPIOs are low when AP is off. Change-Id: I1bcf882bf8f29b06a129700faebee8552085f0ef Signed-off-by: Wai-Hong Tam <waihong@google.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2469505 Reviewed-by: Alexandru M Stan <amstan@chromium.org>
* Trogdor: Enable PPC power sink path before hibernate on old boardsWai-Hong Tam2020-10-081-0/+13
| | | | | | | | | | | | | | | | | | | | | | The old boards don't have the hardware fix b/169797080. They need the workaround to make ACOK functional to wake EC up from hibernate. EC enables the PPC power sink path before EC enters hibernate, such that the ACOK won't be blocked by PPC. Otherwise, the PPC keeps the sink path disconnected; ACOK won't go High and can't wake EC up. Do it in board_hibernate() instead of board_hibernate_late(), which has I2C disabled. BRANCH=None BUG=b:170324206 TEST=Tested on Lazor, without the hardware rework. Triggered EC into hibernate; plugging AC can wake EC up. Change-Id: I3a97f59a344aff88b12fb19e2ea3ae126d1a8715 Signed-off-by: Wai-Hong Tam <waihong@google.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2461939 Reviewed-by: Stephen Boyd <swboyd@chromium.org>
* Trogdor: Assert a GPIO to turn off rails before enter hibernateWai-Hong Tam2020-10-081-0/+1
| | | | | | | | | | | | | | | | We disabled the PSL mode hibernate. We uses another GPIO to control switches, which were originally controlled by PSL_OUT. Add this GPIO, named HIBERNATE_L, such that the non-PSL mode hibernate can retrofit the original design. BRANCH=None BUG=b:169797080 TEST=Triggered EC hibernate and checked the HIBERNATE_L GPIO asserted. Change-Id: I69c0d0296f701f3027adfd4d27fa51bdae0844a5 Signed-off-by: Wai-Hong Tam <waihong@google.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2446662 Reviewed-by: Alexandru M Stan <amstan@chromium.org>
* Trogdor: Disable PSL mode hibernateWai-Hong Tam2020-10-081-15/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The RTC stops counting under PSL mode. The Trogdor design relies on EC to give the RTC counter. Disable the PSL mode hibernate and use the traditional non-PSL mode way, i.e. power down all RAM blocks except the last one. BRANCH=None BUG=b:169595541 TEST=Tested on Lazor; triggered hibernate, and waked it up using: * power button press * lid open * servo toggling EC_RST_ODL * AC plug (doesn't work, need to investigate why) TEST=Verified RTC still counting in hibernate: 2020-10-07 14:35:53 [244.922648 power state 9 = S5->G3, in 0x0005] 2020-10-07 14:35:53 RTC: 0x5f7e34b9 (1602106553.00 s) 2020-10-07 14:35:53 [244.923417 power state 0 = G3, in 0x0005] 2020-10-07 14:35:53 [244.926855 SDC Safe] 2020-10-07 14:35:53 [244.927138 Hibernate due to G3 idle] 2020-10-07 14:36:20 2020-10-07 14:36:20 2020-10-07 14:36:20 --- UART initialized after reboot --- 2020-10-07 14:36:20 [Image: RO, lazor_v2.0.5690-d95436fd6 ...] 2020-10-07 14:36:20 [Reset cause: hibernate wake-pin] 2020-10-07 14:36:20 ... 2020-10-07 14:36:23 > rtc 2020-10-07 14:36:25 RTC: 0x5f7e34d9 (1602106585.00 s) First RTC diff from the wall clock: 6553-53 = 6500 Second RTC diff from the wall clock: 6585-(60+25) = 6500 TEST=Verified RTC wake up from hibernate: 2020-10-07 14:59:25 > hibernate 10 2020-10-07 14:59:27 Hibernating for 10.000000 s 2020-10-07 14:59:37 2020-10-07 14:59:37 2020-10-07 14:59:37 --- UART initialized after reboot --- Change-Id: I23f6a65115d5722cf183948fad81dc16d3a6af47 Signed-off-by: Wai-Hong Tam <waihong@google.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2447049 Reviewed-by: Alexandru M Stan <amstan@chromium.org>
* Trogdor: Mask proper Search key location on the board levelWai-Hong Tam2020-09-262-0/+22
| | | | | | | | | | | | | | | | | | | | Don't use the default key mask, which enables both the old location (KSO_01/KSI_00) and the new location (KSO_00/KSI_03) for the Search key. It makes EC over-doing ghost detection. Define the key mask on the board level: * Trogdor/Lazor uses the old location * Pompom uses the new location * Coachz has no keyboard BRANCH=None BUG=b:169361784 TEST=Tested on Lazor, enabled "ksstate on" in EC console, pressed Grave + Tab + Left-Ctrl and saw these keys detected. Change-Id: I0cf37921901a4f997edbef3ac6a89e4351e742d7 Signed-off-by: Wai-Hong Tam <waihong@google.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2432449 Reviewed-by: Douglas Anderson <dianders@chromium.org>
* Trogdor: Move the I2C config to the board levelWai-Hong Tam2020-09-171-0/+16
| | | | | | | | | | | | | | | | | Move the I2C config to the board level such that they can have different configs. Also add the extra I2C bus for WLC on Coachz. The device on this I2C bus supports fast-mode plus, 1Mbit/s. BRANCH=None BUG=b:167884598 TEST=Built all Trogdor variants. Change-Id: Ibcb0e110e1b2c67f8ba843c2dc08efabeb5fe9ba Signed-off-by: Wai-Hong Tam <waihong@google.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2412821 Reviewed-by: Stephen Boyd <swboyd@chromium.org>
* Coachz: Remove the keyboard backlight supportWai-Hong Tam2020-09-171-0/+3
| | | | | | | | | | | | | | | | Coachz doesn't has an internal keyboard. Move the CONFIG from baseboard to board, as the keyboard backlight is not a common feature. BRANCH=None BUG=b:167884598 TEST=Built the Coachz image. Change-Id: Idd5937da9ad6a3ab1be277e537bbd2e70e2b1d9a Signed-off-by: Wai-Hong Tam <waihong@google.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2410855 Reviewed-by: Stephen Boyd <swboyd@chromium.org>
* Trogdor: Remove the references to BC1.2 VBUS detection GPIOWai-Hong Tam2020-09-161-4/+0
| | | | | | | | | | | | | | | We switched to use the TCPC to detect the VBUS, instead of the BC1.2, from CL:2086092. But the BC1.2 VBUS detection GPIOs are still used. Remove these references. BRANCH=None BUG=b:150682632, b:167884598 TEST=Built the affected Trogdor boards. Change-Id: I66d59b16cd93b1dbf460a56a9bc97268d571f6d1 Signed-off-by: Wai-Hong Tam <waihong@google.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2410851 Reviewed-by: Stephen Boyd <swboyd@chromium.org>
* Trogdor: Move GPIO aliases from baseboard to boardWai-Hong Tam2020-09-161-0/+4
| | | | | | | | | | | | | | Move some GPIO aliases from baseboard to board such that they can be customized to use different names. BRANCH=None BUG=b:167884598 TEST=Built the affect Trogdor boards. Change-Id: Id8d68d9b03d43010a81565f7625b8033aab14594 Signed-off-by: Wai-Hong Tam <waihong@google.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2410850 Reviewed-by: Stephen Boyd <swboyd@chromium.org>
* pompom: Remove TCPC port1 configurationAlvinCC_Hsu2020-09-041-0/+1
| | | | | | | | | | | | | | | | This patch removes configurations (I2C, GPIO, TASK and Interrupt...) about TCPC port1 for pompom. BUG=b:167476139 BRANCH=none TEST=power on after flashing FW and it works normal. Signed-off-by: AlvinCC_Hsu <alvincc_hsu@compal.corp-partner.google.com> Change-Id: I1275c1ef7e7d3e65d695dace834a9bcbb4e66dcc Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2391022 Reviewed-by: Wai-Hong Tam <waihong@google.com> Commit-Queue: Wai-Hong Tam <waihong@google.com> Tested-by: Wai-Hong Tam <waihong@google.com>
* sc7180: Decouple the switchcap control from the power sequenceWai-Hong Tam2020-09-022-0/+19
| | | | | | | | | | | | | | | | | Currently, SC7180 power sequence is tightly coupled with a single switchcap part, i.e. DA9313. Should decouple the switchcap control from the power sequence, such that more different switchcap parts can be supported. BRANCH=None BUG=b:163867792 TEST=Built the affect images and booted into kernel. Change-Id: I7f63cd22bbc308672c40a734be4f6dfc80e07158 Signed-off-by: Wai-Hong Tam <waihong@google.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2386480 Reviewed-by: Stephen Boyd <swboyd@chromium.org> Reviewed-by: Philip Chen <philipchen@chromium.org>
* sc7180: Monitor AP_RST_L from PMIC to notify HOOK_CHIPSET_RESETWai-Hong Tam2020-08-081-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | The HOOK_CHIPSET_RESET should be notified when the AP resets. In x86 platforms, EC monitors the LPC LRESET pin. This LRESET pin is asserted when the chipset resets. However, ARM platforms don't use LPC. We need another way to monitor AP reset. This CL modifies the SC7180 power sequence, to monitor the AP_RST_L signal from PMIC. PMIC uses the AP_RST_L to notify AP reset. A complete warm reset sequence will toggle the AP_RST_L signal 3 times. EC monitors the AP_RST_L signal and wait it transition 3 times to notify the HOOK_CHIPSET_RESET. In case, the AP_RST_L is not toggled 3 times, still notifies the hook but prints a warning message. BRANCH=None BUG=b:163078082 TEST=Checked the HOOK_CHIPSET_RESET is notified after AP warm reset. Change-Id: I4e7b0f0d266e01526deaf54afcdfd2ac1037b8f6 Signed-off-by: Wai-Hong Tam <waihong@google.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2343753 Reviewed-by: Stephen Boyd <swboyd@chromium.org>
* trogdor: Increase stack sizesWai-Hong Tam2020-07-311-12/+12
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Some tasks don't have enough stacks and may result stack overflow. Increase the stack sizes. Use the stack analyzer to check the deepest call flow. The annotations are WIP (still has a lot missing). The result is used as reference only. The PD and KEYSCAN tasks are assigned more than the analyer result. Their sizes come from other boards' values. BRANCH=None BUG=b:162039557 TEST=Checked lazor RW, using "make analyzestack": Task: HOOKS, Max size: 948 (724 + 224), Allocated size: 1056 Task: USB_CHG_P0, Max size: 756 (532 + 224), Allocated size: 800 Task: USB_CHG_P1, Max size: 756 (532 + 224), Allocated size: 800 Task: CHIPSET, Max size: 940 (716 + 224), Allocated size: 1056 Task: CHARGER, Max size: 948 (724 + 224), Allocated size: 1056 Task: MOTIONSENSE, Max size: 812 (588 + 224), Allocated size: 928 Task: HOSTCMD, Max size: 980 (756 + 224), Allocated size: 1056 Task: CONSOLE, Max size: 972 (748 + 224), Allocated size: 1056 Task: KEYSCAN, Max size: 588 (364 + 224), Allocated size: 928 Task: PD_C0, Max size: 844 (620 + 224), Allocated size: 1056 Task: PD_C1, Max size: 844 (620 + 224), Allocated size: 1056 Task: PD_INT_C0, Max size: 1020 (796 + 224), Allocated size: 1056 Task: PD_INT_C1, Max size: 1020 (796 + 224), Allocated size: 1056 Change-Id: I6d95f27db7ce1c50ba9bf9c262e7c7e2d352a940 Signed-off-by: Wai-Hong Tam <waihong@google.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2318374 Reviewed-by: Douglas Anderson <dianders@chromium.org> Commit-Queue: Douglas Anderson <dianders@chromium.org>
* sc7180: Enable the load switch during AP power-onWai-Hong Tam2020-07-301-0/+1
| | | | | | | | | | | | | | | | | | | | The QSIP_ON GPIO controls the load switch enable. The load switch is redundant and used for experiments. But leaving it off consumes power. Should enable it during AP power-on and disable it during AP power-off, such that it doesn't waste power. Add the QSIP_ON GPIO to the trogdor board. It was added since rev-1 (rev-0 is NC). BRANCH=None BUG=b:159999589 TEST=Checked AP power-on and power-off. Change-Id: Ia1ef6a0c2285b5adcc53b717f7f310b15eb1d941 Signed-off-by: Wai-Hong Tam <waihong@google.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2327632 Reviewed-by: Matthias Kaehlcke <mka@chromium.org> Reviewed-by: Jim Guerin <jguerin@google.com>
* trogdor: Increase HOSTCMD task stack sizeDouglas Anderson2020-07-271-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Running "taskinfo" on a lazor device (in this case, right after running chrome://system) shows that we're very close to the edge. Presumably we actually go over the edge in some situations since we've seen cases where going to chrome://system gets a stack overflow crash reported against the HOSTCMD task. After this change, taskinfo (after running chrome://system) looks like: > taskinfo Task Ready Name Events Time (s) StkUsed 0 R << idle >> 00000001 141.717533 112/672 1 HOOKS 00000000 0.402382 656/800 2 USB_CHG_P0 00000000 0.006707 448/672 3 USB_CHG_P1 00000000 0.000214 440/672 4 CHIPSET 00000000 0.002645 536/800 5 CHARGER 00000000 0.853712 560/800 6 R MOTIONSENSE 00000002 1.677563 696/928 7 R HOSTCMD 00000001 1.379692 792/928 8 R CONSOLE 00000000 0.172554 384/800 9 KEYSCAN 00000000 1.970870 308/672 10 PD_C0 00000000 3.960594 584/800 11 PD_C1 00000000 0.056556 584/800 12 PD_INT_C0 00000000 0.026221 544/672 13 PD_INT_C1 00000000 0.006403 480/672 BRANCH=None BUG=b:162039557 TEST=taskinfo looks good now Signed-off-by: Douglas Anderson <dianders@chromium.org> Change-Id: I5c2ff959e37b26f2dcda64536a8d3ecb1dd247e5 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2318635 Reviewed-by: Wai-Hong Tam <waihong@google.com> Reviewed-by: Philip Chen <philipchen@chromium.org>
* power: Use a general name for PMIC_RESIN_L signal on sc7180 and sdm845Wai-Hong Tam2020-07-201-1/+1
| | | | | | | | | | | | | Don't bound to the PMIC part name. BRANCH=None BUG=b:148113568 TEST=Built the affected images. Change-Id: I3c2e8851294b957aa133c6a8528de3960a3e468c Signed-off-by: Wai-Hong Tam <waihong@google.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2303815 Reviewed-by: Stephen Boyd <swboyd@chromium.org>
* Trogdor: Initialize the backlight PWMs to be disabledWai-Hong Tam2020-07-101-5/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | There are 2 PWMs for the backlight: display and keyboard. The keyboard background is controlled by the keyboard_backlight.c. The board file doesn't need to define its behavior. So move it from the board.c. The display backlight should be initialized to 0% duty cycle and set to disabled at the beginning. AP will override the value later. When resume from suspend, keep it disabled if the duty cycle is 0%. BRANCH=None BUG=b:157489286 TEST=When EC reboot, the display backlight (channel:1) is disabled. > pwm PWM channels: 0: disabled 1: disabled When booting into the userspace, the display backlight is set to 34%. > pwm PWM channels: 0: disabled 1: 34% Manually set the brightness to 0%. > pwm PWM channels: 0: disabled 1: disabled Change-Id: I07207969b1541326e77167eadc04899554d858dd Signed-off-by: Wai-Hong Tam <waihong@google.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2290830 Reviewed-by: Douglas Anderson <dianders@chromium.org>
* Swap system_jumped_to_this_image with system_jumped_latestabilize-quickfix-13310.91.B-masterstabilize-quickfix-13310.76.B-masterstabilize-quickfix-13310.73.B-masterstabilize-13310.99.B-masterstabilize-13310.94.B-masterstabilize-13310.83.B-masterstabilize-13310.74.B-masterstabilize-13310.72.B-masterrelease-R85-13310.B-masterDaisuke Nojiri2020-06-261-1/+1
| | | | | | | | | | | | | | | | | | | | EFS2 boards need to call system_jumped_late in HOOK_INIT to avoid running init code twice per boot. system_jumped_to_this_image and system_jumped_late are functionally equivalent for non EFS2 boards. This patch will prevent system_jumped_to_this_image from being used for EFS2 boards when code is copied from a past project. BUG=chromium:1072743 BRANCH=none TEST=buildall Signed-off-by: Daisuke Nojiri <dnojiri@chromium.org> Change-Id: I73fb5cedc5325d1c80825f9346954013046ee1df Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2267685 Reviewed-by: Keith Short <keithshort@chromium.org>
* Trogdor: Fix the sensor locationsWai-Hong Tam2020-06-121-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | The sensor locations were configured wrong. Fix them. BRANCH=None BUG=b:158611991 TEST=Checked the sensor locations. localhost ~ #␛grep -Fow cros-ec-accel /sys/bus/iio/devices/iio\:dev /sys/bus/iio/devices/iio:device0/name:cros-ec-accel /sys/bus/iio/devices/iio:device2/name:cros-ec-accel localhost ~ # cat /sys/bus/iio/devices/iio\:device0/location lid localhost ~ # cat /sys/bus/iio/devices/iio\:device2/location base localhost ~ # grep -Fow cros-ec-gyro /sys/bus/iio/devices/iio\:devi /sys/bus/iio/devices/iio:device4/name:cros-ec-gyro localhost ~ # cat /sys/bus/iio/devices/iio\:device4/location base Change-Id: I120b39e492364f338d5a899cb1d2398884c7d19d Signed-off-by: Wai-Hong Tam <waihong@google.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2242528 Reviewed-by: Philip Chen <philipchen@chromium.org>
* Trogdor: Enable extended GPIO command for debuggingWai-Hong Tam2020-06-111-0/+1
| | | | | | | | | | | | | | | The extended GPIO command is useful for debugging. It can modify the GPIO flags, like changing an input to an output. Enable it as a bringup feature. BRANCH=None BUG=None TEST=Used "gpioset" command to change a GPIO from an input to an output. Change-Id: I2b7b1947d0853d7e23378647d152a33b650b551d Signed-off-by: Wai-Hong Tam <waihong@google.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2220832 Reviewed-by: Stephen Boyd <swboyd@chromium.org>
* Trogdor: Fix the current limitation of USB Type-A portWai-Hong Tam2020-05-211-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | The ILIM pin of the load switch is through a MOFET to EC GPIO. When EC outputs this GPIO High, it closes the MOFET and applies impedance (28.7K || 41.2K) to the ILIM pin. The load switch limits the CDP current: 1413-1626 mA. When EC outputs this GPIO Low, it opens the MOFET and applies impedance (28.7K) to the ILIM pin. The load switch limits the SDP current: 825-989 mA. The original GPIO default to Low was wrong that actually limits the SDP current. Should make it default to High, to limit the CDP current. BRANCH=None BUG=b:156965411 TEST=Applied a load to the USB Type-A port and checked it can source ~5V @ 1.5A. Change-Id: I1d8d52d1a82b5f837bc1a2de544425c8f2aff759 Signed-off-by: Wai-Hong Tam <waihong@google.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2211958 Reviewed-by: Stephen Boyd <swboyd@chromium.org> Reviewed-by: Alexandru M Stan <amstan@chromium.org>
* PD: Remove unnecessary PDCMD taskDiana Z2020-05-201-1/+0
| | | | | | | | | | | | | | | | | | | The PDCMD task is only pulling interrupts from the TCPCs on most boards, which is unnecessary since the PD_INT tasks handle this job now. Remove it from any boards using the PD_INT command which are not using the older CONFIG_HOSTCMD_PD functionality (ex. samus, oak). Located boards using: find -name "ec.tasklist" | xargs grep -l PD_INT | xargs grep PDCMD BRANCH=None BUG=b:154959596 TEST=make -j buildall Signed-off-by: Diana Z <dzigterman@chromium.org> Change-Id: I29be8ab1d7a2616603fb55236aed4329ed8654f5 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2208221 Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
* Trogdor: Remove triggering AP cold reset over a hostcommandWai-Hong Tam2020-05-161-1/+0
| | | | | | | | | | | | | | | This route hasn't been used. Remove it. That makes the chipset_reset() do the same thing for all requests. BRANCH=None BUG=b:119261783 TEST=Ran the command "ectool apreset" in userspace; returned error: EC result 1 (INVALID_COMMAND) Change-Id: I8cb8b0df508ab0cbcebafed528c2204f6210cbf7 Signed-off-by: Wai-Hong Tam <waihong@google.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2204581 Reviewed-by: Julius Werner <jwerner@chromium.org>
* Trogdor: Enable debug features for USB PDWai-Hong Tam2020-05-161-0/+1
| | | | | | | | | | | | | | | Enable the I2C trace and TCPCI dump, which are useful for debugging USB Type-C related issues. TCPCI dump has no performance impact. It can still be enabled on production. BRANCH=None BUG=b:146075455 TEST=Tried the console commands i2ctrace and tcpci_dump. Change-Id: I2f39c8fb91db2a853eb4b9d5d159d5e137b3b087 Signed-off-by: Wai-Hong Tam <waihong@google.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2204580 Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
* Trogdor: Fix the base g-sensor's matrix configurationWai-Hong Tam2020-04-251-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The g-sensor placement is like: +------------------+ | | | | | | | | | | +------------------+ / +----+ / / / / / / / O/ / O is the pin 1 marker, which faces down. / +----+ / +------------------+ The sensor's coordinate system is: +-----> x /| / | v v y z The standard reference frame is: z y ^ ^ | / |/ +-----> x So the matrix contributing to the standard reference frame should be: { { 1, 0, 0}, { 0, -1, 0}, { 0, 0, -1} } Lazor and Trogdor use the same sensor placement. BRANCH=None BUG=b:154782446 TEST=Used 'accelinfo on' command to check the g-sensor's values. Change-Id: I2039db3ad98af314c8d27a738153520c0b542906 Signed-off-by: Wai-Hong Tam <waihong@google.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2166486 Reviewed-by: Alexandru M Stan <amstan@chromium.org> Reviewed-by: Philip Chen <philipchen@chromium.org> Commit-Queue: Alexandru M Stan <amstan@chromium.org>
* driver: Replace BMI160 to BMI in board configChing-Kang Yen2020-04-231-6/+6
| | | | | | | | | | | | | | | | | Replace some macro of BMI160 to BMI version for common function of BMI series. Make board config include the accelgyro_bmi_common.h instead of accel_gyro_bmi160.h. BRANCH=None BUG=b:146144827 TEST=make buildall -j Change-Id: I043ff8a92f15295ead3fa5c1e292319e2b4fa21a Signed-off-by: Ching-Kang Yen <chingkang@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2156525 Reviewed-by: Gwendal Grignou <gwendal@chromium.org>
* Trogdor: Create Trogdor baseboardWai-Hong Tam2020-03-304-512/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | Move the common stuff to from board to baseboard to reduce the effort of forking and maintaining derivatives. This CL is intended to simply moving things around, not to address other needs, like supporting a different EC. Leave the following stuff in board: * Features for debugging * GPIO and interrupt handlers (likely will be changed) * BC 1.2 (already changed from Trogdor rev-0 and rev-1) * TCPC/MUX/PPC (will be changed) * Sensors (clamshell vs convertible) * ADC (detachable vs convertible) * LED/PWM * Battery Others are moved to baseboard. BRANCH=None BUG=b:146237680 TEST=Build Trogdor and it boots. Should be good as there is no logic change. Change-Id: I2e4cd76d18f8739b5b7d5b1dae67c13e038b4480 Signed-off-by: Wai-Hong Tam <waihong@google.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2099390
* cleanup: drop the _TYPEC part of USB device configJett Rink2020-03-261-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | The three USB device configurations describe more than just the Type-C layer, so remove the _TYPEC part within the define. This is also in preparation to change how the usbc build.mk includes files. This was performed with the following commands: $ git grep --name-only CONFIG_USB_TYPEC_DRP_ACC_TRYSRC | xargs perl -i -ple 's/CONFIG_USB_TYPEC_DRP_ACC_TRYSRC/CONFIG_USB_DRP_ACC_TRYSRC/g' $ git grep --name-only CONFIG_USB_TYPEC_CTVPD | xargs perl -i -ple 's/CONFIG_USB_TYPEC_CTVPD/CONFIG_USB_CTVPD/g' $ git grep --name-only CONFIG_USB_TYPEC_VPD | xargs perl -i -ple 's/CONFIG_USB_TYPEC_VPD/CONFIG_USB_VPD/g' BRANCH=none BUG=none TEST=builds Signed-off-by: Jett Rink <jettrink@chromium.org> Change-Id: I4deab784b7c3479cffd3dee7fb3ea3c8a9d6081c Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2121193 Reviewed-by: Denis Brockus <dbrockus@chromium.org> Commit-Queue: Denis Brockus <dbrockus@chromium.org>
* Trogdor: Switch BC1.2 driver to PI3USB9201 on rev-1Wai-Hong Tam2020-03-104-1/+47
| | | | | | | | | | | | | | | | | | | | | | | | | | This is for hardware rev-1, which changes the BC1.2 part from PI3USB9281 to PI3USB9201. This is an incompatible change from hardware rev-0. Use EXTRA_CLFAGS option of make to define the hardware rev. People can build the rev-0 image like: $ make BOARD=trogdor clean $ make BOARD=trogdor EXTRA_CFLAGS=-DBOARD_REV=0 -j Or build the rev-1 image like: $ make BOARD=trogdor clean $ make BOARD=trogdor EXTRA_CFLAGS=-DBOARD_REV=1 -j BRANCH=None BUG=b:150682632 TEST=Build the rev-0 image, worked on rev-0 hardware. TEST=The previous patchset was verified on rev-1 hardware. Change-Id: Id43219b154b1dff6bfa1ad46c5a47136f034ffee Signed-off-by: Wai-Hong Tam <waihong@google.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2086392 Reviewed-by: Alexandru M Stan <amstan@chromium.org> Reviewed-by: Stephen Boyd <swboyd@chromium.org>
* Trogdor: Use TCPC to detect VBUSWai-Hong Tam2020-03-103-19/+3
| | | | | | | | | | | | | | | | In hardware rev-1, the BC1.2 part is changed and doesn't has the VBUS detection capability. Should use the TCPC to detect VBUS. This change also works on hardware rev-0. BRANCH=None BUG=b:150682632 TEST=Tested on hardware rev-0. Checked sinking power from 20V properly. Change-Id: I15779c50e8e5cd9e67a45b4d90cb227c1b59c1f9 Signed-off-by: Wai-Hong Tam <waihong@google.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2086092 Reviewed-by: Philip Chen <philipchen@chromium.org> Reviewed-by: Stephen Boyd <swboyd@chromium.org>
* Trogdor: Enable TCPMv2 stackWai-Hong Tam2020-03-101-1/+11
| | | | | | | | | | | | | | | | | | | | | | Verified the USB Type-C/PD functions. Check the below TEST= tag. BRANCH=None BUG=b:146075455 TEST=Verified the following functions, both ports, both plug directions: * Sinking power from 5V charger * Sinking power from 20V charger * Sourcing power to USB dongle * USB SS device detection * DisplayPort device detection * CCD detection * Power role swap * Data role swap Change-Id: Id5c2d1e8e16b6de9a6f81ecdb864c138838f8262 Signed-off-by: Wai-Hong Tam <waihong@google.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2050705 Reviewed-by: Stephen Boyd <swboyd@chromium.org> Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
* Revert "Ampton: Set the PS8751 to source mode before enter low power mode"Matthew Blecker2020-03-071-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This reverts commit 4ca73139635261ee1273fbe1767dcf06886d2208. Reason for revert: Breaks CCD with AP off https://issuetracker.google.com/150822168 Will work on a solution to address the original CL need, i.e. applying Rp in LPM. Follow the above bug. Some merge conflict happens. Resolved. Also change the usb_mux driver of Trogdor, as ps8xxx_usb_mux_driver is removed. Original change's description: > Ampton: Set the PS8751 to source mode before enter low power mode > > BUG=b:113830171 > BRANCH=octopus > TEST=check the power consumption is lower > > Change-Id: I527cdc5d1e4dd5de137ab0927e66c171696758ce > Signed-off-by: James_Chao <james_chao@asus.corp-partner.google.com> > Reviewed-on: https://chromium-review.googlesource.com/1426306 > Commit-Ready: James Chao <james_chao@asus.corp-partner.google.com> > Tested-by: James Chao <james_chao@asus.corp-partner.google.com> > Reviewed-by: Jett Rink <jettrink@chromium.org> BRANCH=None BUG=b:113830171,150822168 TEST=Build Trogdor, verified CCD with AP off working. Change-Id: I58c26e8466b70e035a1c396cfcba6a46da4bccc9 Signed-off-by: Wai-Hong Tam <waihong@google.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2091519 Reviewed-by: Aseda Aboagye <aaboagye@chromium.org> Reviewed-by: Jett Rink <jettrink@chromium.org> Reviewed-by: Matthew Blecker <matthewb@chromium.org>
* usb_mux: retimer: mux as chained mux and retimerDenis Brockus2020-02-282-13/+7
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This makes retimers appear as generic muxes. By allowing a chain of muxes they can be stacked up to the new configurations that zork requires and will continue to work as they did before on configurations that only have a single mux. The code used to have two different arrays, 1) muxes and 2) retimers. On one of the zork configurations the processor MUX stopped being the primary mux and the retimer took its place. In a different configuration of that same platform it left the primary and secondary alone but the mux_set FLIP operation had to be ignored. Since the same interfaces needed to be available for both it stopped making sense to have two different structures and two different methods of handling them. This consolodates the two into one. The platforms that do not have retimers, this change will not make any difference. For platforms like zork, it will remove the retimers and make them chained muxes. So testing on trembyle makes sense to verify, BUG=b:147593660 BRANCH=none TEST=verify USB still works on trembyle Change-Id: I286cf1e302f9bd3dd7e81098ec08514a2a009fe3 Signed-off-by: Denis Brockus <dbrockus@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2066794 Commit-Queue: Jett Rink <jettrink@chromium.org> Reviewed-by: Edward Hill <ecgh@chromium.org> Reviewed-by: Jett Rink <jettrink@chromium.org>
* TCPMV1/2: Make the PD Config Flags more consistentSam Hurst2020-02-221-0/+1
| | | | | | | | | | | | | | | | | | | | The current use of the PD Config Flags are a bit confusing and has been changed to the following: The CONFIG_USB_POWER_DELIVERY flag is used to enable and disable the TCPMv1 and TCPMv2 stacks. And when CONFIG_USB_POWER_DELIVERY is enabled, one of the following must be enabled: CONFIG_USB_PD_TCPMV1 - legacy power delivery state machine CONFIG_USB_PD_TCPMV2 - current power delivery state machine BUG=b:149993808 BRANCH=none TEST=make -j buildall Change-Id: Ie3f8615a75b15b4f1c703f57f3db9e152a471238 Signed-off-by: Sam Hurst <shurst@google.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2068519 Reviewed-by: Diana Z <dzigterman@chromium.org>
* Revert "Trogdor: Measure the rail PP868_S1C_S2C_S3C"Wai-Hong Tam2020-02-203-11/+0
| | | | | | | | | | | | | | | This reverts commit a7caa808133041759366f45b90d4fa8d252a5a62. The ADC logic is removed on the next rev. BRANCH=None BUG=b:146470311 TEST=Built and booted successfully. Change-Id: Ia32d41e17a40d715b15af8f18493a55b19d7c9d4 Signed-off-by: Wai-Hong Tam <waihong@google.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2062763 Reviewed-by: Stephen Boyd <swboyd@chromium.org>
* Charger: Convert boards to use new driver structureDiana Z2020-02-041-0/+12
| | | | | | | | | | | | | | | This commit removes the temporary common charger chip configuration and instead puts the configuration in each board. BRANCH=none BUG=b:147672225 TEST=builds, runs on waddledoo and octopus Change-Id: If81aef31e48c65999a87e202494f286716114bbb Signed-off-by: Diana Z <dzigterman@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2031855 Reviewed-by: Aseda Aboagye <aaboagye@chromium.org> Reviewed-by: Jett Rink <jettrink@chromium.org>
* Trogdor: Print when someone's trying to use AP_RST_REQAlexandru M Stan2020-02-013-1/+6
| | | | | | | | | | | | | | | | | | AP_RST_REQ is deprecated, but it would be nice to know if the AP is trying to misuse this signal. Add it back in as a power signal interrupt. BRANCH=None BUG=b/148238496 TEST=With kernel sandbox 200123-wip-tree: * run "halt" on the AP console * this will assert the AP_RST_REQ signal * you can see EC talk about it: DEPRECATED_AP_RST_REQ => 1 * but cold reboot still doesn't happen Change-Id: I8be10367afa7742642b793dc50e90964eb0b12c1 Signed-off-by: Alexandru M Stan <amstan@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2029203 Reviewed-by: Wai-Hong Tam <waihong@google.com>
* Trogdor: Separate the interrupt handlers of WARM_RESET_L and POWER_GOODWai-Hong Tam2020-02-011-1/+1
| | | | | | | | | | | | | | | | | | | | | The original one interrupt handler for two signals will cause a false-postive for the WARM_RESET_L release case, during a transition state that POWER_GOOD goes low but WARM_RESET_L is still high. Use two interrupt handlers for WARM_RESET_L and its pull-up rail POWER_GOOD. It is clear that what signal triggers the interrupt. BRANCH=None BUG=b:148478178 TEST=Called "dut-control warm_reset:on sleep:0.2 warm_reset:off" and saw the message "Long warm reset ended, cold resetting to restore sanity" once. Change-Id: I5a14f91c0dbfacd6a70d01d45f3e8de2b6c6a1cc Signed-off-by: Wai-Hong Tam <waihong@google.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2031647 Reviewed-by: Alexandru M Stan <amstan@chromium.org> Tested-by: Alexandru M Stan <amstan@chromium.org>
* Trogdor: Rename AP_SUSPEND and add its power signal interruptWai-Hong Tam2020-02-013-1/+7
| | | | | | | | | | | | | | | | | Rename the GPIO from AP_SUSPEND_L to AP_SUSPEND as it is active high. Add its power signal interrupt for easily checking the change. Enable the config of the debug command powerindebug. BRANCH=None BUG=b:146470739, b:148149387 TEST=Checked the AP_SUSPEND power signal status on EC coonsole. Change-Id: I4fb5684abb6a3367f5ebc54624f286d8c564d91c Signed-off-by: Wai-Hong Tam <waihong@google.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2023279 Commit-Queue: Alexandru M Stan <amstan@chromium.org> Tested-by: Alexandru M Stan <amstan@chromium.org> Reviewed-by: Alexandru M Stan <amstan@chromium.org>
* usb_mux: cleanup: Replace mux state enums with ec_command bit flagVijay Hiremath2020-01-281-2/+2
| | | | | | | | | | | BUG=b:145796172 BRANCH=none TEST=make buildall -j Change-Id: Ie4ffaf208745764262931501f0dff77b525a4e59 Signed-off-by: Vijay Hiremath <vijay.p.hiremath@intel.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2017569 Reviewed-by: Jett Rink <jettrink@chromium.org>
* Trogdor: Reenable TCPC low power mode and DRP auto-toggleWai-Hong Tam2020-01-271-6/+2
| | | | | | | | | | | | | | | Using the TCPC fw 0xd or higher, the TCPC low power mode and DRP auto-toggle don't have any issue. So we can reenable them. BRANCH=None BUG=b:145723652 TEST=Checked DUT can sink power, like >5V, and can source power to a USB device. Change-Id: I662d904951fa2144c4ef11aa0c426723e2412133 Signed-off-by: Wai-Hong Tam <waihong@google.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2005795 Reviewed-by: Stephen Boyd <swboyd@chromium.org>
* Trogdor: Deprecate AP_RST_REQ handling logicWai-Hong Tam2020-01-241-1/+1
| | | | | | | | | | | | | | This logic is no longer used. Should be deprecated. BRANCH=None BUG=b:148238496 TEST=Assert the AP_RST_REQ signal, no reboot happens. Change-Id: Icade7ede9a8fb48313123ad59b5a36a8aa1a71bf Signed-off-by: Wai-Hong Tam <waihong@google.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2018056 Reviewed-by: Stephen Boyd <swboyd@chromium.org> Reviewed-by: Alexandru M Stan <amstan@chromium.org>
* Trogdor: Implement board_set_tcpc_power_modeWai-Hong Tam2020-01-232-1/+10
| | | | | | | | | | | | | | | | | | | | | | | | | | | The board_set_tcpc_power_mode() function hasn't been defined. When doing TCPC software sync, AP to ask EC to suspend the TCPC chip, and then resume it when done. Missing the board_set_tcpc_power_mode() function made the TCPC chip can't resume back. BRANCH=None BUG=b:146652805 TEST=Executed the TCPC software sync, verified the TCPC is back, i.e. 2019-12-20 15:33:27 > C0 st1 SUSPENDED 2019-12-20 15:33:30 [286.977749 TCPC p0 suspended!] 2019-12-20 15:34:14 C0 st2 SNK_DISCONNECTED 2019-12-20 15:34:14 [330.333053 Resetting TCPCs...] 2019-12-20 15:34:14 [330.382545 C0 FAULT 0x00 detected] 2019-12-20 15:34:14 [330.383235 C0 FAULT 0x00 handled] 2019-12-20 15:34:14 [330.387583 TCPC p0 resumed!] Without this CL, an error was reported and the TCPC chip still in suspend. 2019-12-20 14:57:52 C0 st2 SNK_DISCONNECTED 2019-12-20 14:57:52 [546.264649 TCPC p0 restart failed!] Change-Id: I6cee0b7a6d24b9b6ab40f5259a659ca234319990 Signed-off-by: Wai-Hong Tam <waihong@google.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1979611 Reviewed-by: Stephen Boyd <swboyd@chromium.org>
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