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* volteer: add USB3 daughterboard supportstabilize-12881.B-masterCaveh Jalali2020-02-041-2/+2
| | | | | | | | | | | | | | | | | The USB3 daughterboard uses a ps8815 TCPC. If the CBI FW_CONFIG tag indicates that such a daughterboard is present, set up the ps8815 as the 2nd TCPC in the system. BRANCH=none BUG=b:144397088 TEST=in combination with additional patches, was able to update TCPC firmware Change-Id: I50ee57f5aa2efa0b6dbc562f968587f4fe03236c Signed-off-by: Caveh Jalali <caveh@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2013656 Reviewed-by: Jett Rink <jettrink@chromium.org> Reviewed-by: Keith Short <keithshort@chromium.org>
* volteer: Enable low power modeKeith Short2020-01-281-1/+0
| | | | | | | | | | | | | | | BUG=b:148229697 BRANCH=none TEST=make buildall TEST=Verify 'dsleep' command is available with changes. Measure PP3300_G rail using servod - observe drop of 20 mW average power consumed after EC enters sleep (no console activity for 15 seconds). Change-Id: I840f34df217a0a6f72ca380a2a5d9b7752674a20 Signed-off-by: Keith Short <keithshort@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2023126 Reviewed-by: Ruben Rodriguez Buchillon <coconutruben@chromium.org> Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org>
* Volteer: move USB product ID to baseboardstabilize-12859.B-masterKeith Short2020-01-241-8/+0
| | | | | | | | | | | | | | | The selected ID has been properly allocated in http://google3/hardware/standards/usb/ BUG=b:140578872 BRANCH=none TEST=make buildall Change-Id: I718050fbf6db2a205cd0d76796ab57e72606b28b Signed-off-by: Keith Short <keithshort@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2018464 Reviewed-by: Abe Levkoy <alevkoy@chromium.org> Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org>
* TBT/USB4: Allow enabling TBT & USB4 per port basedVijay Hiremath2020-01-151-0/+11
| | | | | | | | | | | | | | | | | | | | | | | | When TBT or USB4 mode is enabled, by default all the ports are assumed to be supporting TBT or USB4. However, not all the ports may support TBT & USB4 due to dependency on retimer and platform level Aux/LSx muxing. This board level function can override the TBT & USB4 logic based on board design. Ref: TGL PDG 5.2 USB-C* Sub-System: a. otherboard should have re-timer for all USB-C connectors that supports TBT. b. Aux/LSx platform level muxing is required. BUG=b:147658946 BRANCH=none TEST=Manually tested on Volteer TBT & USB4 mode detection and entry is allowed only on Port-1 Change-Id: I07b339023a4da6bd69382420f3aa11ed82379179 Signed-off-by: Vijay Hiremath <vijay.p.hiremath@intel.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2001221 Reviewed-by: Keith Short <keithshort@chromium.org>
* TBT: Allow limiting the cable speed based on board designVijay Hiremath2020-01-151-0/+15
| | | | | | | | | | | | | | | | | From the TGL PDG, MAX TBT signals routing length can be 205mm prior to connection to re-timer. Orthogonal routing with such length would results in adverse effect to channel margin, as described in Fiberweave White Paper. Hence, added overridable function to override the TBT cable speed based on the board design. BUG=b:147498371 BRANCH=none TEST=Able to detect TBT3 devices on Volteer Change-Id: I4490bc507c2c12b26372ed86e485c0491f1a9f21 Signed-off-by: Vijay Hiremath <vijay.p.hiremath@intel.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1998544 Reviewed-by: Keith Short <keithshort@chromium.org>
* volteer: add keyboard backlight supportKeith Short2020-01-111-0/+1
| | | | | | | | | | | | | | | | Add keyboard backlight for Volteer BUG=b:147020710 BRANCH=none TEST=make buildall TEST=run 'kblight' EC console command to verify keyboard backight TEST=run 'ectool verify pwmsetkblight' to verify keyboard backlight Change-Id: I6b34910b0e06afc8f7c280c622821bc819e6508e Signed-off-by: Keith Short <keithshort@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1992206 Reviewed-by: Abe Levkoy <alevkoy@chromium.org> Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org>
* volteer: enable tablet mode supportKeith Short2020-01-093-0/+3
| | | | | | | | | | | | | | | | Enable the GMR interruprt for entering tablet mode. BUG=b:146081522 BRANCH=none TEST=make buildall TEST=Move magnet near GMR sensor, verify tablet mode is enabled and disabled from the EC console. Change-Id: I43de3ebcf42feb014c369767eefb486f31f1959c Signed-off-by: Keith Short <keithshort@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1992786 Reviewed-by: Abe Levkoy <alevkoy@chromium.org> Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org>
* volteer: Enable daughter-board LEDAbe Levkoy2020-01-081-5/+5
| | | | | | | | | | | | | | PWM the motherboard/daughter-board switch at 50% to drive both LEDs equally. BUG=b:139554899 TEST=ledtest 0 enable <various colors>; observe LEDs BRANCH=none Change-Id: I0fefac4d540351f5083b769b09ede83c87c97a86 Signed-off-by: Abe Levkoy <alevkoy@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1987245 Reviewed-by: Keith Short <keithshort@chromium.org>
* volteer: add motionsense supportKeith Short2020-01-074-1/+8
| | | | | | | | | | | | | | | | | | | | Enable the accelerometer, ALS, and sync sensors for Volteer. The IMU sensor will be enabled in a separate changelist. BUG=b:140557015 BRANCH=none TEST=make buildall TEST=Verify lid accelerometer data matches reference frame. TEST=Using CL:1580449, verify raw values from ALS change in response to changes in ambient light. TEST=VSYNC not yet tested, camera board not yet available. See b:146452722 Change-Id: Ie7b4ecaa543b55030a9223a2cda9fec53a8f4620 Signed-off-by: Keith Short <keithshort@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1965647 Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org> Reviewed-by: Gwendal Grignou <gwendal@chromium.org>
* volteer: add support for volume up/down buttonsKeith Short2019-12-113-1/+5
| | | | | | | | | | | | | | BUG=b:145959769 BRANCH=none TEST=make buildall TEST=press volume up/down buttons. Verify press/release events on EC console, verify volume control shown on ChromeOS login screen. Change-Id: I6f32de10275f2e2d78b508109a4676344215811c Signed-off-by: Keith Short <keithshort@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1960917 Reviewed-by: Vijay P Hiremath <vijay.p.hiremath@intel.com> Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org>
* volteer: update battery parameterScott Chao2019-12-091-5/+5
| | | | | | | | | | | | | Update battery parameter BUG=b:145786003 BRANCH=NONE TEST=make buildall Change-Id: Ie0941cb06d82902a3b32b9165644a62efdb05746 Signed-off-by: Scott Chao <scott_chao@wistron.corp-partner.google.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1955106 Reviewed-by: Keith Short <keithshort@chromium.org>
* volteer: Enable BC1.2 charge rampVijay Hiremath2019-12-072-19/+23
| | | | | | | | | | | | BUG=b:145683021 BRANCH=none TEST=Able to charge ramp BC1.2 devices on both the ports Change-Id: Iccabb3a1cf51c2cf22c6620e560d7ab74415a2cf Signed-off-by: Vijay Hiremath <vijay.p.hiremath@intel.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1951426 Reviewed-by: Keith Short <keithshort@chromium.org> Reviewed-by: Abe Levkoy <alevkoy@chromium.org>
* volteer: Enable Burnisde Bridge retimerVijay Hiremath2019-12-071-0/+7
| | | | | | | | | | | | BUG=b:145560203 BRANCH=none TEST=BB retimer can communicate via I2C Change-Id: Ibc9b61d909ff1d07794e13927796e26aa1e53e03 Signed-off-by: Vijay Hiremath <vijay.p.hiremath@intel.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1947427 Reviewed-by: Keith Short <keithshort@chromium.org> Reviewed-by: Jett Rink <jettrink@chromium.org>
* volteer: Keep RSMRST# pin low at initVijay Hiremath2019-12-061-1/+1
| | | | | | | | | | | | | | Keeping the RSMRST# pin is low at init based on the TGL PDG power sequence Timing Diagram. BUG=b:145767544 BRANCH=none TEST=Verified on scope, RSMRST# pin is low at init Change-Id: Ia5d5c76ce3f173d1c283da706dd1113ce1dad550 Signed-off-by: Vijay Hiremath <vijay.p.hiremath@intel.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1954875 Reviewed-by: Keith Short <keithshort@chromium.org>
* volteer: Enable USB-C Port 1Vijay Hiremath2019-12-043-1/+9
| | | | | | | | | | | BUG=b:140578872 BRANCH=none TEST=Able to boot to OS from Zinger connected on Port 1 Change-Id: I2db9763370ecfae2a38081b6fc607b1ef1d06b67 Signed-off-by: Vijay Hiremath <vijay.p.hiremath@intel.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1947426 Reviewed-by: Keith Short <keithshort@chromium.org>
* volteer: enable thermal managementKeith Short2019-12-041-2/+5
| | | | | | | | | | | | | | | Configure fan for PWM operation. Enable thermal management policies. BUG=b:143768086 BRANCH=none TEST=make buildall TEST=use 'thermalset' to force high and halt temperature conditions, verify AP is alerted and halted Change-Id: I6362ce9d5a0edbd231e3f9464dfccf34d4f1c7a0 Signed-off-by: Keith Short <keithshort@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1946774 Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org>
* volteer: disable CONFIG_BRINGUPKeith Short2019-11-211-6/+0
| | | | | | | | | | | | | | | | Disable CONFIG_BRINGUP option now that the AP power up sequence is working. Also change the default console mask to disable CC_HOSTCMD, which is flooded with motion sense requests (0x60) from the kernel. BUG=b:142409811 BRANCH=none TEST=make buildall TEST=verify Volteer boots to OS automatically. Change-Id: I58f850188ca3981373af06369eb70c5887c7da31 Signed-off-by: Keith Short <keithshort@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1919402 Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org>
* volteer: enable EC controlled fanKeith Short2019-11-211-0/+2
| | | | | | | | | | | | | | | | Enable simple GPIO control of the fan. Still need to add PWM controls once a smart fan is available. BUG=b:140582490 BRANCH=none TEST=make buildall TEST=verify fan turns on when exiting G3 and turns off before entering G3. Change-Id: I3ec5b36fd5c7ca607f03efa9a76f8dc2efacbb22 Signed-off-by: Keith Short <keithshort@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1924503 Reviewed-by: Abe Levkoy <alevkoy@chromium.org>
* volteer: Add USB-C policyVijay Hiremath2019-11-212-0/+12
| | | | | | | | | | | BUG=b:140578872 BRANCH=none TEST=USB2.0 & USB3.0 device detected over Type-C port 0 Change-Id: I44790aac3543589c32dcd60f84e4e67d5d76cdab Signed-off-by: Vijay Hiremath <vijay.p.hiremath@intel.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1922752 Reviewed-by: Keith Short <keithshort@chromium.org>
* volteer: enable eDP backlightKeith Short2019-11-151-0/+7
| | | | | | | | | | | | | | | | This change ensure the eDP backlight control is driven high so that the PCH can turn the backlight on and off. Still need to add controls to the EC to turn the backlight off. BUG=b:144520387 BRANCH=none TEST=make buildall TEST=verify backlight on Volteer Change-Id: Idb075781dc358c5c7a6fe68f828a28407b92c94d Signed-off-by: Keith Short <keithshort@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1918005 Reviewed-by: Abe Levkoy <alevkoy@chromium.org>
* volteer: add BC1.2 for USBC port 0Keith Short2019-11-121-0/+1
| | | | | | | | | | | | | | | | Adds BC1.2 charger detect support for the USB2.0 connection on USBC port 0. BUG=b:140579641 BRANCH=none TEST=make buildall Change-Id: I42cc7ee21475dbbb5165979d0a656ae6eaef31c8 Signed-off-by: Keith Short <keithshort@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1897068 Reviewed-by: Abe Levkoy <alevkoy@chromium.org> Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org> Reviewed-by: Vijay P Hiremath <vijay.p.hiremath@intel.com>
* Volteer: configure USBC port 0Keith Short2019-11-123-1/+15
| | | | | | | | | | | | | | | | | Configure PPC, and TCPC for USBC port 0. Includes battery and charger stubs. USB PD policy is stubbed or TODO. BUG=b:140572591 BRANCH=none TEST=make buildall TEST=connect 45W charger to Volteer, observe that PD negotiates 15V/3A operation. Change-Id: Iec92a93dd99286289d77e59865c6f0b52f26dffa Signed-off-by: Keith Short <keithshort@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1896641 Reviewed-by: Abe Levkoy <alevkoy@chromium.org>
* volteer: add charger supportKeith Short2019-11-101-0/+1
| | | | | | | | | | | | | | | | Configure ISL9241 charger on Volteer. BUG=b:140557020 BRANCH=none TEST=make buildall Change-Id: I96f379cbb2adb7d46a79c9d177930e1ff4e0fa63 Signed-off-by: Keith Short <keithshort@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1896649 Reviewed-by: Jett Rink <jettrink@chromium.org> Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org> Reviewed-by: Vijay P Hiremath <vijay.p.hiremath@intel.com> Reviewed-by: Abe Levkoy <alevkoy@chromium.org>
* volteer: add initial battery supportKeith Short2019-11-094-0/+77
| | | | | | | | | | | | Add ODM specified 62 Wh battery. BUG=b:143477210 BRANCH=none TEST=make buildall Change-Id: I7c3292bbd23405781207366981c2af03b6d4624a Signed-off-by: Keith Short <keithshort@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1896648
* volteer: Configure ADC channelsKeith Short2019-11-081-3/+0
| | | | | | | | | | | | | | | | | | Configure ADC channels for temperature sensors. enum adc_channels is required by the isl9241 charger support. Addtional changes are still needed to support EC thermal capabilties. BUG=b:143768086 BRANCH=none TEST=make buildall Change-Id: Ia34464e56185e1693dd4c8aed378d7703c290742 Signed-off-by: Keith Short <keithshort@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1896640 Reviewed-by: Vijay P Hiremath <vijay.p.hiremath@intel.com> Reviewed-by: Abe Levkoy <alevkoy@chromium.org> Reviewed-by: Jett Rink <jettrink@chromium.org>
* volteer: Add manual power sequencingKeith Short2019-11-014-1/+220
| | | | | | | | | | | | | | | As backup if board driven power sequencing doesn't work, implement EC controlled power sequencing on Volteer. BUG=b:140556273 BRANCH=none TEST=make buildall TEST=make BOARD=volteer VOLTEER_POWER_SEQUENCE=y Change-Id: I62e30e5f153085e2e6c26005a77e2e1abe981b0a Signed-off-by: Keith Short <keithshort@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1881754 Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org>
* tigerlake/icelake: add support for SYS_PWROKKeith Short2019-11-011-1/+2
| | | | | | | | | | | | | | | | | Add code to pass through PG_EC_ALL_SYS_PWRGD from the platform to the PCH signal PCH_SYS_PWROK. These signals correspond to the Intel signal names ALL_SYS_PWRGD and PCH_SYS_PWROK, respectively. BUG=b:143373337 BRANCH=none TEST=make buildall -j Change-Id: Iff86508450a5bca8c97fb855fa1a3a586edd99ff Signed-off-by: Keith Short <keithshort@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1881753 Commit-Queue: Sean Abraham <seanabraham@chromium.org>
* eSPI: Configure SLP_S3, SLP_S4 separatelyAbe Levkoy2019-10-302-5/+1
| | | | | | | | | | | | | | | | | | Split the configuration option CONFIG_HOSTCMD_ESPI_VW_SLP_SIGNALS into separate options controlling SLP_S3 and SLP_S4. Allow volteer to configure SLP_S3 as a GPIO and SLP_S4 as an eSPI virtual wire. Cause a build error if virtual wires are configured, but eSPI is not. BUG=b:139553375,b:143288478 TEST=make buildall TEST=Build volteer with CONFIG_HOSTCMD_ESPI_VW_S4 defined but CONFIG_HOSTCMD_ESPI undefined; observe build error BRANCH=none Change-Id: I8c6737e2ccb1a77a882e5fa65c6eddb342209b61 Signed-off-by: Abe Levkoy <alevkoy@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1881758 Reviewed-by: Keith Short <keithshort@chromium.org>
* volteer: Remove ISR todoAbe Levkoy2019-10-281-1/+0
| | | | | | | | | | | | | | There is no need to change the ISR for RSMRST, so remove the todo. BUG=b:139553375 TEST=make buildall BRANCH=none Change-Id: I3ccc5c80432aa085f8492b96446456bf0ef1c1a4 Signed-off-by: Abe Levkoy <alevkoy@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1881755 Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org> Reviewed-by: Keith Short <keithshort@chromium.org>
* volteer: Add GPIO_LOCKED to EC_RST_ODL PSL inputKeith Short2019-10-231-1/+6
| | | | | | | | | | | | | BUG=b:143089106 BRANCH=none TEST=make buildall Change-Id: I38b9331f6d0707dcd5b19823153549bd5806969f Signed-off-by: Keith Short <keithshort@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1876891 Reviewed-by: Edward Hill <ecgh@chromium.org> Reviewed-by: Denis Brockus <dbrockus@chromium.org> Commit-Queue: Denis Brockus <dbrockus@chromium.org>
* volteer: Configure power sequencing signalsAbe Levkoy2019-10-174-0/+26
| | | | | | | | | | | | | | Configure power sequencing interrupts and power-enable lines. Leave SLP_S4_L, which will be virtual, unimplemented for now. BUG=b:139553375 TEST=make buildall BRANCH=none Change-Id: Idf11290c84deb9ea2a71f5498a4a0db5363d2a3b Signed-off-by: Abe Levkoy <alevkoy@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1865481 Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org>
* cometlake: Cleanup GPIO_PCH_SYS_PWROKKeith Short2019-10-151-0/+1
| | | | | | | | | | | | | | | | | | | | Change GPIO_EC_PCH_SYS_PWROK to GPIO_PCH_SYS_PWROK on cometlake to conform with naming convention used on other Intel processors. Leave gpio.inc files unchanged and add a mapping from GPIO_EC_PCH_SYS_PWROK to GPIO_PCH_SYS_PWROK in the board files. BUG=none BRANCH=none TEST=make buildall -j TEST=boot kohaku Change-Id: I722cb06dd90ee5d7e426664508f54a5cbe19de4a Signed-off-by: Keith Short <keithshort@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1848251 Reviewed-by: Vijay P Hiremath <vijay.p.hiremath@intel.com> Reviewed-by: Denis Brockus <dbrockus@chromium.org> Reviewed-by: Edward Hill <ecgh@chromium.org> Commit-Queue: Denis Brockus <dbrockus@chromium.org>
* volteer: Support keyboardAbe Levkoy2019-10-111-1/+3
| | | | | | | | | | | | | | | Configure keyboard features, enable keyboard-related tasks, and define a custom time period to wait for output to settle during key scan. BUG=b:139554320 TEST=make buildall BRANCH=none Change-Id: I0d28389361c87a868f62325b86b65fc5b2550a70 Signed-off-by: Abe Levkoy <alevkoy@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1841885 Reviewed-by: Keith Short <keithshort@chromium.org> Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org>
* volteer: enable CONFIG_BRINGUPKeith Short2019-10-111-0/+6
| | | | | | | | | | | | | | Prevent EC from powering up AP during initial board bringup. BUG=none BRANCH=none TEST=make buildall -j Change-Id: Id0ec787ed34444a9e40174925d8c11a8e71d66d0 Signed-off-by: Keith Short <keithshort@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1850276 Reviewed-by: Abe Levkoy <alevkoy@chromium.org> Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org>
* Volteer: fix I2C bus 0Keith Short2019-10-081-1/+1
| | | | | | | | | | | | | | | | Wrong pins were configured for alternate mode on I2C bus 0. BUG=none BRANCH=none TEST=make buildall -j TEST=Loaded volteer image on Kohaku (which uses same EC and I2C configuration, verified i2cscan Change-Id: If9cd2eb38424c3cc821cf2cfe1ab4209a5f77b4a Signed-off-by: Keith Short <keithshort@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1846236 Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org> Reviewed-by: Abe Levkoy <alevkoy@chromium.org>
* volteer: Configure GPIOs connected to keyboardAbe Levkoy2019-10-052-0/+11
| | | | | | | | | | | | | Configure the pins connected to the keyboard scan lines. BUG=b:139554320 TEST=make buildall BRANCH=none Change-Id: I245122aa589424b1cb397f99b5fd60deb434d87a Signed-off-by: Abe Levkoy <alevkoy@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1841884 Reviewed-by: Keith Short <keithshort@chromium.org>
* volteer: Configure the GPIOs connected to LEDsAbe Levkoy2019-10-021-0/+6
| | | | | | | | | | | | | | | Configure the individual LEDs for PWM and the selector for GPIO. BUG=b:139554899 BRANCH=none TEST=make buildall Change-Id: I0f86cb86c6dbf1fa30f2782d4382d8509c7ecc57 Signed-off-by: Abe Levkoy <alevkoy@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1832886 Tested-by: Daisuke Nojiri <dnojiri@chromium.org> Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org> Commit-Queue: Daisuke Nojiri <dnojiri@chromium.org>
* volteer: Add RTC resetKeith Short2019-09-292-1/+2
| | | | | | | | | | | | | | | Add support for the RTC reset on Volteer. This change also deduplicates the board_rtc_reset() function which was identical on boards that enabled CONFIG_BOARD_HAS_RTC_RESET. BUG=b:141321096 BRANCH=none TEST=make buildall Change-Id: Ifc6959f8271400174fd4999a3c70800b03b9c2d0 Signed-off-by: Keith Short <keithshort@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1816869 Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org>
* volteer: Configure the GPIOs connected to the AP/PCHKeith Short2019-09-272-6/+27
| | | | | | | | | | | | | | This change also corrects the SYS_RESET_L signal. BUG=b:141265267 BRANCH=none TEST=make buildall Change-Id: I9661521ccc0296924840e1a0de02439800c9ca15 Signed-off-by: Keith Short <keithshort@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1816867 Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org> Reviewed-by: Abe Levkoy <alevkoy@chromium.org>
* Volteer: add I2C bus configurationKeith Short2019-08-201-0/+22
| | | | | | | | | | | | | Configure I2C pins and i2c_ports for Volteer BUG=none BRANCH=none TEST=make BOARD=volteer, make buildall Change-Id: I3834a18a94565566b839d1e34befb180a366177c Signed-off-by: Keith Short <keithshort@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1758534 Reviewed-by: Abe Levkoy <alevkoy@chromium.org>
* Volteer: Add initial AP signalsKeith Short2019-08-204-2/+16
| | | | | | | | | | | | | | Enable ESPI interface and support for IceLake chipset. Configure reset and power button signals. BUG=none BRANCH=none TEST=make BOARD=volteer Change-Id: I6f06a71fc2516781fe3c23b997310a960e6e0bb8 Signed-off-by: Keith Short <keithshort@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1758533 Reviewed-by: Abe Levkoy <alevkoy@chromium.org>
* Volteer: initial EC board setupKeith Short2019-08-205-0/+144
Create Volteer skeleton build. Only includes base NPCX7 configuration required to build. BUG=none BRANCH=none TEST=make BOARD=volteer, make buildall TEST=Booted skeleton volteer EC image on careena board. Change-Id: I07769edfac9818320f18bbc9d0ebcd8f345fb8bb Signed-off-by: Keith Short <keithshort@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1758532 Reviewed-by: Abe Levkoy <alevkoy@chromium.org> Reviewed-by: Jett Rink <jettrink@chromium.org>
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