| Commit message (Collapse) | Author | Age | Files | Lines |
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Separate keyboard_scan_config keyscan_config
from volteer baseboard to each project board.
To meet different configurations on each board.
BUG=b:149536282
BRANCH=none
TEST=make buildall
Change-Id: I9070953c02ff7d3eb4950191db6505b635371792
Signed-off-by: Samsp_Liu <Samsp_Liu@compal.corp-partner.google.com>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2383359
Tested-by: SamSP Liu <samsp_liu@compal.corp-partner.google.com>
Reviewed-by: Elthan Huang <elthan_huang@compal.corp-partner.google.com>
Reviewed-by: Keith Short <keithshort@chromium.org>
Commit-Queue: SamSP Liu <samsp_liu@compal.corp-partner.google.com>
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support TBT/USB4 with all typeC port
BUG=b:162376062
BRANCH=none
TEST=checking with TBT is working on USB-C0/C1 at Gen3 speed
Change-Id: Ia9f3854d9319ff1c28167759622b3ba4b810372d
Signed-off-by: Ben Chen <ben.chen2@quanta.corp-partner.google.com>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2377047
Reviewed-by: Keith Short <keithshort@chromium.org>
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Separate tcpc_config from volteer baseboard to each
project board.
To meet different configurations on each board.
BUG=b:153705222
BRANCH=none
TEST=make buildall
Change-Id: Iea59518123a542ebe38be195eaf71b4a8f796550
Signed-off-by: Samsp_Liu <Samsp_Liu@compal.corp-partner.google.com>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2342183
Tested-by: SamSP Liu <samsp_liu@compal.corp-partner.google.com>
Commit-Queue: Keith Short <keithshort@chromium.org>
Reviewed-by: Keith Short <keithshort@chromium.org>
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Separate CONFIG_CHARGER_SENSE_RESISTOR and
CONFIG_CHARGER_SENSE_RESISTOR_AC from volteer baseboard
to each project board.
To meet different configurations on each board.
BUG=b:158257062
BRANCH=none
TEST=make buildall
Change-Id: Ib8290bd54d45054b82d7849e84119d419cbc8586
Signed-off-by: Samsp_Liu <Samsp_Liu@compal.corp-partner.google.com>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2346088
Tested-by: SamSP Liu <samsp_liu@compal.corp-partner.google.com>
Reviewed-by: Abe Levkoy <alevkoy@chromium.org>
Commit-Queue: SamSP Liu <samsp_liu@compal.corp-partner.google.com>
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If the BB retimer has a shared NVM we need 40ms delay after releasing
the RESET line to synchronize, load and initialize both the retimers.
On a non-shared NVM we need 20ms delay to load and initialize. In order
to synchronize, instead of 40ms delay this CL uses a MUTEX to lock
the access of another retimer by not releasing the RESET line until the
first retimer completes initialization.
BUG=b:165895649
BRANCH=none
TEST=Tested on volteer(non shared NVM), tglrvpu_ite (shared NVM)
Retimer is able to initialize (DP, USB, TBT, USB4 are detected)
Change-Id: I709377c2e6401faa26871289143d71665ee516d1
Signed-off-by: Vijay Hiremath <vijay.p.hiremath@intel.com>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2368223
Reviewed-by: Keith Short <keithshort@chromium.org>
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Add the voxel_npcx797fc build target to test Voxel boards reworked
with the NPCX797FC EC.
BUG=b:163687531
BRANCH=none
TEST=make buildall, workable on the re-worked Board.
Change-Id: I03ea3957de033c4abe2c66a416c258ef44aeb3d4
Signed-off-by: Ben Chen <ben.chen2@quanta.corp-partner.google.com>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2364332
Reviewed-by: Keith Short <keithshort@chromium.org>
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FORCE_PWR GPIO is used for keeping the BB retimer in active state during
f/w updating. On TGLRVP, control to enable the FORCE_PWR GPIO was given
to EC to support the I2C based F/W updating. I2C based f/w updating is
deprecated and the LSx interface is POR hence the FORCE_PWR GPIO control
is given to AP now. Thus, removing the FORCE_PWR GPIO from EC driver.
BUG=b:165214747
BRANCH=none
TEST=make buildall -j
Change-Id: If9bb7199a68c93f704f698552e5594a58bd68f7c
Signed-off-by: Vijay Hiremath <vijay.p.hiremath@intel.com>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2363334
Reviewed-by: Ayushee Shah <ayushee.shah@intel.com>
Reviewed-by: Keith Short <keithshort@chromium.org>
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change motion sensor base accel and gyro config,
and rotations matrices of lid accel and base.
BUG=b:162940877
BRANCH=none
TEST=Using ectool 'motionsense' verified lid angle now goes
from 0 to 360 and swtiches to tablet mode after crossing 200
threshold.
Change-Id: I2073ed7d64604d4c3a53ee5d9d11ab930840d0dd
Signed-off-by: Ben Chen <ben.chen2@quanta.corp-partner.google.com>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2352965
Reviewed-by: Keith Short <keithshort@chromium.org>
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Configure unused GPIOs as inputs to save power in deep sleep states.
BUG=b:162592971
BRANCH=none
TEST=make buildall
Change-Id: I1cc6330268b269bb9f337913335f055056b3800a
Signed-off-by: Ben Chen <ben.chen2@quanta.corp-partner.google.com>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2335526
Reviewed-by: Keith Short <keithshort@chromium.org>
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remove light sensor function of TCS3400
BUG=b:162940877
BRANCH=none
TEST=make buildall.
Change-Id: I8ceeac4084b6b369b19d53f40f15d198c3964816
Signed-off-by: Ben Chen <ben.chen2@quanta.corp-partner.google.com>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2344265
Reviewed-by: Keith Short <keithshort@chromium.org>
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Separate usb pd power config from volteer baseboard to each
project board.
To meet different configurations on each board.
BUG=b:159282888
BRANCH=none
TEST=halvor test
Change-Id: I5aba9c7c59ababd34e51906365b1ae2a28c256ea
Signed-off-by: Samsp_Liu <Samsp_Liu@compal.corp-partner.google.com>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2312001
Tested-by: SamSP Liu <samsp_liu@compal.corp-partner.google.com>
Reviewed-by: Abe Levkoy <alevkoy@chromium.org>
Commit-Queue: Abe Levkoy <alevkoy@chromium.org>
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config LGC battery MPPACEEASW1C
BUG=b:162701180
BRANCH=none
TEST=Make sure battery can cutoff by console "cutoff" or "ectool cutoff"
and resume by plug in adapter.
Change-Id: I89fa4ae383c9f59434aa4111e531c775d83270b4
Signed-off-by: ben.chen2@quanta.corp-partner.google.com
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2336374
Reviewed-by: Keith Short <keithshort@chromium.org>
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config gpio keyboard backlight en pin, and enable/disable
in power on/off sequence
BUG=b:162632407
BRANCH=none
TEST=make buildall
TEST=run 'kblight' EC console command to verify keyboard backight
TEST=run 'ectool verify pwmsetkblight' to verify keyboard backlight
Change-Id: I7907d5a49f9db6a722989a054f7ad6aec6b6d55f
Signed-off-by: Ben Chen <ben.chen2@quanta.corp-partner.google.com>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2335517
Reviewed-by: Abe Levkoy <alevkoy@chromium.org>
Reviewed-by: Keith Short <keithshort@chromium.org>
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change i2c4 address to 0x41 of C1 port bb
retimer address.
BUG=b:162376062
BRANCH=none
TEST=make buildall PASS
Change-Id: I7a0ee44fb4e5df7222708b28e11d63fdde700334
Signed-off-by: Ben Chen <ben.chen2@quanta.corp-partner.google.com>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2332102
Reviewed-by: Keith Short <keithshort@chromium.org>
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The board/AP can handle power sequencing without EC intervention. This
support was already disabled by default in configuration.
BUG=b:143375057
TEST=make buildall
BRANCH=none
Signed-off-by: Abe Levkoy <alevkoy@chromium.org>
Change-Id: I39036ba5022cdf953ccb26f23008c21a99989078
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2330576
Reviewed-by: Keith Short <keithshort@chromium.org>
Commit-Queue: Keith Short <keithshort@chromium.org>
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Config GPIOF2, GPIOF3 to i2c module
BUG=b:155062762
BRANCH=none
TEST=make buildall PASS
Change-Id: Idaaaf73ef942a45f206122b3ce24c75514f8df3d
Signed-off-by: Ben Chen <ben.chen2@quanta.corp-partner.google.com>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2325524
Reviewed-by: Keith Short <keithshort@chromium.org>
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config GPIO EN_DRAM_VDDQ to GPIOC6, and enable
CONFIG_USB_PORT_POWER_DUMB for enabling/disabling
charging from USB-A ports. This change also disables
the USB1 low power limit by default.
BUG=b:155062762
BRANCH=none
TEST=make buildall PASS
Change-Id: I1f4c0e4d93364f4a73a96a3e72b363594efa72cd
Signed-off-by: Ben Chen <ben.chen2@quanta.corp-partner.google.com>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2289472
Commit-Queue: Keith Short <keithshort@chromium.org>
Reviewed-by: Keith Short <keithshort@chromium.org>
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Config GPIOC3, GPIOC4 to GPIO control.
Supports the LED control Behavior as below
Charge: Amber on (S0/S3/S5)
Full: Blue on (S0/S3/S5)
Discharge in s0: Blue on
Discharge in s3: Amber on 1 sec off 3 sec
Discharge in s5: off
Error: Amber on 1 sec off 1 sec
Factory mode: Blue on 2 sec Amber on 2 sec
BUG=b:155062762, b:160944822
BRANCH=none
TEST=make buildall PASS
Change-Id: I8e36c0a4c82a1cedd9c923d57eb0eb2cb5c6f9da
Signed-off-by: Ben Chen <ben.chen2@quanta.corp-partner.google.com>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2291456
Reviewed-by: Keith Short <keithshort@chromium.org>
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change C0 port ppc from SN55330 to SYV682X
BUG=b:155062762, b:155062762
BRANCH=none
TEST=make buildall PASS
Change-Id: Idf03405adfa591f9f331cae79e1f7db6780afb57
Signed-off-by: Ben Chen <ben.chen2@quanta.corp-partner.google.com>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2284506
Reviewed-by: Keith Short <keithshort@chromium.org>
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add bb retimer for C0/C1 port
BUG=b:155062762, b:155062762
BRANCH=none
TEST=make buildall PASS
Change-Id: I1da93b58eae4c28a8f7a7192518a130f80b848d9
Signed-off-by: Ben Chen <ben.chen2@quanta.corp-partner.google.com>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2275516
Reviewed-by: Keith Short <keithshort@chromium.org>
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Move ppc_chips[] to board for board customize.
BUG=b:151978872
BRANCH=master
TEST=check ppc init succeed and switch source/sink correct with type c
device.
Change-Id: I287bbe44b163d72c19a3764dca431c84d86bbdec
Signed-off-by: David Huang <david.huang@quanta.corp-partner.google.com>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2275971
Commit-Queue: Keith Short <keithshort@chromium.org>
Reviewed-by: Keith Short <keithshort@chromium.org>
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Update Voxel USB daughterboard options to match project configuration.
BUG=b:155497872
BRANCH=none
TEST=make BOARD=voxel
TEST=make buildall
Cq-Depend: chromium:2247617, chromium:2248238, chromium:2248239
Cq-Depend: chromium:2248240, chromium:2248241, chromium:2252484
Signed-off-by: Keith Short <keithshort@chromium.org>
Change-Id: I7846bee072025f23328060150094e96863c2bdea
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2248242
Reviewed-by: caveh jalali <caveh@chromium.org>
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define USB_C0_DP_HPD to GPIO60
BUG=b:155062762
BRANCH=none
TEST=make buildall
Change-Id: Id182b35e810807c538bb8e0beea125458ad923a3
Signed-off-by: Ben Chen <ben.chen2@quanta.corp-partner.google.com>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2272420
Reviewed-by: Keith Short <keithshort@chromium.org>
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Duplicate of: https://chromium-review.googlesource.com/1089823
for remaining boards not covered by
https://chromium-review.googlesource.com/2242352
BUG=b:158792057
TEST=make -j buildall
BRANCH=asurada,octopus
Change-Id: Ic3ae36629d75ff20e96910c107e67f933fa4cce5
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2242396
Commit-Queue: Jes Klinke <jbk@chromium.org>
Tested-by: Jes Klinke <jbk@chromium.org>
Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
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Remove VSYNC sensor support from all volteer boards.
BUG=b:146452722
BRANCH=none
TEST=make buildall
TEST=Boot Volteer, run "ectool motionsense"
Signed-off-by: Keith Short <keithshort@chromium.org>
Change-Id: I1662f510901fb99a45999f46b854e7ceb3874f03
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2238671
Commit-Queue: Abe Levkoy <alevkoy@chromium.org>
Reviewed-by: Abe Levkoy <alevkoy@chromium.org>
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Enable the USB C0 and USB C1 overcurrent signals to the AP.
BUG=b:140561826
BRANCH=none
TEST=make buildall
TEST=Force overcurrent event by manually setting PPC current limit below
PD contract.
Signed-off-by: Keith Short <keithshort@chromium.org>
Change-Id: I5eea4812c212496f1c483c4149697b2d53a16a37
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2222960
Reviewed-by: Abe Levkoy <alevkoy@chromium.org>
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Create the initial EC image for the voxel variant by copying the
volteer reference board EC files into a new directory named for
the variant.
(Auto-Generated by create_initial_ec_image.sh version 1.0.2).
BUG=b:157879197
BRANCH=none
TEST=make BOARD=voxel
Signed-off-by: David Wu <david_wu@quanta.corp-partner.google.com>
Change-Id: I93a9c897df25c5700ac4f321510745b104cdb41b
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2224681
Reviewed-by: Keith Short <keithshort@chromium.org>
Tested-by: Paul Fagerburg <pfagerburg@chromium.org>
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