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* ish: Trim down the release branchstabilize-wristpin-14469.59.B-ishstabilize-voshyr-14637.B-ishstabilize-quickfix-14695.187.B-ishstabilize-quickfix-14695.124.B-ishstabilize-quickfix-14526.91.B-ishstabilize-14695.85.B-ishstabilize-14695.107.B-ishstabilize-14682.B-ishstabilize-14633.B-ishstabilize-14616.B-ishstabilize-14589.B-ishstabilize-14588.98.B-ishstabilize-14588.14.B-ishstabilize-14588.123.B-ishstabilize-14536.B-ishstabilize-14532.B-ishstabilize-14528.B-ishstabilize-14526.89.B-ishstabilize-14526.84.B-ishstabilize-14526.73.B-ishstabilize-14526.67.B-ishstabilize-14526.57.B-ishstabilize-14498.B-ishstabilize-14496.B-ishstabilize-14477.B-ishstabilize-14469.9.B-ishstabilize-14469.8.B-ishstabilize-14469.58.B-ishstabilize-14469.41.B-ishstabilize-14442.B-ishstabilize-14438.B-ishstabilize-14411.B-ishstabilize-14396.B-ishstabilize-14395.B-ishstabilize-14388.62.B-ishstabilize-14388.61.B-ishstabilize-14388.52.B-ishstabilize-14385.B-ishstabilize-14345.B-ishstabilize-14336.B-ishstabilize-14333.B-ishrelease-R99-14469.B-ishrelease-R98-14388.B-ishrelease-R102-14695.B-ishrelease-R101-14588.B-ishrelease-R100-14526.B-ishfirmware-cherry-14454.B-ishfirmware-brya-14505.B-ishfirmware-brya-14505.71.B-ishfactory-kukui-14374.B-ishfactory-guybrush-14600.B-ishfactory-cherry-14455.B-ishfactory-brya-14517.B-ishJack Rosenthal2021-11-0511-1504/+0
| | | | | | | | | | | | | | | | | | | | | | In the interest of making long-term branch maintenance incur as little technical debt on us as possible, we should not maintain any files on the branch we are not actually using. This has the added effect of making it extremely clear when merging CLs from the main branch when changes have the possibility to affect us. The follow-on CL adds a convenience script to actually pull updates from the main branch and generate a CL for the update. BUG=b:204206272 BRANCH=ish TEST=make BOARD=arcada_ish && make BOARD=drallion_ish Signed-off-by: Jack Rosenthal <jrosenth@chromium.org> Change-Id: I17e4694c38219b5a0823e0a3e55a28d1348f4b18 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3262038 Reviewed-by: Jett Rink <jettrink@chromium.org> Reviewed-by: Tom Hughes <tomhughes@chromium.org>
* led_pwm: split color map on a separate structureFabio Baltieri2021-09-211-1/+1
| | | | | | | | | | | | | | | | Currently color map is reusing the same structure as the channel and callback selection, which is a bit wasteful and somewhat confusing. Split it to its own struct with just three uint8_t fields. BRANCH=none BUG=none TEST=build only Signed-off-by: Fabio Baltieri <fabiobaltieri@google.com> Change-Id: I56992fa9525db46980e450eb6569ba8291987b9b Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3168864 Reviewed-by: Jack Rosenthal <jrosenth@chromium.org> Reviewed-by: Yuval Peress <peress@google.com>
* lid_angle: Create a common callback for lid angle changesWai-Hong Tam2021-08-051-3/+1
| | | | | | | | | | | | | | | | | | | | | | Each board defines its own callback lid_angle_peripheral_enable(). The implementation is very similar. Create a common implementation and reduce the duplicated code. This CL removes the board callbacks which are identifical to the common callback. If it is slightly different, keep it and add the __override tag. The check of TEST_BUILD is unnecessary as the board callback is not linked in the test build. BRANCH=None BUG=b:194922043 TEST=Build all the images. Change-Id: I73d381730f35b80eff69399cdfc5fb54f839aee0 Signed-off-by: Wai-Hong Tam <waihong@google.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3069175 Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
* dedede: Make scope of SSFC definition per boardParth Malkan2021-07-193-1/+97
| | | | | | | | | | | | | | | | | | | | | | SSFC bit definition started diverging between coreboot and EC. To avoid conflicts move the definitions of SSFC bits within EC to per board instead of at a baseboard level. Base sensor and Lid sensor components are common across all boards Base Sensor - bits 0-2 Lid Sensor - bits 3-5 In addition, Sasuke uses bits 6-8 for usb superspeed mux Cret board uses bits 9-11 in coreboot for audio codec BRANCH=firmware-dedede-13606.B BUG=b:187694527 TEST=make buildall Signed-off-by: Parth Malkan <parthmalkan@google.com> Change-Id: Ib0f732e5d41668135ff180c545ff4bb6a1cb1427 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3021932 Reviewed-by: YH Lin <yueherngl@chromium.org> Reviewed-by: Marco Chen <marcochen@chromium.org>
* dedede: Enable CONFIG_ASSERT_CCD_MODE_ON_DTS_CONNECTRob Barnes2021-07-021-1/+1
| | | | | | | | | | | | | | | | | | Enable CONFIG_ASSERT_CCD_MODE_ON_DTS_CONNECT on all dedede boards. This will assert GPIO_CCD_MODE_ODL when a debug device is connected to a CCD port. GPIO_CCD_MODE_ODL must be configured as an open drain so EC and Cr50 don't drive fight. BUG=b:190189242 TEST=Build dedede BRANCH=None Change-Id: I2d71312967f2d4a693ac9753279f49478e8c092c Signed-off-by: Rob Barnes <robbarnes@google.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2976759 Reviewed-by: Diana Z <dzigterman@chromium.org> Reviewed-by: Aseda Aboagye <aaboagye@chromium.org> Tested-by: Diana Z <dzigterman@chromium.org>
* keeby/dedede: Gate temp sensor access by GPIOAseda Aboagye2021-06-291-1/+0
| | | | | | | | | | | | | | | | | | | | | | | | On dedede and keeby boards, the thermistors are powered by the EC's GPIO_EN_PP3300_A pin. If the thermistors are read before they are powered then the EC may force a thermal shutdown due to the bad reading. This commit simply defines CONFIG_TEMP_SENSOR_POWER_GPIO along with a CONFIG_TEMP_SENSOR_FIRST_READ_DELAY_MS to ensure we don't get any false positive thermal shutdowns. BUG=b:192053176 BRANCH=dedede TEST=Build and flash lalala. Unplug AC charger from DUT, press refresh+power button to reset DUT, verify that DUT boots up automatically. TEST=Repeat above test with madoo. Signed-off-by: Aseda Aboagye <aaboagye@google.com> Change-Id: I2a49e2f896c4120a8f01f440ea22c9b3763c6589 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2988364 Tested-by: Aseda Aboagye <aaboagye@chromium.org> Auto-Submit: Aseda Aboagye <aaboagye@chromium.org> Reviewed-by: Diana Z <dzigterman@chromium.org> Commit-Queue: Diana Z <dzigterman@chromium.org>
* Add a common header for board_is_sourcing_vbus()Simon Glass2021-03-311-2/+0
| | | | | | | | | | | | | | | | This function prototype is defined in lots of files, none of which is visible to Zephyr. Add a prototype in one place and remove the others. BUG=b:183296099 BRANCH=none TEST=make buildall Signed-off-by: Simon Glass <sjg@chromium.org> Change-Id: Ia324327a69b117483ab9ee5c85eba93c0fb5ad9c Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2789799 Reviewed-by: Jack Rosenthal <jrosenth@chromium.org>
* genvif: Use VIF overrides by defaultAbe Levkoy2021-03-301-0/+3
| | | | | | | | | | | | | | Use board-specific override files when generating VIFs for boards. BUG=b:172276715 TEST=make buildall BRANCH=none Signed-off-by: Abe Levkoy <alevkoy@chromium.org> Change-Id: I197365018ceb8197c22d631cebf4cbce1c0119f7 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2785506 Reviewed-by: Denis Brockus <dbrockus@chromium.org> Commit-Queue: Denis Brockus <dbrockus@chromium.org>
* Waddledee: Align task stacks with drawciaDiana Z2021-01-151-4/+4
| | | | | | | | | | | | | | Increase the reference ITE stack sizes to align with the ones which have been set for drawcia, as we still have plenty of stack space. BRANCH=dedede BUG=b:177479440 TEST=make -j buildall Signed-off-by: Diana Z <dzigterman@chromium.org> Change-Id: I13c928f89db8b9b43572f19dc4d8f39a0766af5c Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2628896 Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
* Move tcpic.h header into include/driverSimon Glass2021-01-071-1/+1
| | | | | | | | | | | | | | | | | | This header cannot currently be accessed by Zephyr since it is in a driver directory, not an include directory. This header has quite a bit of public stuff in it, so it seems reasonable to consider everything public. Move the header file and update all users. BUG=b:175434113 BRANCH=none TEST=make buildall -j30 build volteer on zephyr Signed-off-by: Simon Glass <sjg@chromium.org> Change-Id: Ibba37f47a06783fafb5095f853f2a68d92b6df87 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2607745
* waddledee: Check Type-C interrupt lines at initAseda Aboagye2021-01-061-4/+2
| | | | | | | | | | | | | | | | | | After a sysjump, it could be possible that the Type-C interrupt lines are asserted. This commit simply has the EC check the interrupt lines after init and handle them if necessary. BUG=b:143166332 BRANCH=dedede TEST=`make -j BOARD=waddledee` Signed-off-by: Aseda Aboagye <aaboagye@google.com> Change-Id: I5473b1edf533bc1b0f47b8085ae2203d375ef82e Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2601776 Tested-by: Aseda Aboagye <aaboagye@chromium.org> Reviewed-by: Diana Z <dzigterman@chromium.org> Commit-Queue: Aseda Aboagye <aaboagye@chromium.org> Auto-Submit: Aseda Aboagye <aaboagye@chromium.org>
* TCPMv2: Update source-out configsDiana Z2020-12-241-10/+0
| | | | | | | | | | | | | | | | | | | | Now that the DPM will be handling source-out decisions for TCPMv2, remove references to its old configuration options from TCPMv2 boards in order to avoid any confusion as to what code is running now. Also remove the charge manager notifications of sink attach/detach since the policy is being centralized into the DPM. Note that the previous configuration options only ever allocated one 3.0 A port, and so the default number of 3.0 A ports has been set to 1. BRANCH=None BUG=b:168862110,b:141690755 TEST=make -j buildall Signed-off-by: Diana Z <dzigterman@chromium.org> Change-Id: Ie452e3da32b04226503539daa67b6b9f4a58aa58 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2597431 Reviewed-by: Keith Short <keithshort@chromium.org>
* task_set_event: remove the wait argumentDawid Niedzwiecki2020-12-141-2/+2
| | | | | | | | | | | | | | | | | | | | There is an option in the task_set_event function which force the calling task to wait for an event. However, the option is never used thus remove it. This also will help in the Zephyr migration process. BUG=b:172360521 BRANCH=none TEST=make buildall Signed-off-by: Dawid Niedzwiecki <dn@semihalf.com> Change-Id: Ic152fd3d6862d487bcc0024c48d136556c0b81bc Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2521599 Reviewed-by: Jett Rink <jettrink@chromium.org> Reviewed-by: Tom Hughes <tomhughes@chromium.org> Reviewed-by: Jack Rosenthal <jrosenth@chromium.org> Commit-Queue: Jack Rosenthal <jrosenth@chromium.org>
* Waddledee: Add pull-ups to volume GPIOsDiana Z2020-11-051-2/+2
| | | | | | | | | | | | | Add internal pull-ups to volume button GPIOs. BRANCH=None BUG=b:172487251 TEST=make -j buildall Signed-off-by: Diana Z <dzigterman@chromium.org> Change-Id: I884f5180fa09318192b50ec1b7da6d3a8c741cba Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2520100 Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
* Dedede: Leave 5V on when jumping in S5Diana Z2020-10-081-1/+2
| | | | | | | | | | | | | | | | PP5000_U shouldn't be turned off until G3, so if a sysjump occurs during S5 leave this rail on. BRANCH=None BUG=b:166787955,b:167996216 TEST=on drawcia, run full resets with a forced sysjump in S5 and ensure that the DUT can get to S0 after the reset Signed-off-by: Diana Z <dzigterman@chromium.org> Change-Id: I00fb44903aa109bbc525fb512ab4035a94649c68 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2458841 Reviewed-by: Aseda Aboagye <aaboagye@chromium.org> Commit-Queue: Aseda Aboagye <aaboagye@chromium.org>
* Dedede: Check versus vSinkDisconnect on VBUS_REMOVEDstabilize-13505.1.B-masterDiana Z2020-10-021-1/+3
| | | | | | | | | | | | | | | | For variants using the charger Vbus ADC, add a check versus vSinkDisconnect to determine if the TC layer connection has been broken. BRANCH=None BUG=b:168831161 TEST=on waddledee, confirm we can reliably source 5V from a charger without erroneously detecting disconnect Signed-off-by: Diana Z <dzigterman@chromium.org> Change-Id: Icd06d91cd28db068c8cfa646152596d6eab80375 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2436581 Reviewed-by: Denis Brockus <dbrockus@chromium.org> Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
* waddledee/drawcia: Update default resistanceAseda Aboagye2020-10-011-1/+1
| | | | | | | | | | | | | | | | | | | | The default combined Rbatt resistance is actually higher than what was currently specified. The wrong Rds(on) value was used as well as the sense resistor was missed. This commit updates the default resistances for these boards. BUG=none BRANCH=none TEST=Build and flash drawlat, verify default resistance is updated. Signed-off-by: Aseda Aboagye <aaboagye@google.com> Change-Id: I6b669dfcd1ec11cb2f456b19e83ac4c2783c0b8a Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2441803 Tested-by: Aseda Aboagye <aaboagye@chromium.org> Auto-Submit: Aseda Aboagye <aaboagye@chromium.org> Reviewed-by: Diana Z <dzigterman@chromium.org> Commit-Queue: Diana Z <dzigterman@chromium.org>
* Dedede: Remove DAC for boards using ITE+SM combinationDiana Z2020-09-281-3/+0
| | | | | | | | | | | | | | | For boards which are using the SM charger chips, they will have a Psys offset register to generate the OCPC Psys output. BRANCH=None BUG=b:168783892 TEST=make -j buildall Signed-off-by: Diana Z <dzigterman@chromium.org> Change-Id: Ib963ed11f73a76dfeffa11d5ab4a81ccbbd71102 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2435746 Reviewed-by: Aseda Aboagye <aaboagye@chromium.org> Commit-Queue: Aseda Aboagye <aaboagye@chromium.org>
* waddledee: Update OCPC PID constantsAseda Aboagye2020-09-281-6/+6
| | | | | | | | | | | | | | | | | | This commit updates the PID constants for waddledee after having switched to forcing the BFET on instead of using linear mode for the majority of the charge curve. BUG=b:168253008 BRANCH=None TEST=Build and flash waddledee, verify that charging from the sub board is working and converges without significant oscillation. Change-Id: Ia55d7b693c4e0745fc4bec94c96595c81995be3c Signed-off-by: Aseda Aboagye <aaboagye@google.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2407018 Tested-by: Aseda Aboagye <aaboagye@chromium.org> Commit-Queue: Aseda Aboagye <aaboagye@chromium.org> Reviewed-by: Diana Z <dzigterman@chromium.org>
* Dedede: Remove unnecessary RSMRST_PWRGD_L pull-upDiana Z2020-09-241-1/+1
| | | | | | | | | | | | | | | | There is an external pull-up on this signal, and so the EC pull-up is unnecessary and may cause an intermediate voltage when the system enters G3. BRANCH=None BUG=b:169179804 TEST=make -j buildall, boot to S0 on drawlat Signed-off-by: Diana Z <dzigterman@chromium.org> Change-Id: I82a513777018eb9a6cd86450612a5c943d7bd357 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2429385 Reviewed-by: Aseda Aboagye <aaboagye@chromium.org> Commit-Queue: Aseda Aboagye <aaboagye@chromium.org>
* Dedede: Remove VSYNC sensorDiana Z2020-09-233-18/+0
| | | | | | | | | | | | | Remove VSYNC sensor, and related GPIOs and configs. BRANCH=None BUG=b:169056723 TEST=make -j buildall Signed-off-by: Diana Z <dzigterman@chromium.org> Change-Id: Ib37e648ea04b5da3ed9ce6a660fcd60f2bfe264a Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2424891 Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
* SM5803: add suspend/resume function for S0ix stateDivagar Mohandass2020-09-221-0/+16
| | | | | | | | | | | | | | | | add function to turn on/off features in SM5803 charger during S0ix state to save power. we are seeing ~8mW power saving per charger. BRANCH=None BUG=b:168591511 TEST=Check power saving in S0ix state and check charger and device functionality after resume. Signed-off-by: Divagar Mohandass <divagar.mohandass@intel.com> Change-Id: I3ea32219040263f0abef8b9dd4c52edb31289fd7 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2409485 Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
* Dedede: Add Vbus check override for SM variantsDiana Z2020-09-151-0/+14
| | | | | | | | | | | | | | | | The SM charger chip has a Vbus ADC which we may use to precisely evaluate vSafe0V and vSafe5V for waddledee and drawlat. Correct evaluation of vSafe0V creates more robust power role swap behavior. BRANCH=None BUG=b:167666781,b:160996247 TEST=on drawlat, confirm monitor power role swap from SRC to SNK now completes correctly Signed-off-by: Diana Z <dzigterman@chromium.org> Change-Id: Iaf5e9c1203005cfba10da0ff2863f9c109d8b1a3 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2406342 Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
* SM5803: Enable hibernate function for z-stateDiana Z2020-09-141-0/+11
| | | | | | | | | | | | | | | | Enable SM5803 hibernation and restore registers after booting back from z-state. BRANCH=None BUG=b:166648029 TEST=on drawlat, z-state power usage is reduced and booting after z-state the charger chips can sink and source as expected Signed-off-by: Diana Z <dzigterman@chromium.org> Change-Id: I6e9f9f29a184fa6177e589b3b7810f51a1b3345b Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2393225 Reviewed-by: Aseda Aboagye <aaboagye@chromium.org> Commit-Queue: Aseda Aboagye <aaboagye@chromium.org>
* Dedede: Define GPIO_USB_C1_INT_ODL for all variantsDiana Z2020-09-091-0/+7
| | | | | | | | | | | | | | | | | Naming for the C1 interrupt line varies slightly between variants due to schematic name differences, and version or functional differences. This change ensures all boards have GPIO_USB_C1_INT_ODL defined for baseboard code to reference. BRANCH=None BUG=b:153684907 TEST=make -j buildall Signed-off-by: Diana Z <dzigterman@chromium.org> Change-Id: I9303be2f9f142eed249da4f2f5e660985ceb7fdd Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2391213 Tested-by: Divagar Mohandass <divagar.mohandass@intel.com> Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
* Waddledee: Change the lid accel sensor driverDavid Huang2020-09-092-9/+9
| | | | | | | | | | | | | Change the driver to KX022. BRANCH=None BUG=b:161821146 TEST=Build the waddledee image and check the lid accel sensor info. Signed-off-by: David Huang <david.huang@quanta.corp-partner.google.com> Change-Id: Iea5f19529689381a3ce2a10179f9e0341fda7728 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2397295 Reviewed-by: Diana Z <dzigterman@chromium.org>
* Dedede: Clean up chg_chip referencesDiana Z2020-08-272-5/+4
| | | | | | | | | | | | | | Now that the charger_* interfaces take charge indexes appropriately, clean up the board code to no longer use chg_chip structure directly. BRANCH=None BUG=b:147440290 TEST=on drawlat, confirm sourcing out on both ports works Signed-off-by: Diana Z <dzigterman@chromium.org> Change-Id: I92925e487f90bc3965b868f3f7fc0d3175dc3df9 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2376470 Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
* SM5803: Improve flow control settingDiana Z2020-08-262-34/+15
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This change adds a new Vbus sink enable command which will be called on initial sink connection and detach. This will separate out most of the FLOW1 and FLOW2 register control from the set_mode() driver API which is regularly called from the charger task. This means that, if charging on a port fails, the charging will no longer be automatically re-enabled by the charger task. Additionally, this folds the verification that we aren't disabling sourcing into the sink enable so board files no longer need to verify this before calling the sink enable/disable API. It also allows the OTG disable to fully clear the FLOW1 mode since calls to OTG are more targeted than the sink enable/disable, which happens any time another charge port is set. BRANCH=None BUG=b:163511546,b:165677311 TEST=on waddledee and drawlat, confirm expected FLOW1 contents and Vbus level: - sinking C0 or C1 - sourcing C0 or C1 - sourcing both C0 and C1 - sinking C0 while sourcing C1 - sinking C1 while sourcing C0 - battery cutoff with charger in C0 or C1 - no battery boot with charger in C0 or C1 - power role swap with HooToo hub in C0 and C1 Signed-off-by: Diana Z <dzigterman@chromium.org> Change-Id: Ifdc7786243bdf0a634d8db99b4deb53457232ad3 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2372738 Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
* waddledee: Add Sony Battery CFET mask & valAseda Aboagye2020-08-261-0/+2
| | | | | | | | | | | | | | | | | | | | The Sony battery being used on waddledee sometimes randomly disables the charge FET (CFET) in order to perform some impedence measurements. This commit adds the fields for the CFET disable status such that it can be retrieved by the system. BUG=b:160918663 BRANCH=None TEST=Build and flash waddledee, verify that CFET disable status is reflected. Signed-off-by: Aseda Aboagye <aaboagye@google.com> Change-Id: I6487e36724683b3d81ad1063b2609a883d60570d Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2370042 Commit-Queue: Aseda Aboagye <aaboagye@chromium.org> Tested-by: Aseda Aboagye <aaboagye@chromium.org> Auto-Submit: Aseda Aboagye <aaboagye@chromium.org> Reviewed-by: Diana Z <dzigterman@chromium.org>
* Dedede: Move PWM to board levelDiana Z2020-08-211-0/+3
| | | | | | | | | | | | | | | | Move the PWM related defines and arrays into the board level, to allow customization of what PWM channels boards use (if they choose to use the PWM at all). BRANCH=None BUG=None TEST=make -j buildall Signed-off-by: Diana Z <dzigterman@chromium.org> Change-Id: Id417a7be079511c17de9f2e5d03c729467435804 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2358899 Commit-Queue: Aseda Aboagye <aaboagye@chromium.org> Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
* waddledee: Enable OCPCAseda Aboagye2020-08-152-0/+24
| | | | | | | | | | | | | | | | | | This commit enables OCPC for waddledee which allows charging from the sub board port. BUG=b:161898184 BRANCH=None TEST=Build and flash waddledee, verify that DUT can charge from the sub board. Signed-off-by: Aseda Aboagye <aaboagye@google.com> Change-Id: I61fbdfa0f7c06f0c2fb70aa5cbd92bb6b7f76cfd Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2330817 Tested-by: Aseda Aboagye <aaboagye@chromium.org> Tested-by: Diana Z <dzigterman@chromium.org> Reviewed-by: Diana Z <dzigterman@chromium.org> Commit-Queue: Aseda Aboagye <aaboagye@chromium.org>
* Revert "power: Clear AP_IDLE when waking up by PB or LID"Daisuke Nojiri2020-08-011-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This reverts commit 27ee378bb78a299a0983379be83eb6d55860b4ae. Reason for revert: b/162508724 A wake-up source from hibernation needs to be determined only by RO. Reverting back to the original implementation: CL:2236589. Original change's description: > power: Clear AP_IDLE when waking up by PB or LID > > Currently, AP_IDLE is cleared when EC wakes up by the power button or > the lid open. > > This patch extends the logic from CONFIG_EXTPOWER_GPIO to > CONFIG_EXTPOWER so that the bug (chromium:1073960) can be also fixed > on the boards using non-GPIO method for extpower_is_present. > > Tested as follows on Trembyle: > 1. Put DUT in hibernation. > 2. Wake up DUT and observe: > a. When waking up by power button, AP is turned on. > b. When waking up by lid open, AP is turned on. > c. When waking up by AC, AP is left idle. > > BUG=b:157077589, chromium:1073960, b:159350276 > BRANCH=none > TEST=See above. > > Signed-off-by: Daisuke Nojiri <dnojiri@chromium.org> > Change-Id: I944aaac036ce58659e81b7021e52a3291f31e951 > Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2283946 > Reviewed-by: Jett Rink <jettrink@chromium.org> Bug: b:157077589 Bug: chromium:1073960 Bug: b:159350276 Bug: b:162508724 Change-Id: Iaf9d0af2ca8c48bbf2529c4ba05493837dd76287 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2333106 Tested-by: Daisuke Nojiri <dnojiri@chromium.org> Auto-Submit: Daisuke Nojiri <dnojiri@chromium.org> Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org> Commit-Queue: Daisuke Nojiri <dnojiri@chromium.org>
* Dedede: Move extpower_is_present() to baseboardDiana Z2020-07-281-5/+0
| | | | | | | | | | | | | | | | | | | | This consolidates dedede boards to use a baseboard extpower_is_present() and also adds the condition to verify that the port is sinking, instead of providing Vbus. It also converts the RAA489000 boards to use the cached Vbus presence in pd_snk_is_vbus_provided(). BRANCH=None BUG=None TEST=on waddledoo and waddledee, verify "AC on" prints when a charger or charge-through servo v4 is plugged in, verify no "AC on" prints when a dongle is plugged in Signed-off-by: Diana Z <dzigterman@chromium.org> Change-Id: I5941da789a4e810f6d8cc40cef4d32a5a03c5662 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2317062 Tested-by: Devin Lu <Devin.Lu@quantatw.com> Reviewed-by: Aseda Aboagye <aaboagye@chromium.org> Commit-Queue: Aseda Aboagye <aaboagye@chromium.org>
* waddledee: Use VBUS ADC for extpowerAseda Aboagye2020-07-211-7/+1
| | | | | | | | | | | | | | | | | | There's an issue with the CHG_DET bit which was causing the AC change notifications to not occur. This commit replaces the usage of the CHG_DET bit with reading the VBUS ADCs to determine VBUS presence. BUG=b:161269327 BRANCH=None TEST=Build and flash waddledee rev 1, verify AC notification changes work as expected. Signed-off-by: Aseda Aboagye <aaboagye@google.com> Change-Id: Ibebeb4e252efd4ac8bc3d97303eb3c133e699e1a Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2297983 Tested-by: Aseda Aboagye <aaboagye@chromium.org> Commit-Queue: Aseda Aboagye <aaboagye@chromium.org> Reviewed-by: Diana Z <dzigterman@chromium.org>
* boten: split CONFIG_LED_PWM out into boardsxiong.huang2020-07-151-0/+1
| | | | | | | | | | | | | It will be happy to define LED behavior in boards. BUG=b:160664441 BRANCH=none TEST=make buildall -j4 Signed-off-by: xiong.huang <xiong.huang@bitland.corp-partner.google.com> Change-Id: Ib81fe8d20fa3ab74064958fba3576a1618635e52 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2296544 Reviewed-by: Diana Z <dzigterman@chromium.org>
* dedede: Move adc channel to board variantDevin Lu2020-07-142-0/+43
| | | | | | | | | | | | | | Dedede family may have different temp sensors for other ADCs channel. This patch moves adc channel to board variant. BUG=none BRANCH=none TEST=make buildall -j Signed-off-by: Devin Lu <Devin.Lu@quantatw.com> Change-Id: Id34a924fc9431a553a1467068c6ccee6111102bc Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2289478 Reviewed-by: Diana Z <dzigterman@chromium.org>
* Charger: Add dynamic charger chip countDiana Z2020-07-111-1/+0
| | | | | | | | | | | | | | | | Different DB options may cause different numbers of charger chips to be present on the system. Remove constant count for charger chips, and instead always call into the overridable function to query the count. BRANCH=None BUG=b:155963446 TEST=make -j buildall Signed-off-by: Diana Z <dzigterman@chromium.org> Change-Id: I0e65b8af351ecabe6f7b823e0e56f1932cc280a6 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2277833 Commit-Queue: Aseda Aboagye <aaboagye@chromium.org> Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
* Waddledee: Check interrupt lines during initDiana Z2020-07-091-0/+10
| | | | | | | | | | | | | | | | | The interrupt line for the charger may already be low before inits have completed. If this is the case, set up a deferred call to clear the interrupts from the chips during the first run of the hooks task. BRANCH=None BUG=b:160618359 TEST=on waddledee, observe that when the EC reboots with the C0 interrupt line low the interrupts are processed and PD negotiation can succeed Signed-off-by: Diana Z <dzigterman@chromium.org> Change-Id: Iba1b76e0b6502e1628648e08524bbc7ec1c0437b Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2287550 Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
* Waddledee: enable GPIO interrupt of the sensor in the baseMarco Chen2020-07-091-0/+2
| | | | | | | | | | | | | | | | | | EC didn't pull data from the sensor in the base for accel and gyro because the data interrupt is not enabled. As a result, enabling the interrupt is needed for detecting data from the sensor. BUG=b:160113129 TEST=flash the new FW into the DUT then check whether `ectool motionsense` reports the valid data from sensor in the base. BRANCH=none Change-Id: Ia623ad84c752826e2a0670bf6fc04286a07970a0 Signed-off-by: Marco Chen <marcochen@google.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2269396 Reviewed-by: Aseda Aboagye <aaboagye@chromium.org> Tested-by: Marco Chen <marcochen@chromium.org> Commit-Queue: Karthikeyan Ramasubramanian <kramasub@chromium.org>
* Waddledee: Enable MB USB-A VbusDiana Z2020-07-072-1/+2
| | | | | | | | | | | | | | | | | As of board revision 1, there is a GPIO to enable Vbus for the type-A port. Turn this GPIO on when we're booted, and off when the system is shut down. This pin is NC on revision 0, so it should be fine to set regardless of hardware version. BRANCH=None BUG=b:160336151 TEST=on waddledee rev 1, able to use flash drive plugged into MB Signed-off-by: Diana Z <dzigterman@chromium.org> Change-Id: Idc1ae5fd05b904b01bc56bd8dd2a69d34caee9ef Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2283943 Tested-by: Karthikeyan Ramasubramanian <kramasub@chromium.org> Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
* Waddledee: Configure EN_BL_OD as open drainDiana Z2020-07-071-1/+1
| | | | | | | | | | | | BRANCH=None BUG=b:160362315 TEST=on waddledee proto 1, no leakage is observed on PP3300_SOC_A Signed-off-by: Diana Z <dzigterman@chromium.org> Change-Id: I4ec568d77b80343a958d486a84dbda93a4f7c423 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2278598 Reviewed-by: Aseda Aboagye <aaboagye@chromium.org> Tested-by: Will Arthur <wda@google.com>
* DEDEDE: Increase board PD stack sizesSam Hurst2020-07-071-3/+3
| | | | | | | | | | | | | Increase dedede board PD stack sizes to prevent overflow. BRANCH=none BUG=b:155813111 TEST=make -j buildall Signed-off-by: Sam Hurst <shurst@google.com> Change-Id: I061bf8e53c0f2dfe8ca5617f562bd99ed510d467 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2283693 Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
* boten: use charger/TCPC RAA48900xiong.huang2020-06-141-0/+1
| | | | | | | | | | | | | | | Use charger/TCPC RAA48900 instead of TCPC IT8320 + charger SM5803 combination at MB side. BUG=b:157626290, b:158023819 BRANCH=none TEST=make buildall -j Signed-off-by: xiong.huang <xiong.huang@bitland.corp-partner.google.com> Change-Id: Ibb97a41e1d280da7c92cf2c00202b5eb205f99b3 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2239599 Reviewed-by: Diana Z <dzigterman@chromium.org> Commit-Queue: Diana Z <dzigterman@chromium.org>
* boten: remove DB type-C port and peripheral chipsxiong.huang2020-06-111-0/+7
| | | | | | | | | | | | | | | | | Remove chips: Charge chip - SM5803 TCPC and USB mux chip - ANX7447 USB retimer chip - TUSB544 BC1.2 chip - PI3USB9201 BUG=b:157626290, b:158023819 BRANCH=none TEST=make buildall -j Signed-off-by: xiong.huang <xiong.huang@bitland.corp-partner.google.com> Change-Id: Iac30f683774368b2b5706c5f804caf549a54139a Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2235238 Reviewed-by: Diana Z <dzigterman@chromium.org>
* Waddledee: Remove 5V input limit for board rev 1Diana Z2020-06-012-5/+4
| | | | | | | | | | | | | | | Removes 5V input limit for board revision 1, while keeping it in place for revision 0 for now. BRANCH=None BUG=b:153594748 TEST=on waddledee rev 0, ensure 5V is requested when a charger is plugged in Signed-off-by: Diana Z <dzigterman@chromium.org> Change-Id: Id7aa6e4ce5e7746ec531725ea7ba5d2599fecdfc Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2222962 Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
* Waddledee: Set up C1 interrupt line for board rev 1Diana Z2020-05-302-5/+15
| | | | | | | | | | | | | | | The C1 interrupt line is swapped between board versions 0 and 1. Track which line is correct for the board version in a variable. Note that this commit would not allow the pen charging line to output correctly. BRANCH=None BUG=b:153684907 TEST=on waddledee version 0, ensure C1 still works Signed-off-by: Diana Z <dzigterman@chromium.org> Change-Id: Ie07052b8b27c219505da5f463d6846a18b08e6a5 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2220450 Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
* waddledee/waddledoo: Mark BC1.2 as always poweredAseda Aboagye2020-05-291-0/+2
| | | | | | | | | | | | | | | | | | | | This commit enables the PI3USB9201_ALWAYS_POWERED flag for the PI3USB9201 BC1.2 chip. In these designs, these parts are always powered so there's no need to explicitly enable a 5V rail. This was causing Type-A ports to turn on whenever a charger was plugged in. BUG=b:151688130, b:150814620 BRANCH=None TEST=Build and flash waddledoo, verify that Type-A ports are not powered when a charger is plugged in in S5/G3. Signed-off-by: Aseda Aboagye <aaboagye@google.com> Change-Id: Ic478c59e96854633a34f510e9494b908ab01ed7c Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2219271 Tested-by: Aseda Aboagye <aaboagye@chromium.org> Auto-Submit: Aseda Aboagye <aaboagye@chromium.org> Reviewed-by: Diana Z <dzigterman@chromium.org> Commit-Queue: Aseda Aboagye <aaboagye@chromium.org>
* Waddledee: configure ECH1_PACKET_MODEDiana Z2020-05-211-0/+1
| | | | | | | | | | | | | | This GPIO will be used for communication with the cr50 when EFS2 is enabled. BRANCH=None BUG=b:156785198 TEST=make -j buildall, waddledee boots Signed-off-by: Diana Z <dzigterman@chromium.org> Change-Id: Ia1193bf61995ec0f1892a753570f28eaba64ab26 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2210863 Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
* PD: Remove unnecessary PDCMD taskDiana Z2020-05-201-1/+0
| | | | | | | | | | | | | | | | | | | The PDCMD task is only pulling interrupts from the TCPCs on most boards, which is unnecessary since the PD_INT tasks handle this job now. Remove it from any boards using the PD_INT command which are not using the older CONFIG_HOSTCMD_PD functionality (ex. samus, oak). Located boards using: find -name "ec.tasklist" | xargs grep -l PD_INT | xargs grep PDCMD BRANCH=None BUG=b:154959596 TEST=make -j buildall Signed-off-by: Diana Z <dzigterman@chromium.org> Change-Id: I29be8ab1d7a2616603fb55236aed4329ed8654f5 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2208221 Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
* Waddledee: Improve shared interrupt line behaviorDiana Z2020-05-151-2/+58
| | | | | | | | | | | | | | | | | | | When interrupts are interleaved from the TCPC and charger, we can get into a state where the interrupt line for the board ends up stuck low. Improve on this situation by setting a deferred function to check on the interrupt line after we get a signal in, and notify chips on that line there may be more to process. BRANCH=None BUG=b:143166332 TEST=on waddledee, plug in powered PD hub to C1, generating interrupts from both the charger and TCPC and verify C1 interrupt line goes high once connection is ready Signed-off-by: Diana Z <dzigterman@chromium.org> Change-Id: I4eda56d656a309f7aa762bba6476bb3c981e4bc7 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2197949 Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
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