| Commit message (Collapse) | Author | Age | Files | Lines |
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
| |
Google is working to change its source code to use more inclusive
language. To that end, replace the terms "sane", "sanity check", and
similar with inclusive/non-stigmatizing alternatives.
BUG=b:161832469
BRANCH=None
TEST=`make buildall -j` succeeds. `grep -Eir "sane|sanity" .` shows
results only in third-party code or documentation.
Signed-off-by: Paul Fagerburg <pfagerburg@chromium.org>
Change-Id: I29e78ab27f84f17b1ded75cfa10868fa4e5ae88c
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2311169
Reviewed-by: Jett Rink <jettrink@chromium.org>
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
| |
Duplicate of: https://chromium-review.googlesource.com/1089823
for remaining boards not covered by
https://chromium-review.googlesource.com/2242352
BUG=b:158792057
TEST=make -j buildall
BRANCH=asurada,octopus
Change-Id: Ic3ae36629d75ff20e96910c107e67f933fa4cce5
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2242396
Commit-Queue: Jes Klinke <jbk@chromium.org>
Tested-by: Jes Klinke <jbk@chromium.org>
Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
| |
The PDCMD task is only pulling interrupts from the TCPCs on most boards,
which is unnecessary since the PD_INT tasks handle this job now.
Remove it from any boards using the PD_INT command which are not using
the older CONFIG_HOSTCMD_PD functionality (ex. samus, oak).
Located boards using:
find -name "ec.tasklist" | xargs grep -l PD_INT | xargs grep PDCMD
BRANCH=None
BUG=b:154959596
TEST=make -j buildall
Signed-off-by: Diana Z <dzigterman@chromium.org>
Change-Id: I29be8ab1d7a2616603fb55236aed4329ed8654f5
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2208221
Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
|
|
|
|
|
|
|
|
|
|
|
|
|
|
| |
The action_delay_sec field hasn't actually been referenced by
any code since 2013. Removing the corresponding struct field.
BUG=None
BRANCH=None
TEST=builds
Change-Id: Ia7334c26b85d0161ff61bb51fbdda61bb921595a
Signed-off-by: Diana Z <dzigterman@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2054945
Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
| |
Required by Android CDD - Section 7.3.1 - Paragraph C.1.4
Modified mechanically with:
for i in $(grep -lr "\.default_range" board); do
sed -i '/.default_range =/s#\(.*\.default_range = \).* /\
\* g.*#\14, /* g, to meet CDD 7.3.1/C-1-4 reqs */#' $i
done
Manually reworked to only change the accelerometer that matters to
android:
The lid accelerometer or the base accelerometer if the base also hosts
the gyroscope.
This is only for future EC, no need to land the change on branches:
mems_setup will take care to set accelerometer ranges at 4g on startup.
BUG=b:144004449
BRANCH=none
TEST=compile
Change-Id: If8c14b2e928c9c70c0ce51451adcfcd674a9e73b
Signed-off-by: Gwendal Grignou <gwendal@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1957375
Reviewed-by: Justin TerAvest <teravest@chromium.org>
Reviewed-by: Alexandru M Stan <amstan@chromium.org>
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
| |
On some boards, min_/max_frequency attributes were not set, esp. for
kx022 acceleometers.
BUG=b:145799480
BRANCH=octopus,coral
TEST=compile
Change-Id: I6d32926541505f02f183539ca3ad9f70c1ae7a6b
Signed-off-by: Gwendal Grignou <gwendal@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1957374
Reviewed-by: Justin TerAvest <teravest@chromium.org>
Tested-by: Justin TerAvest <teravest@chromium.org>
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
| |
This change refactors the lsm6dsm to allow building without the
use of the FIFO or sensor interrupts.
BUG=None
BRANCH=None
TEST=make buildall
Change-Id: I5b338d81061f25fd1c8209b4555f63ea4d8b2dbc
Signed-off-by: Yuval Peress <peress@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1916679
Reviewed-by: Jack Rosenthal <jrosenth@chromium.org>
Auto-Submit: Leifu Zhao <leifu.zhao@intel.corp-partner.google.com>
Commit-Queue: Jack Rosenthal <jrosenth@chromium.org>
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
| |
Certain SKUs of certain boards have lesser number of USB PD ports than
defined by CONFIG_USB_PD_PORT_COUNT. Hence rename
CONFIG_USB_PD_PORT_COUNT as CONFIG_USB_PD_PORT_MAX_COUNT.
BUG=b:140816510, b:143196487
BRANCH=octopus
TEST=make -j buildall; Boot to ChromeOS
Change-Id: I7c33b27150730a1a3b5813b7b4a72fd24ab73c6a
Signed-off-by: Karthikeyan Ramasubramanian <kramasub@google.com>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1879337
Tested-by: Karthikeyan Ramasubramanian <kramasub@chromium.org>
Reviewed-by: Jett Rink <jettrink@chromium.org>
Commit-Queue: Jett Rink <jettrink@chromium.org>
|
|
|
|
|
|
|
|
|
|
|
|
|
| |
BRANCH=octopus
BUG=b:142953493
TEST=verify that later modification of gpio flag will no allow driving
signal high.
Change-Id: I0b8c1503ba8c03afa3eb6fa4f921b3480106f05b
Signed-off-by: Jett Rink <jettrink@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1869407
Commit-Queue: Edward Hill <ecgh@chromium.org>
Reviewed-by: Edward Hill <ecgh@chromium.org>
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
| |
GMR sensors can be used to
(1) detect clamshell/tablet mode
(2) detect lid open/closed
But hall sensors can only do (2).
Therefore the naming related to "hall sensor" for tablet mode
application is incorrect.
This patch performs the following renaming to better reflect the reality:
config:
CONFIG_HALL_SENSOR -> CONFIG_GMR_TABLET_MODE
CONFIG_HALL_SENSOR_CUSTOM -> CONFIG_GMR_TABLET_MODE_CUSTOM
CONFIG_DPTF_MOTION_LID_NO_HALL_SENSOR ->
CONFIG_DPTF_MOTION_LID_NO_GMR_SENSOR
GPIO:
HALL_SENSOR_GPIO_L -> GMR_TABLET_MODE_GPIO_L
functions:
hall_sensor_disable() -> gmr_tablet_switch_disable()
hall_sensor_isr() -> gmr_tablet_switch_isr()
hall_sensor_int() -> gmr_tablet_switch_init()
variable:
hall_sensor_at_360 -> gmr_sensor_at_360
BUG=b:139378190
BRANCH=none
TEST=make buildall
Change-Id: I28393d056ddd128d8ffafc16a1f9fefee5455ccc
Signed-off-by: Philip Chen <philipchen@google.com>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1757275
Reviewed-by: Furquan Shaikh <furquan@chromium.org>
Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
Commit-Queue: Philip Chen <philipchen@chromium.org>
Tested-by: Philip Chen <philipchen@chromium.org>
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
| |
The extentions were added to make the compiler perform most
of the verification that the conversion was being done correctly
to remove 8bit addressing as the standard I2C/SPI address type.
Now that the compiler has verified the code, the extra
extentions are being removed
BUG=chromium:971296
BRANCH=none
TEST=make buildall -j
TEST=verify sensor functionality on arcada_ish
Change-Id: I36894f8bb9daefb5b31b5e91577708f6f9af2a4f
Signed-off-by: Denis Brockus <dbrockus@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1704792
Reviewed-by: Jack Rosenthal <jrosenth@chromium.org>
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
| |
Opt for 7bit slave addresses in EC code. If 8bit is
expected by a driver, make it local and show this in
the naming.
Use __7b, __7bf and __8b as name extensions for i2c/spi
addresses used in the EC codebase. __7b indicates a
7bit address by itself. __7bf indicates a 7bit address
with optional flags attached. __8b indicates a 8bit
address by itself.
Allow space for 10bit addresses, even though this is
not currently being used by any of our attached
devices.
These extensions are for verification purposes only and
will be removed in the last pass of this ticket. I want
to make sure the variable names reflect the type to help
eliminate future 7/8/7-flags confusion.
BUG=chromium:971296
BRANCH=none
TEST=make buildall -j
Change-Id: I2fc3d1b52ce76184492b2aaff3060f486ca45f45
Signed-off-by: Denis Brockus <dbrockus@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1699893
Reviewed-by: Jack Rosenthal <jrosenth@chromium.org>
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
| |
This changes allows each board to add a custom configuration for the
sensors. In this case particularly setting the GPIO enum that is used
for the interrupt signal in the lsm6dsm.
BUG=b:129159505
BRANCH=arcada
TEST=I ran `make buildall` since this change isn't used yet it doesn't
affect run-time behavior.
Change-Id: I4a2d5e097d5fd8a45af591a24c4e6e917865a093
Signed-off-by: Yuval Peress <peress@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/1621747
Legacy-Commit-Queue: Commit Bot <commit-bot@chromium.org>
Reviewed-by: Jett Rink <jettrink@chromium.org>
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
| |
Now we have led_onoff_states instead of led_state of baseboard, to avoid
duplicate file so move forward to common code.
BUG=b:126460269
BRANCH=none
TEST=make buildall -j, make sure led behavior on meep intended as well.
Change-Id: I3adf20ebf2efd2f02b1ae101faf1c36f2f5ed454
Signed-off-by: Devin Lu <Devin.Lu@quantatw.com>
Reviewed-on: https://chromium-review.googlesource.com/1556869
Commit-Ready: ChromeOS CL Exonerator Bot <chromiumos-cl-exonerator@appspot.gserviceaccount.com>
Reviewed-by: Marco Chen <marcochen@chromium.org>
Reviewed-by: Paul Fagerburg <pfagerburg@chromium.org>
Reviewed-by: Diana Z <dzigterman@chromium.org>
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
| |
It's simply a bad idea to describe a macro in multiple locations.
It'll make it hard to change. It'll be difficult to keep all
locations in sync.
This patch replaces the comment duplicated in all ec.tasklist with
a pointer to the CONFIG_TASK_LIST definition. The macro will be
described in a single place (just like all/most other macros).
Signed-off-by: Daisuke Nojiri <dnojiri@chromium.org>
BUG=none
BRANCH=none
TEST=buildall
Change-Id: Id658b9d68e742e4334c692b804d9c98c8de21313
Reviewed-on: https://chromium-review.googlesource.com/1551579
Commit-Ready: ChromeOS CL Exonerator Bot <chromiumos-cl-exonerator@appspot.gserviceaccount.com>
Tested-by: Daisuke Nojiri <dnojiri@chromium.org>
Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org>
Reviewed-by: Jett Rink <jettrink@chromium.org>
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
| |
Mechanical replacement of bit operation where operand is a constant.
More bit operation exist, but prone to errors.
Reveal a bug in npcx:
chip/npcx/system-npcx7.c:114:54: error: conversion from 'long unsigned int' to 'uint8_t' {aka 'volatile unsigned char'} changes value from '16777215' to '255' [-Werror=overflow]
BUG=None
BRANCH=None
TEST=None
Change-Id: I006614026143fa180702ac0d1cc2ceb1b3c6eeb0
Signed-off-by: Gwendal Grignou <gwendal@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/1518660
Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org>
|
|
|
|
|
|
|
|
|
|
|
|
|
|
| |
Define macros to define custom events used by sensor interrupt handlers.
Remove CONFIG_ for activity events.
BUG=none
BRANCH=none
TEST=compile, sensors work on eve.
Change-Id: I08ef6ed2a004466ebc5f7650d6952a150b9de713
Signed-off-by: Gwendal Grignou <gwendal@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/1272189
Reviewed-by: Jett Rink <jettrink@chromium.org>
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
| |
- Cros set_rate and normalize between LIS2MDL and LSM6DSM
- Remove unused sensor hub function.
- Remove parent field, use macro instead (magnetometer is just after the
gyroscope).
BUG=b:110143516,b:115587004
BRANCH=none
TEST=On meep, check the magnetometer is returning data with shell/python
script.
Check calibration quick in.
Check with AIDA64, compass and sensor app the magnetometer is seen.
Change-Id: I2efef99eda095e33b6a0555b1cbc4ac8fdbfab5d
Signed-off-by: Gwendal Grignou <gwendal@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/1361992
Reviewed-by: Justin TerAvest <teravest@chromium.org>
Trybot-Ready: Justin TerAvest <teravest@chromium.org>
Tested-by: Justin TerAvest <teravest@chromium.org>
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
| |
BUG=none
TEST=compile, check with git diff -w there is no changes.
Check sensors still works on meep.
BRANCH=none
Change-Id: Id3176e21a8e7ba19a0525e00b141c3fdc50c4660
Signed-off-by: Gwendal Grignou <gwendal@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/1361991
Tested-by: Karthikeyan Ramasubramanian <kramasub@chromium.org>
Commit-Queue: ChromeOS CL Exonerator Bot <chromiumos-cl-exonerator@appspot.gserviceaccount.com>
Reviewed-by: Diana Z <dzigterman@chromium.org>
Reviewed-by: Karthikeyan Ramasubramanian <kramasub@chromium.org>
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
| |
Range of 250/1000/2000 dps is an approximation.
The Gyrscope uses a slighly higher range:
range | gain(udps/LSB) | actual value(dps)
250 | 8750 | 286.72
500 | 17500 | 573.44
1000 | 35000 | 1146.88
2000 | 70000 | 2293.76
Returns the actual value for a given range.
BUG=b:121279721
BRANCH=octopus
TEST=Check scale returns the correct value:
cd /sys/bus/iio/devices/...
for i in 250 500 1000 2000 ; do echo $i > scale ; V=$(cat scale) ; echo
-n "$i: " ; echo -n "$V: " ; echo $V | python -c 'import sys
for line in sys.stdin:
print float(line) * 32768 * 180 / 3.14159' ; done
250: 0.000152331: 285.996835182
500: 0.000305197: 572.998116648
1000: 0.000610395: 1145.99811077
2000: 0.001221325: 2293.00066781
Check CTS Verifier Gyroscope Measurement Test pass.
Change-Id: I76c977140321d01702af16f58a3dfb7036673014
Signed-off-by: Gwendal Grignou <gwendal@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/1423597
Reviewed-by: Enrico Granata <egranata@chromium.org>
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
| |
Add board_overcurrent_event function to notify SoC about USB-C
overcurrent events.
BUG=b:115475862
BRANCH=octopus
TEST=Boot to ChromeOS in grabbiter. No overcurrent events reported when
the sink is drawing <= 3.20 A. Overcurrent events are reported when the
sink is drawing > 3.25 A. After 3 reports, the port is latched off and
power delivery is stopped. The port is re-enabled only after the sink is
disconnected. Also when the sink is drawing current at 3.24 A, there is
one report of overcurrent. The port gets disabled in response to that
event. But the port is re-enabled after 1 second since overcurrent event
is reported only once. After the port is re-enabled, the sink is able to
draw the set current. When the overcurrent event is reported, I can see in
the kernel logs that the overcurrent condition is detected by the kernel.
EC Logs:
[3391.984462 C1: PPC detected Vbus overcurrent!]
[3391.984953 C1: overcurrent!]
[3392.044935 C1: PPC detected Vbus overcurrent!]
[3392.045425 C1: overcurrent!]
[3392.061404 C1: PPC detected Vbus overcurrent!]
[3392.061894 C1: overcurrent!]
[3392.062142 C1: OC event limit reached! Source path disabled until
physical disconnect.]
[3392.077226 C1: PPC detected Vbus overcurrent!]
[3392.077532 C1: overcurrent!]
[3392.077891 C1: OC event limit reached! Source path disabled until
physical disconnect.]
[3392.092660 C1: PPC detected Vbus overcurrent!]
[3392.092966 C1: overcurrent!]
[3392.093213 C1: OC event limit reached! Source path disabled until
physical disconnect.]
Kernel Logs:
[ 3356.560456] usb usb2-port1: over-current condition
[ 3356.768434] usb usb2-port2: over-current condition
[ 3356.976446] usb usb2-port4: over-current condition
[ 3357.184441] usb usb2-port5: over-current condition
[ 3357.392445] usb usb2-port6: over-current condition
Change-Id: I69fdc473a3489922517dc91fc1ea149aabca01cb
Signed-off-by: Karthikeyan Ramasubramanian <kramasub@google.com>
Reviewed-on: https://chromium-review.googlesource.com/1410142
Commit-Ready: Karthikeyan Ramasubramanian <kramasub@chromium.org>
Tested-by: Karthikeyan Ramasubramanian <kramasub@chromium.org>
Reviewed-by: Jett Rink <jettrink@chromium.org>
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
| |
Recent kernel changes expect the EC to use a dedicated interrupt pin
from the EC to the AP to notify the AP of pending sensor data (instead
of using an eSPI "interrupt").
The octopus boards have this hardware support, we just need to enable
the EC use it.
BRANCH=octopus
BUG=b:122552125,b:120679547
TEST=perform sensor tests on various octopus boards
Change-Id: I2bd3ffe14947d5f1ec71acbb53fcac962b007cf9
Signed-off-by: Jett Rink <jettrink@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/1403103
Reviewed-by: Enrico Granata <egranata@chromium.org>
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
| |
Too large of a FIFO causes jitter in the sensor timestamp which can
cause issues during batch CTS tests.
BRANCH=octopus
BUG=b:120508077
TEST=everything builds. Test with smaller fifo were done on bobba. See
CL:1387348
Change-Id: If67a46faa6e136006a20ac243b826b7ce06d9868
Signed-off-by: Jett Rink <jettrink@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/1392425
Commit-Ready: ChromeOS CL Exonerator Bot <chromiumos-cl-exonerator@appspot.gserviceaccount.com>
Reviewed-by: Karthikeyan Ramasubramanian <kramasub@chromium.org>
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
| |
Based on task analysis for fleex, all npcx octopus boards are having
their tasks increased to VENTI size, with the exception of the USB_CHG
and KEYPROTO tasks, which appear to be doing well as-is.
BUG=b:112309201
BRANCH=octopus
TEST=builds, runs on fleex and phaser, fleex stack analysis looks better
Change-Id: I68971cfe2e1dbaf8b83f9ef13bfeb4786b32dbc6
Signed-off-by: Diana Z <dzigterman@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/1368009
Reviewed-by: Jett Rink <jettrink@chromium.org>
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
| |
This will help with using the hardware support to reset the RTC on the
SoC.
BUG=b:119678692
BRANCH=octopus
TEST=make -j buildall && Boot to ChromeOS. Create a forced scenario to
trigger an RTC reset and ensure that EC does not get reset while the SoC
boots to ChromeOS. Execute warm reboot from AP, cold reboot from EC and
wake from ec hibernate (10 iterations each) and suspend_stress_test for
50 iterations successfully.
Change-Id: Ib79012b43e397d4c27ca829b135115bebf77dedb
Signed-off-by: Karthikeyan Ramasubramanian <kramasub@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/1354493
Reviewed-by: Furquan Shaikh <furquan@chromium.org>
Reviewed-by: Jett Rink <jettrink@chromium.org>
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
| |
This change updates motion_lid driver to use CONFIG_TABLET_MODE to
decide if device requires reporting of tablet mode. This basically
makes the config options CONFIG_LID_ANGLE_INVALID_CHECK and
CONFIG_LID_ANGLE_TABLET_MODE obsolete. Now that EC will always report
tablet mode aligned with Chrome (at 180 degree), any device that
supports tablet mode and uses motion lid driver will require this by
default and should not require boards to individually select any
special config options. Thus, it also gets rid of unused
CONFIG_LID_ANGLE_TABLET_MODE and CONFIG_LID_ANGLE_INVALID_CHECK.
BUG=b:120050761
BRANCH=octopus
TEST=make -j buildall
Change-Id: Ib73af66ca1c17d4033cf54f0b4b86bf41793f3a3
Signed-off-by: Furquan Shaikh <furquan@google.com>
Reviewed-on: https://chromium-review.googlesource.com/1350470
Commit-Ready: Furquan Shaikh <furquan@chromium.org>
Tested-by: Furquan Shaikh <furquan@chromium.org>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-by: Jett Rink <jettrink@chromium.org>
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
| |
This change performs the following renaming:
1. CONFIG_TABLET_SWITCH -> CONFIG_HALL_SENSOR
Indicates if a device has hall sensor
2. TABLET_MODE_GPIO_L -> HALL_SENSOR_GPIO_L
Provides the interrupt line from hall sensor to EC.
3. tablet_mode_isr -> hall_sensor_isr
Interrupt routine that gets control on hall sensor interrupt.
4. tablet_mode_init -> hall_sensor_init
Init routine for initializing hall sensor interrupt.
5. tablet_switch_disable -> hall_sensor_disable
Disable hall sensor interrupt and tablet mode sub-system.
This is done to separate hall sensor interrupt from tablet mode
handling. It is another step towards aligning tablet mode detection on
EC with Chrome. Hall sensor interrupt occurs when the lid is in
360-degree flipped mode. If tablet mode is not already triggered by
lid motion driver, then hall_sensor_isr will set tablet mode and take
necessary actions to disable input peripherals.
CQ-DEPEND=CL:1351518
BUG=b:120050761
BRANCH=octopus
TEST=make -j buildall
Change-Id: I5841f6875d538a624cb888bc048f252397ab457c
Signed-off-by: Furquan Shaikh <furquan@google.com>
Reviewed-on: https://chromium-review.googlesource.com/1350469
Commit-Ready: Furquan Shaikh <furquan@chromium.org>
Tested-by: Furquan Shaikh <furquan@chromium.org>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-by: Jett Rink <jettrink@chromium.org>
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
| |
All boards but yorp have added the ADC hardware support back for VBUS
ADC measurements. Move code to common baseboard
BRANCH=none
BUG=none
TEST=ADC measurements still works on phaser and fleex
Change-Id: I36a7ba92df21de4c1188613c6a12da83fdba6eb6
Signed-off-by: Jett Rink <jettrink@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/1337456
Commit-Ready: ChromeOS CL Exonerator Bot <chromiumos-cl-exonerator@appspot.gserviceaccount.com>
Reviewed-by: Karthikeyan Ramasubramanian <kramasub@chromium.org>
Reviewed-by: Diana Z <dzigterman@chromium.org>
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
| |
The base gyro and base accel are the same chip and they are on in S3 and
S0 and off in S5. Update the active_make for all other octopus boards
that haven't already updated it.
BRANCH=none
BUG=none
TEST=build and sensors still work.
Change-Id: I96004ba0b20dd9366848bb2fe610c250e07850aa
Signed-off-by: Jett Rink <jettrink@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/1302833
Commit-Ready: ChromeOS CL Exonerator Bot <chromiumos-cl-exonerator@appspot.gserviceaccount.com>
Reviewed-by: Karthikeyan Ramasubramanian <kramasub@chromium.org>
Reviewed-by: Diana Z <dzigterman@chromium.org>
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
| |
This change adds a call to the C0 TCPC reset for standalone TCPC boards
which have that pin hooked up in hardware, and adds the GPIO as
unimplemented for boards which do not have this yet.
BRANCH=None
BUG=b:112756630
TEST=Added a log print and rebooted EC on bobba to verify TCPC C0 reset,
then verified that charging on C0 worked. Also imaged yorp proto 2 and
rebooted, verifying C0 reset was not attempted.
Change-Id: I615861f0d9ce9b5a89692e3982ed2e19c7e0b237
Signed-off-by: Diana Z <dzigterman@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/1257647
Reviewed-by: Jett Rink <jettrink@chromium.org>
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
| |
For all NPCX boards, remove the CONFIG_SYSTEM_UNLOCKED option. The main
affect of this will be to prevent PD communication in RO. We are
starting to get into factory test that want to verify this behavior. As a
developer, one must remember to jump to RW before PD will negotiate.
BRANCH=none
BUG=b:117109816
TEST=flash on fleex and RO did not negotiate (when WP was asserted)
but RW did.
Change-Id: I2df575baad95a334a4a57a9f81600fc039157fd5
Signed-off-by: Jett Rink <jettrink@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/1258568
Commit-Ready: ChromeOS CL Exonerator Bot <chromiumos-cl-exonerator@appspot.gserviceaccount.com>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-by: Furquan Shaikh <furquan@chromium.org>
Reviewed-by: Scott Collyer <scollyer@chromium.org>
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
| |
The MAX14637 BC 1.2 USB charger detection chip is functionally similar
to the bq24392 and can use the same driver. Rather than have 2 copies
of the same driver, or a generic named driver than can be used for
both chips, rename the existing bq24392 driver to max14637 as that's
the BC 1.2 chip that our current designs are using.
BUG=b:113267982
BRANCH=none
TEST=make -j buildall
Change-Id: I03cfb4918513d756c2a41341001a8162652a29b6
Signed-off-by: Scott Collyer <scollyer@google.com>
Reviewed-on: https://chromium-review.googlesource.com/1250031
Commit-Ready: Scott Collyer <scollyer@chromium.org>
Tested-by: Scott Collyer <scollyer@chromium.org>
Reviewed-by: Edward Hill <ecgh@chromium.org>
Reviewed-by: Jett Rink <jettrink@chromium.org>
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
| |
This change adds CCD_MODE_ODL as an input for all octopus boards so it
will be present in the "gpioget" output for debugging.
BRANCH=None
BUG=b:116849648
TEST=builds, confirmed net showed up on bip and yorp proto 2
Change-Id: I0da194e433444f160f10573c27e5e463694adf38
Signed-off-by: Diana Z <dzigterman@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/1254923
Reviewed-by: Jett Rink <jettrink@chromium.org>
Reviewed-by: Justin TerAvest <teravest@chromium.org>
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
| |
Meep and Mimrock use same mother board,
Mimrock is clamshell sku only have Charge LED.
To meet LED spec:
System without Power LED, Suspend/S0ix without charge
blink White on Charge LED(1 sec on, 1 sec off).
BUG=none
BRANCH=none
TEST=manual
Set cbi sku id to clamshell sku,
Check Charge LED will blink(1 sec on, 1 sec off),
when system is Suspend/S0ix without charge.
Change-Id: Ib443d6176d929aad4b65c1cb0d4b40c102e6f67e
Signed-off-by: Zick Wei <zick.wei@quanta.corp-partner.google.com>
Reviewed-on: https://chromium-review.googlesource.com/1226830
Reviewed-by: Jett Rink <jettrink@chromium.org>
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
| |
All NPCX variants support PSL mode in hardware now; enable this at the
baseboard level.
This is adding support for Bobba; other boards are unaffected
BRANCH=none
BUG=b:115677776
TEST=bobba goes into PSL
Change-Id: I38974371b101c42841e4f11ba72b466415c754d9
Signed-off-by: Jett Rink <jettrink@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/1227050
Commit-Ready: ChromeOS CL Exonerator Bot <chromiumos-cl-exonerator@appspot.gserviceaccount.com>
Reviewed-by: Justin TerAvest <teravest@chromium.org>
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
| |
Naming of many vector types and matrix types are not clear enough.
For example, we have:
vector_3_t, which is a vector of three int.
vec3_t, which is a vector of three float.
size4_t, which is a vector of four size_t.
mat33_t, which is a 3x3 matrix of float.
matrix_3x3_t, which is a 3x3 matrix of fixed point.
Besides, we have types like int8_t, uint16_t types.
To clearly distinguished types, the CL propose to,
For vector types, naming should be `$type + 'v' + $num + '_t'`:
vector_3_t becomes intv3_t
vec3_t becomes floatv3_t
vector 4 of uint16_t becomes uint16v4_t (which doesn't exist yet)
For matrix types, naming should be `mat$N$N_` + $type + '_t', where $N is the
matrix size:
matrix_3x3_t becomes mat33_fp_t # fp: fixed point
mat33_t becomes mat33_float_t
TEST=make buildall -j
BUG=b:114662791
Change-Id: I51d88d44252184e4b7b3564236833b0b892edc39
Signed-off-by: Yilun Lin <yllin@google.com>
Reviewed-on: https://chromium-review.googlesource.com/1215449
Commit-Ready: Yilun Lin <yllin@chromium.org>
Tested-by: Yilun Lin <yllin@chromium.org>
Reviewed-by: Nicolas Boichat <drinkcat@chromium.org>
|
|
|
|
|
|
|
|
|
|
|
|
|
|
| |
See go/usb-pd-slow-response-time for more information
BRANCH=none
BUG=b:112088135
TEST=CL stack on fleex and bobba consistently meet PD timing spec
Change-Id: I9eabf8de8d866f5a0af7d1daba5ab585b418d26c
Signed-off-by: Jett Rink <jettrink@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/1185729
Reviewed-by: Jonathan Brandmeyer <jbrandmeyer@chromium.org>
Reviewed-by: Diana Z <dzigterman@chromium.org>
|
|
|
|
|
|
|
|
|
|
|
|
|
|
| |
All of the octopus board define the table mode option the same, so move
them into baseboard.
BRANCH=none
BUG=none
TEST=fleex still works
Change-Id: Ibed874a609a2e5947d7aee39f915dc3046a0cc19
Signed-off-by: Jett Rink <jettrink@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/1204700
Reviewed-by: Furquan Shaikh <furquan@chromium.org>
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
| |
All octopus boards should have this enabled by now. We are consolidating
this option in octopus baseboard.
This turns on DPTF on:
- Fleex
This turns on DPTP_DEVICE_ORIENTATION on:
- Bip
- Bobba
- Fleex
BRANCH=none
BUG=b:113348027
TEST=fleex has tablet mode icon
Change-Id: I0d25895785c6a8fcce25b3b6bf587b6030119045
Signed-off-by: Jett Rink <jettrink@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/1204699
Reviewed-by: Furquan Shaikh <furquan@chromium.org>
Reviewed-by: Justin TerAvest <teravest@chromium.org>
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
| |
This CL doesn't change any functionality, but renames the driver from
3483 to 348x. The motivation for this is that we need to support the
NX20P3481 PPC as well. Those chips use the same registers, but the
3481 adds FRS support and sink/source control is done via I2C writes
instead of gpio controls.
Because the chips are slighlty different the config option
CONFIG_USBC_PPC_NX20P3483 needs to remain.
BUG=b:111281797
BRANCH=none
TEST=make -j buildall
Change-Id: Ie1085140eb2ef23c0b6e1a79a6f2d7f823326c6d
Signed-off-by: Scott Collyer <scollyer@google.com>
Reviewed-on: https://chromium-review.googlesource.com/1176382
Commit-Ready: Scott Collyer <scollyer@chromium.org>
Tested-by: Scott Collyer <scollyer@chromium.org>
Reviewed-by: Jett Rink <jettrink@chromium.org>
|
|
|
|
|
|
|
|
|
|
|
|
|
|
| |
The Base sensor power is off in S5. Update the mask so we re-initialize
the sensor upon S3 entry.
BRANCH=none
BUG=b:111727977
TEST=verified on phaser via CL:1148179, which has same power topology
Change-Id: I67e37a92df876657c6ce7044a19070116da41129
Signed-off-by: Jett Rink <jettrink@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/1150206
Reviewed-by: Justin TerAvest <teravest@chromium.org>
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
| |
The bip board has had issues with running out of task space in the
USB_CHG_P[0,1] tasks when it runs into I2C errors and needs to run
resets. Performing a full stack analysis should happen when the
firmware branches for octopus, but for now this change increases the
stack sizes for all of the USB_CHG_P[0,1] tasks.
BRANCH=None
BUG=b:111840286
TEST=builds, bip no longer hit stack overflows with the larger space
during i2c resets
Change-Id: Ib10e052bb89202cbedfe23345c8335f1e0a8e16b
Signed-off-by: Diana Z <dzigterman@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/1167653
Reviewed-by: Jett Rink <jettrink@chromium.org>
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
| |
When the charge is in idle mode LED array is out of bound hence
there is potential panic. Fill the LED array to defined number
of LED states.
BUG=b:111913899
BRANCH=none
TEST=Manually tested on yorp
"chgstate discharge on" doesn't panic anymore
Change-Id: Ib9c52b68b0ec9440911f15b6c09e8505b2b20e95
Signed-off-by: Vijay Hiremath <vijay.p.hiremath@intel.com>
Reviewed-on: https://chromium-review.googlesource.com/1153782
Commit-Ready: Jett Rink <jettrink@chromium.org>
Reviewed-by: Jett Rink <jettrink@chromium.org>
|
|
|
|
|
|
|
|
|
|
|
|
|
| |
We haven't used them yet, so we are removing them.
BRANCH=none
BUG=b:78638238
TEST=everything still builds.
Change-Id: I21aaf060073f3daa6f18a8202c0b7ba98ce9b018
Signed-off-by: Jett Rink <jettrink@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/1152363
Reviewed-by: Justin TerAvest <teravest@chromium.org>
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
| |
Reference LED behavior spec and implement it.
Add Power LED common code.
Yorp and bip also do some necessary charges.
BUG=b:80501031,b:110086152
BRANCH=none
TEST=Verify LED behavior at different power state.
Change-Id: I88dbad30101e7983304c15f88b52b31457607749
Signed-off-by: eddylu <eddylu@ami.corp-partner.google.com>
Reviewed-on: https://chromium-review.googlesource.com/1116628
Commit-Ready: Eddy Lu <eddylu@ami.corp-partner.google.com>
Tested-by: Eddy Lu <eddylu@ami.corp-partner.google.com>
Reviewed-by: Jett Rink <jettrink@chromium.org>
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
| |
This CL enables PSL mode for the following wake sources:
1. LID_OPEN
2. AC_PRESENT
3. POWER_BUTTON
4. EC_RST_ODL
BUG=b:79220888
BRANCH=None
TEST=Tested the wake sources and ensured that the EC woke up for each
case after putting the EC into hibernate mode. Also observed the
pp3300_ec_mw and pp3300_pd_a_mw INA measurements. Verified that when
PSL mode is entered, these both drop to 0 mW as expected.
Change-Id: Ib565a40228e5abcdbf8b0ba6174f69bf216282f4
Signed-off-by: Scott Collyer <scollyer@google.com>
Reviewed-on: https://chromium-review.googlesource.com/1144260
Commit-Ready: Scott Collyer <scollyer@chromium.org>
Tested-by: Scott Collyer <scollyer@chromium.org>
Tested-by: Furquan Shaikh <furquan@chromium.org>
Reviewed-by: Furquan Shaikh <furquan@chromium.org>
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
| |
This change gets rid of yorp v0 support from EC codebase.
BUG=b:111545725
BRANCH=None
TEST=Boots to OS.
Change-Id: I1db238ce673a576b913e92874d0f1de730c04b05
Signed-off-by: Furquan Shaikh <furquan@google.com>
Reviewed-on: https://chromium-review.googlesource.com/1140742
Commit-Ready: Furquan Shaikh <furquan@chromium.org>
Tested-by: Furquan Shaikh <furquan@chromium.org>
Reviewed-by: Jett Rink <jettrink@chromium.org>
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
| |
In S0ix, Charge/Battery LED consumes too much power.
It's on for 4sec and off for 1sec and consumes 1mw.
Change LED timing to on for 1sec and off for 3sec.
This reduces power to negligible.
BUG=b:78497503
TEST=Verify LED timing.
Change-Id: I643cb742071e6e56559efadc0e7eadc7cc02132c
Signed-off-by: Venkateswarlu Vinjamuri <venkateswarlu.v.vinjamuri@intel.com>
Reviewed-on: https://chromium-review.googlesource.com/1117749
Commit-Ready: Venkateswarlu Vinjamuri <venkateswarlu.v.vinjamuri@intel.corp-partner.google.com>
Tested-by: Venkateswarlu Vinjamuri <venkateswarlu.v.vinjamuri@intel.corp-partner.google.com>
Reviewed-by: Furquan Shaikh <furquan@chromium.org>
Reviewed-by: Venkateswarlu Vinjamuri <venkateswarlu.v.vinjamuri@intel.corp-partner.google.com>
Reviewed-by: Jett Rink <jettrink@chromium.org>
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
| |
BUG=b:111264961
BRANCH=None
TEST=Verified that Chrome enables auto-rotation when lid angle is
>180.
Change-Id: I05b14214c8efb02dcd6168b3aff08317e8ddcd30
Signed-off-by: Furquan Shaikh <furquan@google.com>
Reviewed-on: https://chromium-review.googlesource.com/1132686
Commit-Ready: Furquan Shaikh <furquan@chromium.org>
Tested-by: Furquan Shaikh <furquan@chromium.org>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-by: Jett Rink <jettrink@chromium.org>
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
| |
This change enables DPTF on Yorp. This change is being performed
specifically for yorp instead of baseboard so that it can be slowly
rolled out as we determine DPTF settings.
Here are messages I see on the EC console after enabling this patch:
[29.268649 DPTF sensor 0, threshold -73 C, index 0, disabled]
[29.269531 DPTF sensor 0, threshold -73 C, index 1, disabled]
[29.271917 DPTF sensor 1, threshold -73 C, index 0, disabled]
[29.272803 DPTF sensor 1, threshold -73 C, index 1, disabled]
[29.274852 DPTF sensor 2, threshold -73 C, index 0, disabled]
[29.275736 DPTF sensor 2, threshold -73 C, index 1, disabled]
[29.370718 DPTF sensor 2, threshold 120 C, index 0, enabled]
[29.375691 DPTF sensor 2, threshold 90 C, index 1, enabled]
[29.379107 DPTF sensor 2, threshold 120 C, index 0, enabled]
[29.381799 DPTF sensor 2, threshold 62 C, index 1, enabled]
[29.389872 DPTF sensor 1, threshold 120 C, index 0, enabled]
[29.393946 DPTF sensor 1, threshold 90 C, index 1, enabled]
[29.400152 DPTF sensor 1, threshold 120 C, index 0, enabled]
[29.404406 DPTF sensor 1, threshold 48 C, index 1, enabled]
[29.414159 DPTF sensor 0, threshold 120 C, index 0, enabled]
[29.417368 DPTF sensor 0, threshold 125 C, index 1, enabled]
[29.422578 DPTF sensor 0, threshold 120 C, index 0, enabled]
[29.425361 DPTF sensor 0, threshold 120 C, index 1, enabled]
BRANCH=None
BUG=b:80145756
TEST=Enabled DPTF, rebooted Yorp
Change-Id: I859df5ad981ea644ab2317e96bf0b559a25efed3
Signed-off-by: Justin TerAvest <teravest@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/1121200
Reviewed-by: Jett Rink <jettrink@chromium.org>
|