| Commit message (Collapse) | Author | Age | Files | Lines |
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Adds dual USB-PD port support for samus. Both ports are in dual-role
and can perform either role.
Both ports work fine when only one of the ports is in use. But,
still having problems with PD errors on the lower priority port (port
0). If you have a charger plugged into port 0, and a type-C USB dongle
plugged into port 1, then port 1 has higher priority, and in the
SRC_DISCONNECTED state, every 1.5 seconds when it sends source cap
packet, we occasionally drop pings on port 0, which results in a
lot of start/stop charging.
BUG=chrome-os-partner:28585
BRANCH=none
TEST=Tested on samus to make sure both ports work when I
plug in a charger and a type-C USB dongle with a pull-down on the CC
line. Tested on plankton and zinger to make sure PD works as expected.
Change-Id: Ie7bde3e258f5cd23a0b82b626c0993a45b0df074
Signed-off-by: Alec Berg <alecaberg@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/200750
Reviewed-by: Vic Yang <victoryang@chromium.org>
Tested-by: Vic Yang <victoryang@chromium.org>
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Fix bug in which we were using the wrong index to the USART register
macros. This bug was recently introduced in:
https://chromium-review.googlesource.com/208488
BUG=none
BRANCH=none
TEST=load code on zinger and verify serial console works
Change-Id: I03142a8cafb68e0cbbcba4b720e7ec89fe20110b
Signed-off-by: Alec Berg <alecaberg@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/209557
Reviewed-by: Anton Staaf <robotboy@chromium.org>
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Fix the beginning and end of BMC PD communication:
- Initial transmission within 1us of taking control of CC line
- CC line released between 1us and 23us after last edge
- If final bit is a 0, then add two 1 bits to the end
- No garbage after the final bit
BUG=chrome-os-partner:30132
BRANCH=none
TEST=tested with a fruitpie, samus, and zinger.
verified timing on scope.
Change-Id: Ie45695eb367a7554cf5d5b76b6fbdf1e3fc85d29
Signed-off-by: Alec Berg <alecaberg@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/206453
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
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On panic, reboot properly the CPU rather than just jumping to the reset
vector as that might lead to some incorrect initializations.
Properly plug the div by 0 to the panic handling.
Add a small trace if the debug output is activated.
Signed-off-by: Vincent Palatin <vpalatin@chromium.org>
BRANCH=none
BUG=chrome-os-partner:29840
TEST=add adhoc code triggering a data abort and see the firmware
printing a trace, then rebooting immediatly in a working state.
Change-Id: I1d5a98d9113c8ae08e05588a40f941d1ed22cebe
Reviewed-on: https://chromium-review.googlesource.com/206268
Reviewed-by: Vic Yang <victoryang@chromium.org>
Tested-by: Vincent Palatin <vpalatin@chromium.org>
Commit-Queue: Vincent Palatin <vpalatin@chromium.org>
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The Over Voltage Protection was de-activated when the output is disabled
to avoid false positive when doing a down voltage transition,
but as a side effect, we might reset the OVP while the fault is still
present since the OVP first disables the output.
So, we want to keep testing the OVP fault condition if there is a
pre-existing fault.
Also add a hysteris and ensure we recover from OVP only when we go under
the new threshold.
Signed-off-by: Vincent Palatin <vpalatin@chromium.org>
BRANCH=none
BUG=chrome-os-partner:28331
TEST=trigger an OVP using a voltage source and see the output is not
re-enabled until we shutdown the voltage source.
Change-Id: Idef3f630c3cfeb301e62f1e75c2a424b56bc98dd
Reviewed-on: https://chromium-review.googlesource.com/206185
Reviewed-by: Alec Berg <alecaberg@chromium.org>
Tested-by: Vincent Palatin <vpalatin@chromium.org>
Commit-Queue: Vincent Palatin <vpalatin@chromium.org>
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As per the new spec, use the fast OCP to protect against the
short-circuits by putting the threshold at 4.5A.
Set the slow OCP (a few dozen milliseconds latency) at 3.6A to limit the
accepted current range.
Also sample the current/voltage over a larger period (5us) to limit
noise issues.
Signed-off-by: Vincent Palatin <vpalatin@chromium.org>
BRANCH=none
BUG=chrome-os-partner:28331
TEST=plug Zinger on an electronic load and trigger the OCP with various
pulses.
Change-Id: Ia66cd186716aebf88646cbf5fd340388f8cdd48d
Reviewed-on: https://chromium-review.googlesource.com/204590
Tested-by: Vincent Palatin <vpalatin@chromium.org>
Reviewed-by: Todd Broch <tbroch@chromium.org>
Reviewed-by: Alec Berg <alecaberg@chromium.org>
Commit-Queue: Vincent Palatin <vpalatin@chromium.org>
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It would be really nice to be guaranteed to see watchdog warnings
before we actually hit a watchdog reset even if something strange is
going on with the CPU. Let's increase the margin between the timer
and the independent so that the hardware watchdog is really hit as a
last resort.
It seems like a 1.6 second hardware watchdog wouldn't be the end of
the world so let's bump that way rather than increasing the number of
warnings.
BRANCH=ToT
BUG=chrome-os-partner:29162
TEST="waitms 1000" on EC console no longer ever reboots and "waitms
2000" usually does.
Change-Id: Ic5e5ddec22fb8484cc7c552b19d3f2043c105d0c
Signed-off-by: Doug Anderson <dianders@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/204895
Reviewed-by: Randall Spangler <rspangler@chromium.org>
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Fix bug and actually increase watchdog timeout to 1.8s.
BUG=none
BRANCH=none
TEST=put a 3 second blocking delay in pd_task and make
sure watchdog reboots. set blocking delay to 1.5seconds
and make sure no reboot.
Change-Id: Ie66621a3bd98354f9fd22b9b10a866d004277340
Signed-off-by: Alec Berg <alecaberg@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/204471
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
Commit-Queue: Vincent Palatin <vpalatin@chromium.org>
Tested-by: Vincent Palatin <vpalatin@chromium.org>
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On the P2 boards, the operational amplifier gain for current sensing is
exactly x100 rather than x101.
(non-inverter configuration with R1=1.8kOhm R2=178kOhm)
The voltage gain constant had a typo introducing a 10% error.
the voltage divider is 10k/100k,so it's x11 gain.
ie it should be written (10+100)/10 rather than (10+110).
Signed-off-by: Vincent Palatin <vpalatin@chromium.org>
BRANCH=none
BUG=chrome-os-partner:28331
TEST=make BOARD=zinger
checked manually with a voltmeter and traces.
Change-Id: I8097ab50149fee319efc11ebae75802e8a49a7f8
Reviewed-on: https://chromium-review.googlesource.com/204540
Reviewed-by: Alec Berg <alecaberg@chromium.org>
Commit-Queue: Vincent Palatin <vpalatin@chromium.org>
Tested-by: Vincent Palatin <vpalatin@chromium.org>
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This adds back DECLARE_IRQ() support when building without common
runtime. With this, we can enable only a subset of IRQs and avoid
linking in other unused IRQ handlers.
Note that after this change, all boards without common runtime need to
have a ec.irqlist file.
BUG=None
TEST=Build Keyborg and check it still works.
TEST=make buildall
BRANCH=None
Change-Id: If68062a803b9a78f383027a1625cf99eb3370d3f
Signed-off-by: Vic Yang <victoryang@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/203264
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
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Increase watchdog timeout to 1.8 second. The pd_task can delay up
to 1.5 seconds, so the watchdog must be at least that value.
On Zinger, the new timeout period will be 2 seconds with LSI clock at 50kHz
and 3.36 seconds with LSI clock at 30kHz.
Note: the LSI frequency range is tighter on STM32F0 and cannot go up to
56kHz.
BUG=none
BRANCH=none
TEST=add 1.5 second blocking delay to pd_task and make sure
watchdog is normally not firing.
Change-Id: I444639ccacd3452181a5fb6caab8e5df7ef3c847
Signed-off-by: Alec Berg <alecaberg@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/204333
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
Commit-Queue: Vincent Palatin <vpalatin@chromium.org>
Tested-by: Vincent Palatin <vpalatin@chromium.org>
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Update according to the current PD standard, a monotonic transition
seems mandatory in all cases, so keep the voltage output enabled
when increasing the output voltage.
Signed-off-by: Vincent Palatin <vpalatin@chromium.org>
BRANCH=none
BUG=chrome-os-partner:28331
TEST=connect Zinger to Fruitpie and probe the VBUS voltage during a
transition.
Change-Id: I3c728cc0049ca41536efd4f075139626b7d371da
Reviewed-on: https://chromium-review.googlesource.com/202657
Reviewed-by: Alec Berg <alecaberg@chromium.org>
Commit-Queue: Vincent Palatin <vpalatin@chromium.org>
Tested-by: Vincent Palatin <vpalatin@chromium.org>
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Fix check for whether or not we are running in RO. The previous
code read the contents of the RW reset vector, but RW code
may be corrupted causing us to think we are in RW when we are not.
BUG=none
BRANCH=none
TEST=mostly just code inspection. verified this code running
in RW correctly identifies we are in RW.
Change-Id: I2c27af45a59b29f55fd24295f91d5c5f0e491dd4
Signed-off-by: Alec Berg <alecaberg@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/203192
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
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Use a EC to PD host command to notify the PD MCU when a battery
is present and charged enough that it is ok to negotiate for a
higher power. The PD MCU will not negotiate until the host command
is received, which allows the system to be powered without a
battery or with a dead battery with 5V.
BUG=chrome-os-partner:28611
BRANCH=none
TEST=Tested on a samus:
1) Tested the normal case of battery charged and plugged in. When
charger is plugged in, the device immediately starts negotiating
for 20V and starts charging.
2) Tested with no battery. Plug in a charger, samus boots and stays
alive. VBUS measured at 5V. When a battery is plugged in, device
negotiates for 20V and starts charging.
3) Tested dead battery by taking a battery with no charge, and
plugging in zinger. Everything boots, but PD does not negotiate
for power. Then when battery reaches 1%, PD negotiates and zinger
switches to 20V without causing a reboot.
Change-Id: Iaa451403674e86cddbd3fe80e9503584910be576
Signed-off-by: Alec Berg <alecaberg@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/201958
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
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Ensure we are never stuck somewhere without doing the safety checks by
enabling the watchdog and reloading it in the safaty checks function.
I have kept the default timing constants, so on STM32F0xx the watchdog
period should be between 1.2s (LSI at 30kHz) and 2.0s (LSI at 50kHz).
Signed-off-by: Vincent Palatin <vpalatin@chromium.org>
BRANCH=none
BUG=none
TEST=add a 2s loop in the serial port interrupt handler and see the
power supply rebooting.
Change-Id: I000f2a36a31e1166adf63a36c2b7f52999adc928
Reviewed-on: https://chromium-review.googlesource.com/201575
Reviewed-by: Alec Berg <alecaberg@chromium.org>
Commit-Queue: Vincent Palatin <vpalatin@chromium.org>
Tested-by: Vincent Palatin <vpalatin@chromium.org>
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When a fault is cleared, reset the PD state and communicate,
so that we re-enable the output and negociate a new voltage.
Signed-off-by: Vincent Palatin <vpalatin@chromium.org>
BRANCH=none
BUG=none
TEST=on Zinger connected to Firefly, trigger an OCP (using an electronic load)
and see that the output is re-enabled once the OCP is cleared after 1 second.
Change-Id: I3199d2c8675ab43958321378fd7f65ac383468cc
Reviewed-on: https://chromium-review.googlesource.com/200338
Commit-Queue: Vincent Palatin <vpalatin@chromium.org>
Tested-by: Vincent Palatin <vpalatin@chromium.org>
Reviewed-by: Alec Berg <alecaberg@chromium.org>
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When the supply output is enabled, ensure that we detect quickly any
over-current situation by setting an analog watchdog in continuous
conversion mode.
Signed-off-by: Vincent Palatin <vpalatin@chromium.org>
BRANCH=none
BUG=chrome-os-partner:28331
TEST=plug an electronic load to Zinger and see the OCP triggered
quickly when we go above the current threshold.
Change-Id: I7da50ef242addbd2f4f48f624494daa321ac22b2
Reviewed-on: https://chromium-review.googlesource.com/199924
Tested-by: Vincent Palatin <vpalatin@chromium.org>
Reviewed-by: Alec Berg <alecaberg@chromium.org>
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Allow flashing the RW firmware by sending Vendor-Defined Messages over
the USB-PD link.
This is not the secure update whose design is still under discussion,
it's a simple update with integrity check.
Signed-off-by: Vincent Palatin <vpalatin@chromium.org>
BRANCH=none
BUG=chrome-os-partner:28330
TEST=using the following CLs,
./util/flash_pd.py ./build/zinger/ec.RW.flat
and see Zinger booting on RW, repeat the operations with different
builds of the RW firmware.
Change-Id: Icd90eb92f7321ccd66341a50b9dabd73c59c68c1
Reviewed-on: https://chromium-review.googlesource.com/197948
Reviewed-by: Alec Berg <alecaberg@chromium.org>
Tested-by: Vincent Palatin <vpalatin@chromium.org>
Commit-Queue: Vincent Palatin <vpalatin@chromium.org>
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Initial patch for samus PD board. This configures GPIOs to match
samus 1.9.
BUG=chrome-os-partner:28350
BRANCH=none
TEST=none, no boards yet.
Change-Id: Ibc9d67325a1d9699b4e76e2998ab830ddbd0fb98
Signed-off-by: Alec Berg <alecaberg@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/199660
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
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As per hardware team request, use a higher over-current limit to avoid
false positives due to measurement precision margin.
Signed-off-by: Vincent Palatin <vpalatin@chromium.org>
BRANCH=none
BUG=chrome-os-partner:28331
TEST=use a Zinger connected to an electronic load and trigger the
protection.
Change-Id: If031f6f58b9b7119c6fa3fa3273c08f16cbbbebb
Reviewed-on: https://chromium-review.googlesource.com/199552
Reviewed-by: Alec Berg <alecaberg@chromium.org>
Commit-Queue: Vincent Palatin <vpalatin@chromium.org>
Tested-by: Vincent Palatin <vpalatin@chromium.org>
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The electrical design has changed :
the output enable GPIO (PF0) has switched from being the LM5050 shutdown
pin to controlling directly the FET enabling. We need to invert the
control logic and use it in push-pull mode rather than open-drain.
Signed-off-by: Vincent Palatin <vpalatin@chromium.org>
BRANCH=none
BUG=chrome-os-partner:28332
TEST=plug a reworked Zinger to a firefly and check the firefly LED is
displaying a solid ON (meaning the voltage is right).
Change-Id: Iee79b07f49eade1fee7cac1986bc38ba21e04b25
Reviewed-on: https://chromium-review.googlesource.com/198240
Reviewed-by: Alec Berg <alecaberg@chromium.org>
Commit-Queue: Vincent Palatin <vpalatin@chromium.org>
Tested-by: Vincent Palatin <vpalatin@chromium.org>
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Detect over-current and over-voltage and trigger a fault.
The over-current threshold is 10% over 3A (3.3A).
Only currently implement the slow protection,
the fast interrupt-based one will be done later.
Signed-off-by: Vincent Palatin <vpalatin@chromium.org>
BRANCH=none
BUG=chrome-os-partner:28331
TEST=with Zinger connected to an electronic load, adjust the current to
3.35A and see the output voltage cut.
Change-Id: I0e848192392fd73f0839d4bcb806528b2a6b9122
Reviewed-on: https://chromium-review.googlesource.com/197947
Commit-Queue: Vincent Palatin <vpalatin@chromium.org>
Tested-by: Vincent Palatin <vpalatin@chromium.org>
Reviewed-by: Alec Berg <alecaberg@chromium.org>
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Use the plug polarity detected by the ADCs to do the PD communication on
the right CCx line.
Signed-off-by: Vincent Palatin <vpalatin@chromium.org>
BRANCH=none
BUG=chrome-os-partner:28339
TEST=make buildall
on Firefly, plug Zinger connector in both direction and see it can
control it either way.
on Fruitpie, use CC1 or CC2 and see it can communicate on both.
Change-Id: I81cb00f164cb8194fba73b383014e81c37d975e2
Reviewed-on: https://chromium-review.googlesource.com/197520
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
Tested-by: Vincent Palatin <vpalatin@chromium.org>
Commit-Queue: Vincent Palatin <vpalatin@chromium.org>
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Slightly modify interfaces for better sink-only devices implementation
(eg Firefly)
update the host mode management and the voltage selection
and add a hook for board checks.
Simplify the reception timeout and fix other timeout detections.
Signed-off-by: Vincent Palatin <vpalatin@chromium.org>
BRANCH=none
BUG=none
TEST=make buildall
and use with the follow-up firefly board configuration CL.
Change-Id: I0240295764c8605793dc80a2fc21357af1740744
Reviewed-on: https://chromium-review.googlesource.com/195585
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
Tested-by: Vincent Palatin <vpalatin@chromium.org>
Commit-Queue: Vincent Palatin <vpalatin@chromium.org>
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In the micro runtime for Zinger, wait for events with interrupt disabled
to avoid race conditions where the event interrupt happens just after we
tested it and before going to sleep.
Signed-off-by: Vincent Palatin <vpalatin@chromium.org>
BRANCH=none
BUG=none
TEST=make BOARD=zinger, test Zinger PD communication from Firefly.
Change-Id: I10b919450a61fac7ea50e84dd73bcc568150e179
Reviewed-on: https://chromium-review.googlesource.com/197051
Tested-by: Vincent Palatin <vpalatin@chromium.org>
Reviewed-by: Vic Yang <victoryang@chromium.org>
Commit-Queue: Vincent Palatin <vpalatin@chromium.org>
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Add the USB Power delivery PHY configuration,
and all the pins and details to use the real Zinger
board.
Signed-off-by: Vincent Palatin <vpalatin@chromium.org>
BRANCH=none
BUG=none
TEST=none
Change-Id: Ic2d3616c9fd2bf3ebeccba74a5519697e7c3e899
Reviewed-on: https://chromium-review.googlesource.com/194220
Tested-by: Vincent Palatin <vpalatin@chromium.org>
Reviewed-by: Randall Spangler <rspangler@chromium.org>
Commit-Queue: Vincent Palatin <vpalatin@chromium.org>
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Using minimal runtime to fit the charger flash and RAM size.
It is currently more an experiment than the final layout written in the
stone.
Signed-off-by: Vincent Palatin <vpalatin@chromium.org>
BRANCH=none
BUG=none
TEST=run on STM32F051 Discovery with
limited RAM and Flash to mimic STM32F031.
Change-Id: I10ee1decfd1f1448edbc909f0e997367921c4b53
Reviewed-on: https://chromium-review.googlesource.com/189405
Reviewed-by: Vic Yang <victoryang@chromium.org>
Commit-Queue: Vincent Palatin <vpalatin@chromium.org>
Tested-by: Vincent Palatin <vpalatin@chromium.org>
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