| Commit message (Collapse) | Author | Age | Files | Lines |
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Implement and enable custom charging profiles on glados to
allow us to charge faster.
BUG=chrome-os-partner:42864
BRANCH=none
TEST=load on glados and charge at room temp. verify using
"charger" command that the battery current matches the
expected fast charging current for the given temp range.
Change-Id: I7b213fd1724e9df09ada89ca27b05e0540b4de2a
Signed-off-by: Alec Berg <alecaberg@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/288208
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
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Chipset task is overflowing and causing runtime crash.
Increasing the chipset task stack size by 128 bytes.
BUG=chrome-os-partner:43329
BRANCH=none
TEST=Build/flash EC and boot the platform to OS.
Change-Id: I4e444cc48979c74810851ab2625b982fdabdeb73
Signed-off-by: Divagar Mohandass <divagar.mohandass@intel.com>
Reviewed-on: https://chromium-review.googlesource.com/289112
Reviewed-by: Shawn N <shawnn@chromium.org>
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For multi-byte ACPI memmap reads, we previously had a mutex to ensure
data continuity. A better approach is to use a read cache. Since the
kernel will enable burst mode before reading a multi-byte memmap
variable and disable it afterward, we can populate the cache on the
first read after enabling burst. This solution removes deadlock bugs, is
contained entirely in acpi.c, and saves a deferred function.
BUG=chromium:514283
TEST=Manual on Glados. Add prints in acpi_read, verify that multi-byte
reads come from cache and non-burst reads continue to function as
before.
BRANCH=Cyan
Signed-off-by: Shawn Nematbakhsh <shawnn@chromium.org>
Change-Id: I74e4927bf2b433e31a9ff65d72820fa087c51722
Reviewed-on: https://chromium-review.googlesource.com/288871
Reviewed-by: Bill Richardson <wfrichar@chromium.org>
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
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Enable Try.Src for Glados, Kunimitsu, Strago, and Oak so that they
default to sourcing power when connecting to other dual-role
devices.
BUG=none
BRANCH=strago
TEST=make -j buildall
Tested on glados by plugging in charger, hoho, and another
dual-role device and making sure we resolve roles appropriately.
Change-Id: I9393e30b35620eeda3ef1ef56366a97e59ba8054
Signed-off-by: Alec Berg <alecaberg@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/288247
Reviewed-by: Shawn N <shawnn@chromium.org>
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BUG=none
BRANCH=none
TEST=make -j buildall
Change-Id: I8909001a093ebfd4ea482984855931b0764e2552
Signed-off-by: Alec Berg <alecaberg@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/288770
Reviewed-by: Vijay P Hiremath <vijay.p.hiremath@intel.com>
Reviewed-by: Shawn N <shawnn@chromium.org>
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There was a bug in this function where the bit for host_command was
being set in the ec_status variable. This caused the ALERT# GPIO
line to be held low which in turn caused the EC MCU to loop
and keep reading the ALERT register.
BUG=none
BRANCH=none
TEST=manual Tested against Zinger in both ports and Zinger and Samus
at connected into each port. Verified that it established a PD contract
for both ports and that the alert line was no longer being held low
Change-Id: I5540440a68581521eb002411f728a4eac2f22caf
Signed-off-by: Scott Collyer <scollyer@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/288252
Reviewed-by: Alec Berg <alecaberg@chromium.org>
Commit-Queue: Alec Berg <alecaberg@chromium.org>
Tested-by: Alec Berg <alecaberg@chromium.org>
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This allows the "make flash" command to work for the Discovery board.
Signed-off-by: Anton Staaf <robotboy@chromium.org>
BRANCH=None
BUG=None
TEST=make buildall -j
cd board/discovery
make flash
Change-Id: Ifa3c1eca58b80093b47a8fe25b47d29dba923d6b
Reviewed-on: https://chromium-review.googlesource.com/287439
Trybot-Ready: Anton Staaf <robotboy@chromium.org>
Tested-by: Anton Staaf <robotboy@chromium.org>
Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
Commit-Queue: Anton Staaf <robotboy@chromium.org>
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The atomic_* functions are often used in contexts where the data they
will operate on are volatile (due to being shared between tasks or a
task and an interrupt handler). Adding volatile here makes using the
atomic_* functions a little easier in those cases and removes a cast
from the call sites (which could be obscuring a bug, if for instance
the variable was modified to be a uint16_t).
Signed-off-by: Anton Staaf <robotboy@chromium.org>
BRANCH=None
BUG=None
TEST=make buildall -j
Change-Id: I71356eb3cf2c0506df38532eee767c7d78f9240e
Reviewed-on: https://chromium-review.googlesource.com/287516
Trybot-Ready: Anton Staaf <robotboy@chromium.org>
Tested-by: Anton Staaf <robotboy@chromium.org>
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
Commit-Queue: Anton Staaf <robotboy@chromium.org>
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Ported the HPD handling to policy from Glados
Change-Id: I293224fa5189c8827f1837877ffb791fddc7fb77
Reviewed-on: https://chromium-review.googlesource.com/285743
BUG=none
TEST=make buildall -j
BRANCH=none
Change-Id: I982c6bd162b5ba239d4c9d066995c3d2fcaa97fd
Signed-off-by: Vijay Hiremath <vijay.p.hiremath@intel.com>
Reviewed-on: https://chromium-review.googlesource.com/287812
Reviewed-by: Alec Berg <alecaberg@chromium.org>
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Ported the USB-C muxes from Glados
Change-Id: I9d42108688a9070b982ae77f77633654bc6505ed
Reviewed-on: https://chromium-review.googlesource.com/282281
BUG=none
TEST=Tested the USB & DP status from "typec" console command.
Observed usb_mux_set() & usb_mux_get() function are getting called
and also the polarity of the USB-C is getting detected properly.
BRANCH=none
Change-Id: I0b169032ff77af9895311680413aed6c7d0fd4e2
Signed-off-by: Vijay Hiremath <vijay.p.hiremath@intel.com>
Reviewed-on: https://chromium-review.googlesource.com/287464
Reviewed-by: Shawn N <shawnn@chromium.org>
Reviewed-by: Alec Berg <alecaberg@chromium.org>
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104f811e6730e129a98fac6fc3941bbe0d0e857f
BUG=chromium:511324
TEST=make buildall -j
BRANCH=none
Change-Id: I994e11c94413d7b8683b64e86807ba45b61c7eea
Signed-off-by: Myles Watson <mylesgw@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/288239
Reviewed-by: Wai-Hong Tam <waihong@chromium.org>
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Apply ac1cba419ab507163dcb6dc9d6be1401f3f1f518 to Jerry.
BUG=chromium:511324
TEST=make buildall -j
BRANCH=none
Change-Id: I04f168f8e1a8e6a1e7c21cc3ce8c06315d9e7495
Signed-off-by: Myles Watson <mylesgw@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/288238
Reviewed-by: Wai-Hong Tam <waihong@chromium.org>
Reviewed-by: Alec Berg <alecaberg@chromium.org>
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Jerry is being used for FAFT in the lab. Remove Pinky instead.
BUG=chromium:511324
TEST=make buildall -j
BRANCH=none0
CQ-DEPEND=CL:288258
Change-Id: I03ddc74a4e72353f3408da8e374ad925baf00a35
Signed-off-by: Myles Watson <mylesgw@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/288237
Reviewed-by: Wai-Hong Tam <waihong@chromium.org>
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Ported the PD support from Kunimitsu.
kunimitsu: add initial PD support
Change-Id: I0cb1edcf1703f55882f81c65e6359a45be4c1629
Reviewed-on: https://chromium-review.googlesource.com/281833
BUG=none
TEST=Verified the PD negotiation on BCRD2.
Device boots after plugging in the USB charger.
Battery is getting charged.
BRANCH=none
Change-Id: If4efb0463118414fb02ad8e53700eac578a4954a
Signed-off-by: Kevin K Wong <kevin.k.wong@intel.com>
Signed-off-by: Vijay Hiremath <vijay.p.hiremath@intel.com>
Reviewed-on: https://chromium-review.googlesource.com/287124
Reviewed-by: Shawn N <shawnn@chromium.org>
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This patch adds a module which runs on top of the SPS driver and
implements the TCG SPI TPM protocol.
Basic register read and write functions are implemented as well as
rudimentary TPM state machine (claiming/releasing locality).
An enhancement is made to the SPS driver to ensure that when the CS is
deasserted the transmit FIFO is reset too, on the off chance of the CS
going away mid transaction for whatever reason.
In this implementation the slave is guaranteed to stall the master for
a few bytes in both receive and transmit transactions, which is
further aggravated by the fact that RX FIFO threshold is set to 8
(this is the minimum number of bytes the master has to send to wake up
the slave). This could be fine tuned later, for instance made a
parameter of the receive callback registration function.
BRANCH=none
BUG=chrome-os-partner:43025
TEST=trunksd initialization (with minor changes to accommodate new
VID/DID and some status bits, to be published) succeeds with the
cr50 connected to the USB/SPI cable.
Change-Id: I28d37c3b57dde9adf59e81426efe4f58880cf0b0
Signed-off-by: Bill Richardson <wfrichar@chromium.org>
Signed-off-by: Vadim Bendebury <vbendeb@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/285252
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SPI slave and master interfaces require very different code to
support, they should have separate configuration options.
Host command code printouts should use their own console channel.
Using SPS to designate SPI Slave interface is not universally
acceptable, a bug has been opened to discuss the alternatives and
clean up the code.
BRANCH=none
BUG=chromium:512613
TEST=make buildall -j
Change-Id: I6683286a221c4689ecc247fdfe8ebca529f3f458
Signed-off-by: Vadim Bendebury <vbendeb@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/286469
Reviewed-by: Bill Richardson <wfrichar@chromium.org>
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Jerry is being used for FAFT in the lab. Remove Pinky instead.
This reverts part of commit bdc680d8ed7ea24cdfb1b5498f73a1008c71ad37.
BUG=chromium:511324
TEST=make buildall -j
BRANCH=none
Change-Id: I034a814ffe3397728e443f99ed270d412be1bc1d
Signed-off-by: Myles Watson <mylesgw@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/288236
Reviewed-by: Dan Shi <dshi@chromium.org>
Reviewed-by: Wai-Hong Tam <waihong@chromium.org>
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Add ECST tool to modify the header used by npcx booter.
Modified drivers:
1. i2c.c: Modify for i2c_port design.
2. i2c.c: Fixed bugs when mutil-tasks use the same i2c port and pull-up issue.
3. hwtimer.c: Fixed bug whcih event expired time is behide current timer.
4. lpc.c: Add intializing host settings after pltrst is deasserted.
5. uart.c/clock.c/register.h: Fixed bug which cannot enter deep-idle
when gpio is any-edge trigger mode.
6. task.c: Add workaround method for hard fault issue.
7. keyboard_raw.c: Modified for support CONFIG_KEYBOARD_KSO_BASE
8. lpc.c: Modified for support CONFIG_KEYBOARD_IRQ_GPIO
9. lpc.c: fixed obe interrupt bug during 8042 initialization
10.Adjust path of flat files for new Makefile rules
11.Fixed build error on lpc.c without CONFIG_KEYBOARD_IRQ_GPIO
BUG=chrome-os-partner:34346
TEST=make buildall -j; test nuvoton IC specific drivers
BRANCH=none
Change-Id: Icf9494174b245b4026e396be877d578f36b6f6a5
Signed-off-by: Ian Chao <mlchao@nuvoton.com>
Reviewed-on: https://chromium-review.googlesource.com/284036
Reviewed-by: Shawn N <shawnn@chromium.org>
Tested-by: Shawn N <shawnn@chromium.org>
Commit-Queue: Shawn N <shawnn@chromium.org>
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The mec1322 SPI driver toggles CS manually (CONFIG_SPI_CS_GPIO), so the
pin needs to be a normal GPIO, not functional.
BUG=chrome-os-partner:43160
TEST=Run "flashrom -p internal:bus=lpc -r read.bin" on glados, verify
that read.bin contains actual flash data and not all zeros.
BRANCH=None
Change-Id: Ibaee03b43b4d9c25f6c074c02688d1cba20c7a02
Signed-off-by: Shawn Nematbakhsh <shawnn@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/288321
Reviewed-by: Duncan Laurie <dlaurie@chromium.org>
Reviewed-by: Alec Berg <alecaberg@chromium.org>
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Changes for glados proto 2 build. These changes are behind GLADOS_BOARD_V2,
which is not defined by default in order to support existing boards.
BUG=chrome-os-partner:42933
TEST=Verify that Glados v1 board continues to boot AP. Verify
compilation on GLADOS_BOARD_V2.
BRANCH=None
Change-Id: I68634f95f94d3d37f18d676c01219f92b6ddfc45
Signed-off-by: Shawn Nematbakhsh <shawnn@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/287291
Reviewed-by: Alec Berg <alecaberg@chromium.org>
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use (LID_OPEN == 0 && BASE_PRES_L == 0) as the lid closed condition to
avoid false triggers.
Signed-off-by: Vincent Palatin <vpalatin@chromium.org>
BRANCH=smaug
BUG=chrome-os-partner:42110
TEST=on Smaug EVT2, play with magnets and the genuine lid,
check we get the right "lid open" / "lid close" messages on the console.
Change-Id: Ie0a34fb7e45e8a424ff1cfda7662543d4f336f1a
Reviewed-on: https://chromium-review.googlesource.com/287853
Trybot-Ready: Vincent Palatin <vpalatin@chromium.org>
Tested-by: Vincent Palatin <vpalatin@chromium.org>
Reviewed-by: Alec Berg <alecaberg@chromium.org>
Commit-Queue: Vincent Palatin <vpalatin@chromium.org>
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BUG=none
BRANCH=none
TEST=make -j buildall
Change-Id: I7c87398ff85fc241162f2bf62c05108a498ce8d6
Signed-off-by: Alec Berg <alecaberg@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/287783
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
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LEDs should be under control of the mec1322 specialized LED control
unit, but it's not yet functional. In order to test LEDs for the
upcoming build, add GPIOs which can be toggled through the EC console or
ectool.
BUG=chrome-os-partner:40848
TEST=Verify `gpioset CHARGE_LED_1 1` turns LED red. Verify `gpioset
CHARGE_LED_2 1` turns LED green.
BRANCH=None
Signed-off-by: Shawn Nematbakhsh <shawnn@chromium.org>
Change-Id: I64b5109e10aeb6a1f38ae9410dc5205f4cc6a117
Reviewed-on: https://chromium-review.googlesource.com/287675
Reviewed-by: Alec Berg <alecaberg@chromium.org>
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Add more details about adding a new source file.
Add a reminder for pull-ups on the I2C bus.
Decode PD state machine.
Remove unused second I2C port configuration.
Signed-off-by: Vincent Palatin <vpalatin@chromium.org>
BRANCH=none
BUG=none
TEST=none
Change-Id: If94a0f47921dac7d3fb9dc1e9879a7c69699d224
Reviewed-on: https://chromium-review.googlesource.com/287830
Reviewed-by: Alec Berg <alecaberg@chromium.org>
Commit-Queue: Vincent Palatin <vpalatin@chromium.org>
Trybot-Ready: Vincent Palatin <vpalatin@chromium.org>
Tested-by: Vincent Palatin <vpalatin@chromium.org>
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Using Bosh reference document, compensate X,Y,Z axis
based on internal registers and R HALL values.
Change compass unites to 1/16 uT per LSB.
Reference:
https://github.com/suribi/Thunder-Kernel/blob/master/mediatek/custom/common/kernel/magnetometer/bmm150/bmm150.c
BRANCH=smaug
TEST=Check compass value in user space.
BUG=chrome-os-partner:39900
Change-Id: I0c480521771ef6004ac6e5182cc1d27e82c5bc7c
Signed-off-by: Gwendal Grignou <gwendal@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/285020
Reviewed-by: Alec Berg <alecaberg@chromium.org>
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Create new custom VDM to notify DUT to enter case closed
debugging mode. Send this VDM from Plankton when the case
closed debugging enable button is pressed. Once DUT
receives the CCD enable VDM, CCD remains enabled until
a reboot. Note, this is polarity dependent, so cable
might need to be flipped.
BUG=chrome-os-partner:42569
BRANCH=smaug
TEST=load on plankton and ryu. attach full feature C to C
cable (must have USB3.0 wires). make sure plankton is in
USB mode (USB_SS_USB_MODE light should be set, which can be
done by pressing DP_USB_TOGGLE button). Press CASE_CLOSE_EN
button to send VDM, and then attach micro-B to debug port
CN14 on plankton. See that VID/PID for Ryu show up in lsusb
on host, and EC console works. If device does not show up,
flip polarity of cable.
Change-Id: Ifa469e4a43e32089becd75fe6cdfe0ed462d950b
Signed-off-by: Alec Berg <alecaberg@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/287441
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
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Add ability for Plankton to detect whether a single or double
CC cable is used to connect to DUT. This is done by toggling
the active CC line until a connection is detected, then toggling
once more and checking if we still have a connection. If we
can connect to the DUT in both CC polarities, then it is a
double CC cable. Before we know the cable type, keep PD
communication disabled to avoid partially negotiating and then
disconnecting. Note, this increases the time it takes for
us to connect a form a stable PD contract with the DUT.
When we detect a double CC cable, the cable flip button actually
flips the active CC polarity, thus testing all pins in the
opposite polarity.
BUG=chrome-os-partner:42569
BRANCH=smaug
TEST=test with plankton and samus. test that we form a PD
contract with both single and double CC cables as both sink
and source. also test the cable flip button for both cables.
Change-Id: I522369302848d4cdbb70c55a40af3ad0b7c3fb8a
Signed-off-by: Alec Berg <alecaberg@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/286589
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
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Add matrices to align sensors vectors with the device reference.
Move rotation in read routines, to allow fifo to contains processed
information.
BRANCH=smaug
TEST=Worsk on smaug
BUG=chrome-os-partner:39900
Change-Id: I009e7f24ef6ee0574ed664aeb5fd649fcd7039fd
Signed-off-by: Gwendal Grignou <gwendal@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/286659
Reviewed-by: Alec Berg <alecaberg@chromium.org>
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Ported the HPD handling to policy from Glados
Change-Id: I293224fa5189c8827f1837877ffb791fddc7fb77
Reviewed-on: https://chromium-review.googlesource.com/285743
BUG=none
TEST=make buildall -j
BRANCH=none
Change-Id: I72e2f0853902bfa3536ba083f8ece5785be625c4
Signed-off-by: Vijay Hiremath <vijay.p.hiremath@intel.com>
Reviewed-on: https://chromium-review.googlesource.com/287410
Reviewed-by: Alec Berg <alecaberg@chromium.org>
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Ported the USB-C muxes from Glados
Change-Id: I9d42108688a9070b982ae77f77633654bc6505ed
Reviewed-on: https://chromium-review.googlesource.com/282281
BUG=none
TEST=Tested the USB & DP status from "typec" console command.
Observed usb_mux_set() & usb_mux_get() function are getting called
and also the polarity of the USB-C is getting detected properly.
BRANCH=none
Change-Id: I56da12f4fe20a05a73e8b93893ba5a425a20808f
Signed-off-by: Vijay Hiremath <vijay.p.hiremath@intel.com>
Reviewed-on: https://chromium-review.googlesource.com/287360
Reviewed-by: Shawn N <shawnn@chromium.org>
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Do not display host commands on the EC console by default.
It's too noisy with the sensor readings.
Signed-off-by: Vincent Palatin <vpalatin@chromium.org>
BRANCH=smaug
BUG=none
TEST=run on smaug EVT2 and get less spam on the console
Reviewed-on: https://chromium-review.googlesource.com/287303
Trybot-Ready: Vincent Palatin <vpalatin@chromium.org>
Tested-by: Vincent Palatin <vpalatin@chromium.org>
Reviewed-by: Furquan Shaikh <furquan@chromium.org>
Reviewed-by: Gwendal Grignou <gwendal@chromium.org>
Commit-Queue: Vincent Palatin <vpalatin@chromium.org>
Tested-by: Gwendal Grignou <gwendal@google.com>
(cherry picked from commit 077052445551dd607416ee5f923da18a1cd6db13)
Change-Id: I6b33c6f24680438b57ef3fd992f894c6165603bf
Reviewed-on: https://chromium-review.googlesource.com/287288
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
Commit-Queue: Vincent Palatin <vpalatin@chromium.org>
Trybot-Ready: Vincent Palatin <vpalatin@chromium.org>
Tested-by: Vincent Palatin <vpalatin@chromium.org>
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Add example uses of the multi USART driver with DMA transmission and interrupt
based reception. USART1 is setup as a loopback device, it just echo's any
characters received. USART4 is forwarded over USB.
Also fix the alternate function mappings for USART3 and USART4, and add
comments for each section of board.c.
Signed-off-by: Anton Staaf <robotboy@chromium.org>
BRANCH=None
BUG=None
TEST=make buildall -j
Crosswire USART1 to USART4 and cut and paste chunks of text over USB
Change-Id: I79170c78e61328caf8067ae8db8810db38880839
Reviewed-on: https://chromium-review.googlesource.com/287195
Trybot-Ready: Anton Staaf <robotboy@chromium.org>
Tested-by: Anton Staaf <robotboy@chromium.org>
Reviewed-by: Randall Spangler <rspangler@chromium.org>
Commit-Queue: Anton Staaf <robotboy@chromium.org>
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This adds a new transmission implementation for the multi UART driver.
It is a DMA based transmitter that can directly read from the TX queue
with zero copy overhead. The DMA channel used as well as the maximum
DMA transmission size are configurable per UART at the board level.
This also updates the Ryu AP UART to use DMA transmission.
Signed-off-by: Anton Staaf <robotboy@chromium.org>
BRANCH=None
BUG=None
TEST=make buildall -j
Manually verify that the AP UART forwarding works
Change-Id: I3cb27d0f9015043d75a38c12919388afe90dc4af
Reviewed-on: https://chromium-review.googlesource.com/286274
Trybot-Ready: Anton Staaf <robotboy@chromium.org>
Tested-by: Anton Staaf <robotboy@chromium.org>
Reviewed-by: Randall Spangler <rspangler@chromium.org>
Commit-Queue: Anton Staaf <robotboy@chromium.org>
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Following features are enabled.
1. ALS OPT3001 is enabled
2. Charger ISL9237 is enabled
3. Sleep mode in G3 is enabled
4. CMD_HASH, CMD_TIMERINFO, CONSOLE_HISTORY, CMD_ACCEL_INFO, CMD_ACCES
are disabled to save the memory.
BUG=none
TEST=Device boots to UI.
BRANCH=none
Change-Id: I225dcafdb5b066b6d9b9b2b00bd06586d33d3527
Signed-off-by: Vijay Hiremath <vijay.p.hiremath@intel.com>
Reviewed-on: https://chromium-review.googlesource.com/286783
Reviewed-by: Shawn N <shawnn@chromium.org>
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Remove ryu_p4p5 EC board code along the "splitted" Sensor hub board
(ryu_sh/ryu_sh_loader): It's time to get rid of oldies.
Signed-off-by: Vincent Palatin <vpalatin@chromium.org>
BRANCH=smaug
BUG=chrome-os-partner:38333
TEST=make buildall
CQ-DEPEND=*I6df51d7b4be2be7217604da60462b8c9d0cde1d2
Change-Id: Iebc4022267afccb5057c856d624e56a850ecbd70
Reviewed-on: https://chromium-review.googlesource.com/286780
Reviewed-by: Alec Berg <alecaberg@chromium.org>
Trybot-Ready: Vincent Palatin <vpalatin@chromium.org>
Tested-by: Vincent Palatin <vpalatin@chromium.org>
Commit-Queue: Vincent Palatin <vpalatin@chromium.org>
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Fixes for GPIO leakage
1. LPC_CLKRUN
2. JTAG pins
3. LED ports from OD to PP
4. NC pins
BUG=None
TEST=Booted Cyan EVT
BRANCH=None
Change-Id: I36c1f3456f0b59155ff825e981b0b38efb9ec35e
Signed-off-by: Kyoung Kim <kyoung.il.kim@intel.com>
Reviewed-on: https://chromium-review.googlesource.com/285131
Reviewed-by: Shawn N <shawnn@chromium.org>
Tested-by: Divya Jyothi <divya.jyothi@intel.com>
Commit-Queue: Divya Jyothi <divya.jyothi@intel.com>
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If AC is connected, LED show charge state;
else, LED show power state.
BUG=none
TEST=Verified LED shows consistent color
BRANCH=none
Change-Id: Ib3d4dd64d132f4bec7ab4309afd52efc886706ba
Signed-off-by: li feng <li1.feng@intel.com>
Reviewed-on: https://chromium-review.googlesource.com/286541
Reviewed-by: Shawn N <shawnn@chromium.org>
Commit-Queue: Divya Jyothi <divya.jyothi@intel.com>
Tested-by: Divya Jyothi <divya.jyothi@intel.com>
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To meet Android HiFi requirement, set gyro range to +/-1000dps.
BRANCH=smaug
TEST=Check range is correct from user space.
BUG=chrome-os-partner:39900
Change-Id: I47541214c2242cfb4bba5ceb8a90f1ca63679e3c
Signed-off-by: Gwendal Grignou <gwendal@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/286243
Reviewed-by: Alec Berg <alecaberg@chromium.org>
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enable heavysleep idle task for Cyan
BUG=None
TEST=Cyan PreEVT
BRANCH=None
Change-Id: I1b1139cc5a91d4b76959e4d64b3d363449e555e9
Signed-off-by: Kyoung Kim <kyoung.il.kim@intel.com>
Reviewed-on: https://chromium-review.googlesource.com/283552
Tested-by: Divya Jyothi <divya.jyothi@intel.com>
Reviewed-by: Shawn N <shawnn@chromium.org>
Reviewed-by: Alec Berg <alecaberg@chromium.org>
Commit-Queue: Divya Jyothi <divya.jyothi@intel.com>
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This commit introduces the build infrastructure changes needed for
creating a shared RO library. (libsharedobjs). The end goal is for the
library to contain various objects that can be shared with both the RO
and RW EC images.
Now, there are 3 make goals: ro, rw, and libsharedobjs.
In order for changes that are only specific to a single image (ie: RW
only) to be applied correctly, the object files are now built separately
for the RO, RW, shared objects library targets.
NOTE: Certain EC targets are incompatible with this model due to the
fact that only one image is present within flash at a time.
BRANCH=none
BUG=None
TEST=make -j buildall tests
TEST=make -j BOARD=cr50 xrefs
TEST=make BOARD=samus dis
TEST=Built samus EC image and compared that the final EC image was
identical to the upstream version (except for the git SHAs & version
strings).
CQ-DEPEND=CL:285934
Change-Id: I8e67f089710be9c6d7017718109262394bdad2f5
Signed-off-by: Aseda Aboagye <aaboagye@google.com>
Reviewed-on: https://chromium-review.googlesource.com/274079
Reviewed-by: Randall Spangler <rspangler@chromium.org>
Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
Tested-by: Aseda Aboagye <aaboagye@chromium.org>
Commit-Queue: Aseda Aboagye <aaboagye@chromium.org>
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Following features are enabled.
1. Initialise the ADC ports to avoid floating state due to thermistors.
2. Enable the daughter board volume buttons.
3. Enable the PMIC control support.
BUG=none
TEST=Device boots to UI.
BRANCH=none
Change-Id: I27907cb79e165ce6c3df9249a35904aa12717c95
Signed-off-by: Vijay Hiremath <vijay.p.hiremath@intel.com>
Reviewed-on: https://chromium-review.googlesource.com/284110
Reviewed-by: Shawn N <shawnn@chromium.org>
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BUG=chrome-os-partner:42853
TEST=make buildall -j
BRANCH=None
Change-Id: I025942a4349a7fcd27d3eec8e67476416fe070a8
Signed-off-by: Shawn Nematbakhsh <shawnn@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/286151
Reviewed-by: Alec Berg <alecaberg@chromium.org>
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Add setting HPD gpio to glados USB PD policy layer
BUG=chrome-os-partner:42321
BRANCH=none
TEST=make -j buildall
Change-Id: I293224fa5189c8827f1837877ffb791fddc7fb77
Signed-off-by: Alec Berg <alecaberg@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/285743
Reviewed-by: Todd Broch <tbroch@chromium.org>
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* Fixes cyan/board.h to use correct SPI part
* Adds new flash protection regions in spi_flash_reg.c
* Sets SRP register in flash_physical_protect_at_boot()
* Fixes a bug in COMPARE_BIT macro
* Makes spi_flash_set_status() fail only when both HW pin is asserted
AND SRP(s) are set
* Makes sure set_flash_set_status() completes before returning
BUG=chrome-os-partner:40908
BRANCH=master
TEST=on Cyan:
With WP pin de-asserted:
flashrom -p ec --wp-enable
flashrom -p ec --wp-status, make sure it is enabled
flashrom -p ec --wp-disable
flashrom -p ec --status, make sure it is disabled
flashrom -p ec --wp-enable
Assert WP pin (either with screwdriver or dut-control)
flashrom -p ec --wp-disable
make sure it failed
Change-Id: I338cc906b73e723fdbb37f7c2fd0c4da358b6c8e
Signed-off-by: Andrey Petrov <andrey.petrov@intel.com>
Reviewed-on: https://chromium-review.googlesource.com/276671
Reviewed-by: Shawn N <shawnn@chromium.org>
Tested-by: Divya Jyothi <divya.jyothi@intel.com>
Commit-Queue: Divya Jyothi <divya.jyothi@intel.com>
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motion sense task is not included, we don't need to define the sensor
array.
BRANCH=none
BUG=none
TEST=compile
Change-Id: I22d130e0c211aaa3ac3ada480a8a065bf34987e5
Signed-off-by: Gwendal Grignou <gwendal@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/284617
Reviewed-by: Shawn N <shawnn@chromium.org>
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Allow multiple GPIOs to wake the EC from hibernate by requiring boards
to define hibernate_wake_pins and hibernate_wake_pins_used. In addition,
clean up the GPIO-skipping hibernate code, and skip setting PCH_RTCRST
as an input due to a bug on certain boards.
BUG=chrome-os-partner:42104
TEST=Manual on Glados. Run 'hibernate' from EC console, verify that EC
wakes with power button press or with "dut-control lid_open:no".
BRANCH=None
Signed-off-by: Shawn Nematbakhsh <shawnn@chromium.org>
Change-Id: I13a6e062393cab8ed7129eda253585951f771109
Reviewed-on: https://chromium-review.googlesource.com/285924
Reviewed-by: Alec Berg <alecaberg@chromium.org>
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Signed-off-by: Anton Staaf <robotboy@chromium.org>
BRANCH=None
BUG=None
TEST=make buildall -j
Change-Id: Ic67fa454fe61c8b3419934c98ade75099163f7f2
Reviewed-on: https://chromium-review.googlesource.com/285022
Trybot-Ready: Anton Staaf <robotboy@chromium.org>
Tested-by: Anton Staaf <robotboy@chromium.org>
Reviewed-by: Stephen Barber <smbarber@chromium.org>
Commit-Queue: Anton Staaf <robotboy@chromium.org>
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Enable SOC G3 and Psuedo G3 for Strago
BUG=none
TEST=Verified on Strago DVT
BRANCH=none
Change-Id: I493675c868bd1e0c8c3b1e6ee138a565c91159c0
Signed-off-by: Kyoung Kim <kyoung.il.kim@intel.com>
Signed-off-by: li feng <li1.feng@intel.com>
Reviewed-on: https://chromium-review.googlesource.com/283639
Reviewed-by: Shawn N <shawnn@chromium.org>
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Add VCONN type-C config option to set VCONN gpio as part
of type-C state machine.
BUG=chrome-os-partner:42321, chrome-os-partner:41838
BRANCH=none
TEST=make -j buildall
load onto glados, plug in hoho and make sure vconn gpio
is enabled
Change-Id: I8df13d58899e82af4c5975a68a014ccd82ae8e8c
Signed-off-by: Alec Berg <alecaberg@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/285742
Reviewed-by: Shawn N <shawnn@chromium.org>
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In order to support DMA transfers in one or both directions the usart
driver needs to be configurable with producer/consumer operations and
interrupt handler functions. These are now packaged up in the usart_rx
and usart_tx structs, and versions for interrupt driven RX and TX are
provided.
Signed-off-by: Anton Staaf <robotboy@chromium.org>
BRANCH=None
BUG=None
TEST=make buildall -j
Change-Id: I3fd14c675c90873e903195b8e20d2070d2eda5ac
Reviewed-on: https://chromium-review.googlesource.com/285023
Trybot-Ready: Anton Staaf <robotboy@chromium.org>
Tested-by: Anton Staaf <robotboy@chromium.org>
Reviewed-by: Todd Broch <tbroch@chromium.org>
Tested-by: Todd Broch <tbroch@chromium.org>
Commit-Queue: Anton Staaf <robotboy@chromium.org>
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