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* Handle IRQ from TPS65090, pass AC status to APSimon Que2012-08-144-1/+5
| | | | | | | | | | | | | | | | | | | Changes made by this patch: 1. Create IRQ handler for the TPS65090 IRQ. IRQ wakes up charger task. 2. Charger task sets the AC_STATUS GPIO based on the AC status. 3. Initialize PMU at power-on. BRANCH=snow BUG=chrome-os-partner:11739 TEST=Power on the system, with servo v2 connected to EC console. Plug and unplug AC. The IRQ handler should be triggered. Change-Id: Ice23411c275111fdb56d2c47ba28c3c44dee4d71 Signed-off-by: Simon Que <sque@chromium.org> Reviewed-on: https://gerrit.chromium.org/gerrit/29914 Commit-Ready: Rong Chang <rongchang@chromium.org> Reviewed-by: Rong Chang <rongchang@chromium.org> Tested-by: Rong Chang <rongchang@chromium.org>
* Don't drive HDA_SDORandall Spangler2012-08-091-1/+5
| | | | | | | | | | | | BUG=chrome-os-partner:12453 TEST=play a youtube video, hear audio Cherry-pick to link. Change-Id: Ibc81fb5ac91b15aeb7c222b637aace31562d6170 Signed-off-by: Randall Spangler <rspangler@chromium.org> Reviewed-on: https://gerrit.chromium.org/gerrit/29775 Reviewed-by: Bill Richardson <wfrichar@chromium.org>
* stm32f100: implement low power modeVincent Palatin2012-08-091-0/+3
| | | | | | | | | | | | | | | | | | | | | When the AP is not running and we have enough time go to STOP mode instead of simple idle. The EC consumption should drop from 12mW to a few mW. This is currently not activated by default, you need to type "sleepmask 0" in the EC console to activate it. Signed-off-by: Vincent Palatin <vpalatin@chromium.org> BUG=chrome-os-partner:8866 TEST=on Snow, check the software is still working properly when STOP mode is activated and measure power consumption on 3v_alw rail. Change-Id: I231d76fe6494c07b198c41694755b82d87c00e75 Reviewed-on: https://gerrit.chromium.org/gerrit/29315 Tested-by: Vincent Palatin <vpalatin@chromium.org> Reviewed-by: Randall Spangler <rspangler@chromium.org> Commit-Ready: Vincent Palatin <vpalatin@chromium.org>
* Remove signature-based vboot supportRandall Spangler2012-08-074-5/+0
| | | | | | | | | | | | | | | | | | | | Superseded by EC software sync (hash-based). Sig-based vboot was correctly implemented, but ended up being too slow to be useful given the limited processing power of the EC chips, and we also couldn't come up with a manageable way to handle A/B autoupdate of signed EC firmware. This change and an associated vboot_reference change shrinks the EC binary by ~2KB. BUG=chrome-os-partner:11232 TEST=build link,snow; boot link and check that 'hash' command still works. Change-Id: I3f03ae2d0a4030977826980d6ec5613181e154c2 Signed-off-by: Randall Spangler <rspangler@chromium.org> Reviewed-on: https://gerrit.chromium.org/gerrit/29496 Reviewed-by: Bill Richardson <wfrichar@chromium.org>
* snow daisy: compute RW firmware hashVincent Palatin2012-08-064-0/+10
| | | | | | | | | | | | | | | | | Activate the VBOOT code to compute the SHA256 hash of the RW partition of the EC firmware. Signed-off-by: Vincent Palatin <vpalatin@chromium.org> BUG=None TEST=On Snow, reset the EC and see the hash is computed at startup. Change-Id: Id1930f823ef516e459b4905c7d0f301568fddf0f Reviewed-on: https://gerrit.chromium.org/gerrit/29279 Reviewed-by: Vic Yang <victoryang@chromium.org> Reviewed-by: Randall Spangler <rspangler@chromium.org> Commit-Ready: Vincent Palatin <vpalatin@chromium.org> Tested-by: Vincent Palatin <vpalatin@chromium.org>
* snow: remove debug features to save RAMVincent Palatin2012-08-061-2/+2
| | | | | | | | | | | | | | | | | | We need a bit more internal RAM for verified boot hash feature, let's de-activate RAM hungry debug features. Signed-off-by: Vincent Palatin <vpalatin@chromium.org> BUG=chrome-os-partner:12271 chrome-os-partner:10895 TEST=make BOARD=snow check RAM size with CONFIG_VBOOT and CONFIG_VBOOT_HASH activated. Change-Id: I4d1d6c0f99a8b03011af6eb2d73455beba93c535 Reviewed-on: https://gerrit.chromium.org/gerrit/29278 Reviewed-by: Vic Yang <victoryang@chromium.org> Reviewed-by: Randall Spangler <rspangler@chromium.org> Commit-Ready: Vincent Palatin <vpalatin@chromium.org> Tested-by: Vincent Palatin <vpalatin@chromium.org>
* snow: add keypress noise suppressionDavid Hendricks2012-08-011-0/+7
| | | | | | | | | | | | | | | | | | | This was implemented for Daisy a long time ago, but left out on Snow due to some confusion. GPIO remapping is already handled because PD1 and PD0 (which is used for ENTERING_RW) are remapped together. So all we need here is the board_keyboard_suppress_noise() function definition which gets called from the keyboard scanning code whenever a change is detected. BUG=none TEST=Verified using a scope that CODEC_INT line is driven when a key is pressed (15us pulse) Signed-off-by: David Hendricks <dhendrix@chromium.org> Change-Id: Ifd358eb89a9547c4f4b9536b8922c93d2c3b77a0 Reviewed-on: https://gerrit.chromium.org/gerrit/28989 Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
* Snow has write protect pin (PB4) wired to EC.Louis Yung-Chieh Lo2012-08-012-8/+2
| | | | | | | | | | | | | | Intend to keep fake_wp functions for test. BUG=chrome-os-partner:9986 TEST=build only (success on link/snow/daisy/bds). Have no hardware to test. Change-Id: I1e2ae923790d65b6c95819f5274dbe8c7f254429 Signed-off-by: Louis Yung-Chieh Lo <yjlou@chromium.org> Reviewed-on: https://gerrit.chromium.org/gerrit/28793 Commit-Ready: Yung-Chieh Lo <yjlou%chromium.org@gtempaccount.com> Tested-by: Yung-Chieh Lo <yjlou%chromium.org@gtempaccount.com> Reviewed-by: Randall Spangler <rspangler@chromium.org>
* Rename TMP006 sensorsVic Yang2012-07-311-33/+33
| | | | | | | | | | | BUG=chrome-os-partner:12010 TEST=Build success Change-Id: I2557ec1568bc0b13a4dd25bbd85dffb9dccd6468 Reviewed-on: https://gerrit.chromium.org/gerrit/28764 Reviewed-by: Randall Spangler <rspangler@chromium.org> Commit-Ready: Vic Yang <victoryang@chromium.org> Tested-by: Vic Yang <victoryang@chromium.org>
* Revert "Enable snow I2C host auto detection"Rong Chang2012-07-302-40/+0
| | | | | | | | | | | | | | | | This reverts commit 024c44cd96bf97e81d4d3af45a0f0cb0ef1425a0. board/snow/board.c board/snow/board.h Signed-off-by: Rong Chang <rongchang@chromium.org> BUG=chrome-os-partner:10622 TEST=build snow ec image without warning Change-Id: I65660383873907722933b41249e17dd1f83d8fde Reviewed-on: https://gerrit.chromium.org/gerrit/28698 Commit-Ready: Rong Chang <rongchang@chromium.org> Tested-by: Rong Chang <rongchang@chromium.org> Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
* Set TPSCHROME temp range configurationRong Chang2012-07-291-22/+30
| | | | | | | | | | | | | | | | | | | Signed-off-by: Rong Chang <rongchang@chromium.org> BUG=chrome-os-partner:11627 TEST=manual Check pmu registers under uart console: "pmu" TPSCHROME version < 3: reg(7) == 0xbd reg(8) == 0xfd TPSCHROME version >= 3: reg(7) == 0xbf reg(8) == 0xff Change-Id: Ifeda54aa142b362aa224575c55220913b0ee7436 Reviewed-on: https://gerrit.chromium.org/gerrit/28587 Reviewed-by: Vic Yang <victoryang@chromium.org> Commit-Ready: Rong Chang <rongchang@chromium.org> Tested-by: Rong Chang <rongchang@chromium.org>
* Set correct name for new TMP006 sensorsVic Yang2012-07-241-24/+24
| | | | | | | | | | | BUG=chrome-os-partner:11491 TEST=none Change-Id: I00a59554fb5819c0942d917f8d558c1a00570a73 Reviewed-on: https://gerrit.chromium.org/gerrit/28251 Reviewed-by: Randall Spangler <rspangler@chromium.org> Commit-Ready: Vic Yang <victoryang@chromium.org> Tested-by: Vic Yang <victoryang@chromium.org>
* bitrot: disable VBOOT_SIG for BDS. It's broken.Bill Richardson2012-07-231-1/+1
| | | | | | | | | | | | | | | | | | BDS has been slowly rotting as we make changes for Link. I haven't been able to test the BDS image for some time (I think due to openocd updates that no longer like the BDS configs), and now it doesn't even compile. This is gating the Link schedule, so I'm just turning it off. If we ever need the BDS again, well, what fun. BUG=none TEST=none It already doesn't work, so it should continue to not work. Change-Id: I2b365623903590a56948dfceb986a2300699f541 Signed-off-by: Bill Richardson <wfrichar@chromium.org> Reviewed-on: https://gerrit.chromium.org/gerrit/28181 Reviewed-by: Randall Spangler <rspangler@chromium.org>
* Add new TMP006 sensorsVic Yang2012-07-182-3/+47
| | | | | | | | | | | | | | Signed-off-by: Vic Yang <victoryang@chromium.org> BUG=chrome-os-partner:11491 TEST=Build success. System still works fine except with error when reading currently non-existing sensors. Change-Id: I2fa1298ab11296f8b492534b5a8893588df34c82 Reviewed-on: https://gerrit.chromium.org/gerrit/27766 Reviewed-by: Randall Spangler <rspangler@chromium.org> Tested-by: Vic Yang <victoryang@chromium.org> Commit-Ready: Vic Yang <victoryang@chromium.org>
* Fix I2C arbitration timeout when chipset is suspendedRong Chang2012-07-171-2/+3
| | | | | | | | | | | | | | | When system is off or suspended, board_i2c_claim() should not wait for AP's signal. Signed-off-by: Rong Chang <rongchang@chromium.org> BUG=chrome-os-partner:11285 TEST=manual Put AP into suspend Type 'i2c r 0x90 0' and see that no arbitration error is obtained. Change-Id: I22243457fc29bc6c88f413ce0660c700e54f6761 Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-on: https://gerrit.chromium.org/gerrit/27498
* Remove firmware BRandall Spangler2012-07-171-1/+0
| | | | | | | | | | BUG=chrome-os-partner:11449 TEST=build link, snow, bds; ectool reboot_ec cold to make sure enums line up Change-Id: Ie09db2080a00f1a7e2c05579b9b41ea5137c1af0 Signed-off-by: Randall Spangler <rspangler@chromium.org> Reviewed-on: https://gerrit.chromium.org/gerrit/27658 Reviewed-by: Bill Richardson <wfrichar@chromium.org>
* Map 256 bytes of data for host command args/paramsRandall Spangler2012-07-121-6/+6
| | | | | | | | | | | | | And retain compatibility for old requests. BUG=chrome-os-partner:11275 TEST=from u-boot prompt, 'mkbp hash' from root shell, 'ectool flashread 0 68084 /tmp/foo' then compare to first 68084 bytes of ec.bin Change-Id: Id82068773703543febde79fc820af7486502e01f Signed-off-by: Randall Spangler <rspangler@chromium.org> Reviewed-on: https://gerrit.chromium.org/gerrit/27226
* Rename battery pack file and limit trickle charging currentRong Chang2012-07-121-1/+1
| | | | | | | | | | | | | | | | | | | | | | The spec of link internal battery pack changed. This CL adds parameter for new pack, and renames vendor specific source file accordingly. The new trickle charging current limit should fix the slow pre-charging issue. Signed-off-by: Rong Chang <rongchang@chromium.org> BUG=chrome-os-partner:11298,10201 TEST=manual The minimum trickle charging current should be very close to 0.01 C (85mA). Previous battery pack firmware uses 5mA in pre- charging. Change-Id: I0bad679db7dd087894297e6eb0e85c9b12fdf444 Reviewed-on: https://gerrit.chromium.org/gerrit/27256 Reviewed-by: Vic Yang <victoryang@chromium.org> Commit-Ready: Rong Chang <rongchang@chromium.org> Tested-by: Rong Chang <rongchang@chromium.org>
* Get AC state from GPIO instead of PMURong Chang2012-07-114-0/+4
| | | | | | | | | | | | | Signed-off-by: Rong Chang <rongchang@chromium.org> BUG=none TEST=manual plug and unplug the ac adapter, check charging state Change-Id: I933976d79bbd2da59449f0b9208656897713ebf2 Reviewed-on: https://gerrit.chromium.org/gerrit/27146 Reviewed-by: Simon Glass <sjg@chromium.org> Commit-Ready: Rong Chang <rongchang@chromium.org> Tested-by: Rong Chang <rongchang@chromium.org>
* Set proper value for BOOTCFGVic Yang2012-07-101-7/+4
| | | | | | | | | | | | | | | | | | | | | | We choose PE2/USB1_CTL1 for BOOTCFG. If we somehow brick the EC, we can pull this signal to ground and boot EC into boot loader to recover it. BUG=chrome-os-partner:8769 TEST=On link: - Factory reset EC to clear BOOTCFG - Flash new EC binary and reboot - rw 0x400fe1d0 to check BOOTCFG value is correctly written - Boot normally and check EC is operating correctly - Pull the signal to ground and reset EC, check EC stays in boot loader. Check in this case we can program EC. - Attempt to write different value to BOOTCFG and check BOOTCFG doesn't change. Change-Id: Ia6705114d495b18bd7ee4afc1e61e84a21b51198 Reviewed-on: https://gerrit.chromium.org/gerrit/27000 Reviewed-by: Vic Yang <victoryang@chromium.org> Tested-by: Vic Yang <victoryang@chromium.org> Commit-Ready: Vic Yang <victoryang@chromium.org>
* Host command interface has only one slot nowRandall Spangler2012-07-101-5/+5
| | | | | | | | | | | | | | Now that ACPI events are handled directly in the LPC interrupt handler, we can simplify the host event code. BUG=chrome-os-partner:11240 TEST=boot system; should boot close lid; should send SMI and suspend system Change-Id: I8c73ea31a66e94310e4460a008635a103220413e Signed-off-by: Randall Spangler <rspangler@chromium.org> Reviewed-on: https://gerrit.chromium.org/gerrit/27100 Reviewed-by: Bill Richardson <wfrichar@chromium.org>
* Remove fake dev switchRandall Spangler2012-07-101-3/+0
| | | | | | | | | | | | | | BUG=chrome-os-partner:9922 TEST=manual Press power+refresh+d. From ec console, 'optget'. No reference to fake dev switch From host, 'ectool vboot'. Should see either 'fake_dev=0' or no mention of fake dev switch at all. Change-Id: I66bc5e926d6e639b206563e764bcc730cce9227c Signed-off-by: Randall Spangler <rspangler@chromium.org> Reviewed-on: https://gerrit.chromium.org/gerrit/27061 Reviewed-by: Bill Richardson <wfrichar@chromium.org>
* Lower I2C frequency to meet specVic Yang2012-07-081-2/+1
| | | | | | | | | | | | | | For I2C bus connected to PCH, clock frequency must not exceed 100KHz. Lower temp sensor I2C bus to meet PCH spec. BUG=chrome-os-partner:9928 TEST=Still able to read I2C temperature sensors. Change-Id: Idec66d9124f61dc12e763561e0364c9ddb9ffeb0 Reviewed-on: https://gerrit.chromium.org/gerrit/26884 Reviewed-by: Randall Spangler <rspangler@chromium.org> Commit-Ready: Vic Yang <victoryang@chromium.org> Tested-by: Vic Yang <victoryang@chromium.org>
* snow/daisy: enable lid openDavid Hendricks2012-07-072-2/+6
| | | | | | | | | | | | | | | | | This enables lid open on Snow (and presumably Daisy). For now we only care about interrupting on lid open (rising edge of LID_OPEN) to turn on the AP. BUG=chrome-os-partner:9708 TEST=Tested on Snow Signed-off-by: David Hendricks <dhedndrix@chromium.org> Change-Id: I8f6cb4dd9d3ebc0380c8a5e7a3f2ce967e3eff48 Reviewed-on: https://gerrit.chromium.org/gerrit/26648 Reviewed-by: David Hendricks <dhendrix@chromium.org> Tested-by: David Hendricks <dhendrix@chromium.org> Commit-Ready: David Hendricks <dhendrix@chromium.org>
* snow: Add pmu command to print out pmu registersSimon Glass2012-07-051-0/+2
| | | | | | | | | | | | | | | | This command is primarily useful for testing, since it repeatedly hammers the i2c bus. Enable the command on snow for now. BUG=chrome-os-partner:10888 TEST=manual: run 'pmu 100' on snow and see that it displays the correct output. Change-Id: I36c15af195d17f67dff4c05559d1756693a65c19 Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-on: https://gerrit.chromium.org/gerrit/26829 Reviewed-by: David Hendricks <dhendrix@chromium.org>
* i2c: Add delay after bus release, print an error on failureSimon Glass2012-07-051-1/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Change the delay for bus claim to 100ms, since in testing with the AP requesting the bus constantly, I was able to make a 50ms timeout happen after about 3000 transactions. With 100ms, the timeout happens only once in 130,000 i2c transactions with both AP and EC fully loading the i2c bus simulataneously. The bus claim failure should never happen, but in case it does, print an error. Also make sure we delay for a bit, to allow the AP to see the change in state. BUG=chrome-os-partner:10888 TEST=manual: build for all boards boot on snow, test: on AP: $ while true; do i2cdump -f -y 4 0x48; done >/dev/null on EC: $ pmu 10000 See that the machine operates normally with no lock-ups, etc. Change-Id: I9a48144f560c596429c525a42c77ac41ec095ec0 Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-on: https://gerrit.chromium.org/gerrit/26828 Reviewed-by: David Hendricks <dhendrix@chromium.org>
* snow: Enable I2C bus arbitration on host portSimon Glass2012-07-051-0/+1
| | | | | | | | | | | | | | | | | | | | Enable this feature so that we can be a bus master on the I2C host port when the AP is not using it. BUG=chrome-os-partner:10888 TEST=manual: build for all boards boot on snow, test that: - keyboard still works in U-Boot - battery charging is enabled - U-Boot can see TPSCHROME - keyboard works in kernel - kernel reports battery levels correctly Change-Id: Ie17e38feea721355a738d85f0295ed5f145c8a0c Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-on: https://gerrit.chromium.org/gerrit/26826 Reviewed-by: David Hendricks <dhendrix@chromium.org>
* Enable help debug features on all boardsSimon Glass2012-07-044-0/+17
| | | | | | | | | | | | | This ensures that we have all available help enabled. For the moment this is useful for development. We may revisit later. BUG=chrome-os-partner:10895 TEST=manual: build for all boards Change-Id: I721e09995959638660ff417dd9420200e2e1a703 Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-on: https://gerrit.chromium.org/gerrit/26173
* Initialize PMU default settings using board configurationRong Chang2012-07-032-1/+43
| | | | | | | | | | | | | Signed-off-by: Rong Chang <rongchang@chromium.org> BUG=chrome-os-partner:11749 TEST=on snow with fully discharged dead battery plug ac power and check if it can charge to full Change-Id: Ie90255614bff879780edbd2bf1fc77bf8e2c04c8 Reviewed-on: https://gerrit.chromium.org/gerrit/26674 Reviewed-by: David Hendricks <dhendrix@chromium.org> Commit-Ready: Rong Chang <rongchang@chromium.org> Tested-by: Rong Chang <rongchang@chromium.org>
* snow: Implement I2C arbitrationSimon Glass2012-07-021-0/+71
| | | | | | | | | | | | | | | | | | | | | | | Use two suitable GPIOs to implement a simple arbitration scheme. Each side owns one of the GPIOs, which are normally pulled high. When one side wants to use I2C as a master, it pulls its GPIO low, waits for a short period to make sure that the other side is not also pulling its GPIO low, and then goes ahead with the transaction. When the transaction is over, the GPIO is released, thus freeing the I2C bus up for use by the other end. For simplicity the terminolgy used here is EC for us, and AP for the other end. BUG=chrome-os-partner:10888 TEST=manual: build for all boards boot on snow (cannot test i2c as it is broken) Change-Id: I97d9fbd5aba8248c8c1240baaec17db22860665c Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-on: https://gerrit.chromium.org/gerrit/26142
* Daisy/Snow: Drive power LED with PWMDavid Hendricks2012-07-022-2/+9
| | | | | | | | | | | | | | | | | | | | This drives the power LED for Snow (PB3) using TIM2 in PWM mode. Since timer setup and manipulation is STM32-specific, the power LED logic moved to to chip/stm32/power_led.c. This also adds a "powerled" console command for testing. Signed-off-by: David Hendricks <dhendrix@chromium.org> BUG=chrome-os-partner:10647 TEST=Tested on Snow with powerled command, compiled for Daisy Change-Id: I5a7dc20d201ea058767e3e76d54e7c8567a3b83c Reviewed-on: https://gerrit.chromium.org/gerrit/26267 Commit-Ready: David Hendricks <dhendrix@chromium.org> Reviewed-by: David Hendricks <dhendrix@chromium.org> Tested-by: David Hendricks <dhendrix@chromium.org>
* Fix multiple charging issues on snowRong Chang2012-07-011-2/+3
| | | | | | | | | | | | | | | | | | | This change fixes mutiple snow charging issues. Including: - disable i2c host auto selection - i2c_read8 got wrong output value - pmu CHARGE_EN control workaround Signed-off-by: Rong Chang <rongchang@chromium.org> BUG=chrome-os-partner:11010 TEST=Only test on snow dvt with AP turned off plug/unplug ac adapter and check charging led check console command 'battery' Change-Id: I29d554b3daa4cfc538bd5bf5ba5233976d381861 Reviewed-on: https://gerrit.chromium.org/gerrit/26529 Tested-by: Rong Chang <rongchang@chromium.org> Commit-Ready: Rong Chang <rongchang@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
* stm32: Use SPI ports for i2c arbitrationSimon Glass2012-06-284-17/+6
| | | | | | | | | | | | | | | We plan to use two of the SPI ports (NSS and MISO) for arbitration on the i2c host interface. In preparation for this, add the extra GPIO to the table, and change NSS to a pull-up. BUG=chrome-os-partner:10888 TEST=manual: build for all boards boot on snow Change-Id: I70962b25f371a4ca54f0ce67dcf0bc33b1cc8c47 Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-on: https://gerrit.chromium.org/gerrit/26139
* TPSChrome charging loopRong Chang2012-06-261-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | This change contains a basic charging loop that follows Chromium battery charging flow. The temperature range constants, loop delay time will be move to battery pack later. Signed-off-by: Rong Chang <rongchang@chromium.org> BUG=chrome-os-partner:9724,9757,9759 TEST=manual, uart console Plug AC adapter: > pmu event: 0000000000001110 [batt] state discharging -> idle [batt] state idle -> charging > battery I: 0x04fd = 1277 mA(CHG)a Unplug AC adapter: > pmu event: 0000000000000110 [batt] state charging -> idle [batt] state idle -> discharging > battery I: 0xffcb = -53 mA(DISCHG) Change-Id: Ifed594d78c0ed08c5e4821a9c8581c1a87526729 Reviewed-on: https://gerrit.chromium.org/gerrit/25618 Tested-by: Vincent Palatin <vpalatin@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org> Commit-Ready: Vincent Palatin <vpalatin@chromium.org>
* Only one RW image is now the defaultRandall Spangler2012-06-264-0/+17
| | | | | | | | | | | | And if RW B isn't enabled, it's not even linked. BUG=chrome-os-partner:10881 TEST=on link, should be no B image, and 'sysjump B' should fail On BDS, still should be A and B images Signed-off-by: Randall Spangler <rspangler@chromium.org> Change-Id: Icb2af07881cc7e28b9b877f45824486a22fde8d7 Reviewed-on: https://gerrit.chromium.org/gerrit/26116
* Strip out vboot signature code and stay in RO for linkRandall Spangler2012-06-263-3/+6
| | | | | | | | | | | | | | BUG=chrome-os-partner:10880 TEST=boot EC; should stay in RO and not do signature check (verify via debug console output) Signed-off-by: Randall Spangler <rspangler@chromium.org> Change-Id: I831aa91f8273bc7fb1a624cf36d9f21d52d8f3d8 Reviewed-on: https://gerrit.chromium.org/gerrit/26115 Reviewed-by: Bill Richardson <wfrichar@chromium.org> Tested-by: Randall Spangler <rspangler@chromium.org> Commit-Ready: Randall Spangler <rspangler@chromium.org>
* Add hash supportRandall Spangler2012-06-252-0/+2
| | | | | | | | | | | | | | | | | | | | | | EC computes a SHA-256 hash of its RW code on boot. Also adds host and console commands to tell the EC to recompute the hash, or hash a different section of flash memory. BUG=chrome-os-partner:10777 TEST=manual 1) ectool echash -> should match what the EC precomputed 2a) ectool echash recalc 0 0x10000 5 2b) on EC console, 'hash 0 0x10000 5' 2c) results should agree 3a) on ec console, 'hash 0 0x3e000' then quickly 'hash abort' 3b) ectool echash -> status should be unavailable 4) ectool echash start 0 0x3e000 6 && ectool echash && ectool echash abort && sleep 2 && ectool echash status should be busy, then unavailable Signed-off-by: Randall Spangler <rspangler@chromium.org> Change-Id: I6806d7b4d4dca3a74f476092551b4dba875d558e Reviewed-on: https://gerrit.chromium.org/gerrit/26023
* Remove proto1 workaroundsRandall Spangler2012-06-251-2/+2
| | | | | | | | | | | | | | | | | | | | | | | At this point, EC code requires EVT. If you still have a proto1, here's what'll break: 1) Keyboard recovery mode checks refresh key, and may read unreliably due to proto1 silego reset circuit. 2) Lightbar may not start in the correct state. 3) EC 'hibernate' command will not work. 4) Board version may read incorrectly. BUG=chrome-os-partner:9661 TEST=manual 1) powerbtn -> system powers on, lightbar displays proper sequence 2) version -> board version 1 (EVT) 3) power+refresh+esc -> system boots into recovery mode 4) power+refresh, then power button -> system reboots, then boots normally Signed-off-by: Randall Spangler <rspangler@chromium.org> Change-Id: I699946e365d15ae38622b69da1a0241e72d05f61 Reviewed-on: https://gerrit.chromium.org/gerrit/26053 Reviewed-by: Bill Richardson <wfrichar@chromium.org>
* Add 'fanduty' command both EC console and ectool.Bill Richardson2012-06-221-3/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | This forces the fan PWM duty cycle to a fixed percentage (0-100). It's only used for airflow testing. BUG=chrome-os-partner:10747 TEST=manual Using this ectool, try ectool fanduty 0 ectool pwmgetfanrpm ectool fanduty 50 ectool pwmgetfanrpm ectool fanduty 100 ectool pwmgetfanrpm You should see (and hear) the fan speed up. If you have an EC console, you can run faninfo and it should show that the 'Target:' is unrelated to the 'Actual:' value. Change-Id: Iac332fb3ba63f96726cf7f64061b3ce22d2e76fd Signed-off-by: Bill Richardson <wfrichar@chromium.org> Reviewed-on: https://gerrit.chromium.org/gerrit/25965 Reviewed-by: Randall Spangler <rspangler@chromium.org>
* stm32: don't try to use the AP I2C connection when the CPU is runningVincent Palatin2012-06-222-0/+2
| | | | | | | | | | | | | | | | | | If the EC shares the I2C-2 bus with the battery and the charger, we don't want to be a master on that bus when the AP is ON and can send us I2C messages. Signed-off-by: Vincent Palatin <vpalatin@chromium.org> BUG=none TEST=on Lucas DVT, check we can read battery info when AP is OFF and we cannot when AP is ON. Change-Id: I920a10ae9eff31bd00e4d3a5aec19d6f03b65a33 Reviewed-on: https://gerrit.chromium.org/gerrit/25959 Tested-by: Vincent Palatin <vpalatin@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org> Commit-Ready: Vincent Palatin <vpalatin@chromium.org>
* IR357x core/gfx regulator supportVincent Palatin2012-06-221-0/+2
| | | | | | | | | | | | | | | | | | | | | | add function read/write the IR3570/71 voltage regulator settings. This includes new settings for the IR3571 to avoid the freeze observed on new Link boards. Currently, these settings are not flashed permanently inside the IR3571, they are just applied at CPU startup (when the VR powered). Signed-off-by: Vincent Palatin <vpalatin@chromium.org> BUG=chrome-os-partner:10171 TEST=on Link EVT, check in the kernel log that we are longer seeing the warnings from the GPU driver and the jankyness. on Link proto-1, check the IR chip version detection. Change-Id: I0781f5285aac7a9f03c7c4eb953bf97273c6d404 Reviewed-on: https://gerrit.chromium.org/gerrit/24674 Tested-by: Vincent Palatin <vpalatin@chromium.org> Reviewed-by: Bill Richardson <wfrichar@chromium.org> Commit-Ready: Vincent Palatin <vpalatin@chromium.org>
* stm32: drive the keyboard power LEDVincent Palatin2012-06-226-4/+17
| | | | | | | | | | | | | | | | | | | | Put the power LED in the right state (off, on, breathing) depending on the AP state (off, running, suspending). The power LED is connected to GPIO B3. The AP suspend detection is done through GPIO A7. (so we no longer configure it as SPI alternate function) Signed-off-by: Vincent Palatin <vpalatin@chromium.org> BUG=chrome-os-partner:10647 TEST=on Lucas DVT, boot/stop the board and see the LED on and off. Change-Id: I42121aacab35e9da7a751dc9f56bcc5af7850783 Reviewed-on: https://gerrit.chromium.org/gerrit/25880 Reviewed-by: David Hendricks <dhendrix@chromium.org> Tested-by: Vincent Palatin <vpalatin@chromium.org> Commit-Ready: Vincent Palatin <vpalatin@chromium.org>
* Disable thermal thresholds for TMP006 sensor near CPUVic Yang2012-06-221-1/+1
| | | | | | | | | | | | | | | | This sensor doesn't provide accurate case temperature. Let's disable thermal thresholds for the object tempearture reading from this sensor. BUG=chrome-os-partner:9599 TEST=Build success. System works fine. Change-Id: I9408de59a3349f944c5e215085da93f23965ebc9 Reviewed-on: https://gerrit.chromium.org/gerrit/25824 Reviewed-by: Vincent Palatin <vpalatin@chromium.org> Reviewed-by: Randall Spangler <rspangler@chromium.org> Commit-Ready: Vic Yang <victoryang@chromium.org> Tested-by: Vic Yang <victoryang@chromium.org>
* snow: Enable command help and task profilingSimon Glass2012-06-221-0/+3
| | | | | | | | | | | | | These options are useful for devs, so enable them. BUG=none TEST=manual: build and boot on snow; See that the taskinfo command now shows non-zero data. Type help and see command help. Change-Id: I6bba1cc22498924ea6f151f2fe7e819ae7560e3c Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-on: https://gerrit.chromium.org/gerrit/25414
* snow: Turn on CONFIG_ASSERT_HELPSimon Glass2012-06-221-0/+1
| | | | | | | | | | | | | We want our friendly ASSERT() messages. BUG=chrome-os-partner:10149 TEST=manual Enable the option for snow, add a failing ASSERT() to the rw command and see the a nice message is printed now. Change-Id: I84587b209dc4a9d72310456ed2aca178256c5811 Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-on: https://gerrit.chromium.org/gerrit/25412
* Reenable EC console 'fanduty' command, for testing.Bill Richardson2012-06-221-0/+3
| | | | | | | | | | | | | | | | | | | | | | | BUG=chrome-os-partner:10747 TEST=manual Boot the CPU (the fan is off otherwise). From the EC console run faninfo It should show the fan duty cycle changing to maintain a specific RPM. Run fanduty 50 faninfo Now the fan duty cycle should be fixed around 50%. Change-Id: I13e4b0a7e5b2661769d64bf93342483d0419545d Signed-off-by: Bill Richardson <wfrichar@chromium.org> Reviewed-on: https://gerrit.chromium.org/gerrit/25900 Reviewed-by: Randall Spangler <rspangler@chromium.org>
* Calibrate TMP006 temperature sensorVic Yang2012-06-211-2/+2
| | | | | | | | | | | | | | | Update sensitivity factor of PCH sensor and charger sensor. Signed-off-by: Vic Yang <victoryang@chromium.org> BUG=chrome-os-partner:9599 TEST=Check temperature readings are more reasonable. Change-Id: Id975e977a7d5c9630ceeabf0174eeba7bd49e8a1 Reviewed-on: https://gerrit.chromium.org/gerrit/25821 Reviewed-by: Vincent Palatin <vpalatin@chromium.org> Tested-by: Vic Yang <victoryang@chromium.org> Commit-Ready: Vic Yang <victoryang@chromium.org>
* snow: Turn on CONFIG_PANIC_HELPSimon Glass2012-06-201-0/+3
| | | | | | | | | | | | | | | Add this option to make panics easier to decode. Also put panics in a new stack for snow. BUG=chrome-os-partner:10146 TEST=manual: build for all boards On snow, cause a panic and see that it is reported correctly. Change-Id: If0b90ec0cec4ccb10041bd12bc21b342581e7f62 Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-on: https://gerrit.chromium.org/gerrit/24506
* Enable snow I2C host auto detectionRong Chang2012-06-202-1/+41
| | | | | | | | | | | | | | | | | | | | | This change is picked from daisy change: I70f66581d0e921c83bc2051b2a521b332e18aa50 It should be reverted after rework all dev boards to new I2C config. Issue filed against this hack: http://crosbug.com/p/10622 Signed-off-by: Rong Chang <rongchang@chromium.org> BUG=chrome-os-partner:10622 TEST=manual Console commands: 'i2c r 0x90 4' - single byte pmu read 'battery' - double bytes battery read Change-Id: I3185d872dc5ef6673fcd7efddf8394fe73f11813 Reviewed-on: https://gerrit.chromium.org/gerrit/25743 Commit-Ready: Rong Chang <rongchang@chromium.org> Tested-by: Rong Chang <rongchang@chromium.org> Reviewed-by: Vic Yang <victoryang@chromium.org>
* Enable snow battery chargingRong Chang2012-06-201-0/+7
| | | | | | | | | | | | | | | | This change adds battery and PMU driver to snow board configuration. Charging is enabled in init function. EC I2C host is set to I2C2. Signed-off-by: Rong Chang <rongchang@chromium.org> BUG=chrome-os-partner:10608 TEST=manual Run uart console command 'i2c r 0x90 4'. Change-Id: Ie09749c33c6093a46ba0ea44d42910417a67f37a Reviewed-on: https://gerrit.chromium.org/gerrit/25501 Tested-by: Rong Chang <rongchang@chromium.org> Commit-Ready: Rong Chang <rongchang@chromium.org> Reviewed-by: Vic Yang <victoryang@chromium.org>
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