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* Switch temp sensor polling to use hooks instead of taskRandall Spangler2012-11-013-2/+2
| | | | | | | | | | | | | | This reduces memory / code size, and gets rid of ifdefs in temp_sensor.c. BUG=chrome-os-partner:15714 BRANCH=none TEST=boot system and run 'ectool temps all' every few seconds - ectool temps all The numbers should update over time. Change-Id: Idaac7e6e4cbc1d6689f5d3b607c623a5cc536a4f Signed-off-by: Randall Spangler <rspangler@chromium.org> Reviewed-on: https://gerrit.chromium.org/gerrit/36940
* stm32: Implement keyscan test infrastructureSimon Glass2012-10-311-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | Support the keyscan test functionality on stm32. Note: This is enabled by default so that it continues to build. But it is unlikely that we will want this in a shipping image. I suggest we add the facility for a dev build. Secondly, the stack has to be larger due to a printf (which admittedly I could just remove). Should we make the stack size conditional on the CONFIG? Seems a bit ugly, on the other hand we don't want to waste IRAM. BUG=chrome-os-partner:12179 BRANCH=none TEST=manual for now: On snow: ./ectool keyscan 20000 key_sequence.txt See that the test passes. Change-Id: Ic441ca0bde1be9589a924374605e2f146d16f423 Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-on: https://gerrit.chromium.org/gerrit/35118
* Switch PWM to use HOOK_SECOND instead of its own taskRandall Spangler2012-10-302-1/+1
| | | | | | | | | | | | | BUG=chrome-os-partner:15714 BRANCH=none TEST=taskinfo no longer shows PWM task, and 'ectool pwmgetfanrpm' updates as fan speed changes. Change-Id: Ia23f52527c40c8117238ddc2ee4c023f59eba05a Signed-off-by: Randall Spangler <rspangler@chromium.org> Reviewed-on: https://gerrit.chromium.org/gerrit/36939 Reviewed-by: Simon Glass <sjg@chromium.org>
* Watchdog is reloaded by HOOK_TICK, not its own taskRandall Spangler2012-10-305-5/+0
| | | | | | | | | | | | | This reduces memory footprint. BUG=chrome-os-partner:15714 BRANCH=none TEST=system still boots; 'waitms 1500' prints watchdog error dump Change-Id: Ieb0248a34655514b03d919cc36c2b369691da716 Signed-off-by: Randall Spangler <rspangler@chromium.org> Reviewed-on: https://gerrit.chromium.org/gerrit/36937 Reviewed-by: Simon Glass <sjg@chromium.org>
* Rename power_button module to switchRandall Spangler2012-10-302-10/+10
| | | | | | | | | | | | | | | Since it handles not just power button, but also lid switch, AC detect, and other switches. No functional changes; just renaming. BUG=chrome-os-partner:15579 BRANCH=none TEST=boot system, power on/off with power button Change-Id: I51628a52293f7207715f5f6bf368a08fe6c3dbce Signed-off-by: Randall Spangler <rspangler@chromium.org> Reviewed-on: https://gerrit.chromium.org/gerrit/36821
* Switch LPC to use HOOK_TICK instead of taskRandall Spangler2012-10-301-1/+0
| | | | | | | | | | | | BUG=chrome-os-partner:15714 BRANCH=none TEST=taskinfo no longer shows LPC task Change-Id: I693cc8695d89d0207076f12d82bdc1f30d5df7b7 Signed-off-by: Randall Spangler <rspangler@chromium.org> Reviewed-on: https://gerrit.chromium.org/gerrit/36910 Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bill Richardson <wfrichar@chromium.org>
* Add tick taskRandall Spangler2012-10-305-0/+5
| | | | | | | | | | | | | | | | | | | Adds a new HOOK_TICK event which is called every 250ms (LM4) or 500ms (STM32). This will be used to consolidate a number of tasks which do small amounts of work infrequently, and previously needed their own task functions. This CL adds the tick task; subsequent CLs will consolidate watchdog and other tasks into tick hooks. BUG=chrome-os-partner:15714 BRANCH=none TEST=taskinfo shows TICK task as lowest priority Change-Id: I9068ee99d56a5bf5c12afd86ad51998c013f4954 Signed-off-by: Randall Spangler <rspangler@chromium.org> Reviewed-on: https://gerrit.chromium.org/gerrit/36908 Reviewed-by: Simon Glass <sjg@chromium.org>
* Clean up ADC moduleRandall Spangler2012-10-303-10/+8
| | | | | | | | | | | | | | ADC config structs are now chip-specific; this saves code size (several hundred bytes on LM4, since no need for 24-entry ADC channel to GPIO mapping table). BUG=chrome-os-partner:15579 BRANCH=none TEST='adc' with system on and off; ChargerCurrent should be bigger when on. Change-Id: Ia88b3f043438bec049f2d2ad39fc42dcf86d9424 Signed-off-by: Randall Spangler <rspangler@chromium.org> Reviewed-on: https://gerrit.chromium.org/gerrit/36798
* Rename POWERSTATE task to CHARGERRandall Spangler2012-10-291-1/+1
| | | | | | | | | | | | | Since POWERSTATE is confusing whether it refers to battery power or system power. BUG=chrome-os-partner:15579 BRANCH=none TEST=taskinfo; see CHARGER task Change-Id: I5a237b1329cace4ce48ae39d8954c08a9912ed4b Signed-off-by: Randall Spangler <rspangler@chromium.org> Reviewed-on: https://gerrit.chromium.org/gerrit/36707
* Use CONFIG_TASK_VBOOTHASH instead of CONFIG_VBOOTRandall Spangler2012-10-234-10/+0
| | | | | | | | | | | | | | | This fixes build breaks in 'make tests'. BUG=none BRANCH=none TEST=make tests (note that this still fails due to other problems; will fix those in a followup CL) Change-Id: I5b5ce52ed6e44ade6051e0a091a6699c0454d61a Signed-off-by: Randall Spangler <rspangler@chromium.org> Reviewed-on: https://gerrit.chromium.org/gerrit/36353 Reviewed-by: Simon Glass <sjg@chromium.org>
* Hook functions no longer return valuesRandall Spangler2012-10-232-14/+5
| | | | | | | | | | | | | | | Previously, all hook functions returned EC_SUCCESS, which was meaningless because nothing ever looked at the return value. Changing the return value to void saves ~100 bytes of code size and an equal amount of source code size. BUG=none BRANCH=none TEST=code still builds; link still boots Change-Id: I2a636339894e5a804831244967a9c9d134df7d13 Signed-off-by: Randall Spangler <rspangler@chromium.org> Reviewed-on: https://gerrit.chromium.org/gerrit/36372
* link: don't rely on host-write interrupt statusRandall Spangler2012-10-171-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | This works around a potential LM4 chip problem where edges on the FRMH status bit don't always trigger interrupts. The workaround is to look at FRMH for each channel in the interrupt handler rather than the interrupt status, and to trigger the interrupt every 250ms to sweep up any missed writes. We already do this for port 80 writes; this just extends the workaround to all channels. BUG=chrome-os-partner:13965 BRANCH=link TEST=manual - boot system - EC console should show a number of HC lines for host command - EC console should show a number of ACPI queries - switch to root shell; keyboard should work - ectool version should work Change-Id: If02d685519c69ee88c055c8374a6c655a277e637 Signed-off-by: Randall Spangler <rspangler@chromium.org> Reviewed-on: https://gerrit.chromium.org/gerrit/35871 Reviewed-by: Simon Glass <sjg@chromium.org>
* spring: force power on LCD and backlightVincent Palatin2012-10-152-0/+17
| | | | | | | | | | | | | | | | | For board bring-up. Signed-off-by: Vincent Palatin <vpalatin@chromium.org> BRANCH=none BUG=chrome-os-partner:10912 chrome-os-partner:14324 TEST=on Spring, boot the AP, issue "pmu" command on the EC console and FET1 and FET6 (registers 0xf and 0x14) contains 0x13. Change-Id: Ic8fd681c2e2f3e2168de2cb7f83920d4feefd485 Reviewed-on: https://gerrit.chromium.org/gerrit/33703 Commit-Ready: Vincent Palatin <vpalatin@chromium.org> Tested-by: Vincent Palatin <vpalatin@chromium.org> Reviewed-by: David Hendricks <dhendrix@chromium.org>
* spring: de-activate power LED codeVincent Palatin2012-10-111-1/+0
| | | | | | | | | | | | | | | | the power LED code is doing useless operations and messing up with the former LED pin. Signed-off-by: Vincent Palatin <vpalatin@chromium.org> BUG=chrome-os-partner:14313 TEST=make BOARD=spring Change-Id: Idf44bdb7b7a779706bd6579fb66ba3e6932de89f Reviewed-on: https://gerrit.chromium.org/gerrit/35273 Commit-Ready: Vincent Palatin <vpalatin@chromium.org> Tested-by: Vincent Palatin <vpalatin@chromium.org> Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
* spring: enable USB boost charger by defaultVincent Palatin2012-10-111-1/+1
| | | | | | | | | | | | | | | | | | | | | Needed for easy power on until we have the full USB charge state machine. note: the GPIO name ILIM_1500 is somewhat misleading, it is connected to the enable pin of the TPS43060 Signed-off-by: Vincent Palatin <vpalatin@chromium.org> BUG=chrome-os-partner:14319 TEST=manual : plug the board and press servo power button, see the AP rails coming up. Change-Id: I93421d1581065bcc1e7be07086e74d11d1e1ec56 Reviewed-on: https://gerrit.chromium.org/gerrit/35271 Commit-Ready: Vincent Palatin <vpalatin@chromium.org> Tested-by: Vincent Palatin <vpalatin@chromium.org> Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
* link: TMP006 S0 param is uncalibrated by defaultRandall Spangler2012-10-111-5/+4
| | | | | | | | | | | | | | | | | | | | S0 values are incorrect and may even need to be calibrated on a per-system basis. Set them to 0 by default so that the EC doesn't return inaccurate remote temperature readings before calibration data is sent. BUG=chrome-os-partner:15174 BRANCH=link TEST=manual - temps -> remote temps are all not calibrated - t6cal 1 s0 9301 - temps -> PCH D-Object temp now returns a temperature Change-Id: I43facc60cf947ebd9441a8a629a76f7ffc8f3959 Signed-off-by: Randall Spangler <rspangler@chromium.org> Reviewed-on: https://gerrit.chromium.org/gerrit/35302 Reviewed-by: Bill Richardson <wfrichar@chromium.org>
* link: Temp sensors can return not-powered error codeRandall Spangler2012-10-111-20/+10
| | | | | | | | | | | | | | | | | | | | | | | This removes the need for a separate method to check sensor power, and gets rid of temp_sensor.c knowledge of what powers each sensor. BUG=chrome-os-partner:15174 BRANCH=link TEST=manual - reboot - within a second, type 'temps'; I2C sensors should return error 1 - type 'temps' again; all sensors should return data - power off system - type 'temps' again; I2C sensors and PECI should return error 8 - 'gpioset enable_vs 1' - type 'temps' again; I2C sensors should return valid data; PECI should still return error 8. Change-Id: I17c353b3c483bc320769307c7715008ec729089b Signed-off-by: Randall Spangler <rspangler@chromium.org> Reviewed-on: https://gerrit.chromium.org/gerrit/35287 Reviewed-by: Bill Richardson <wfrichar@chromium.org>
* Refactor TMP006 moduleRandall Spangler2012-10-111-4/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | 1) Use floating-point more freely, since it's on all the time now, and the old fixed-point code no longer compiled. 2) Sensitivity and Bn values are now in a RAM-based struct in preparation for setting them at runtime. No changes from current values. 3) If a sensor fails to read good data, is initialized, or loses power, its die temperature history will be set to the next good temperature, rather than persisting an arbitrary start value or old state. This fixes reading wildly inaccurate object temperatures for the first few seconds following boot/resume. 4) If a sensor loses power, wait for the sensor to report data-ready before reading temperature/voltage. Otherwise, those read as 0, which again throws off the first few seconds of data. BUG=chrome-os-partner:14955 BRANCH=link TEST=Boot system and set at login screen for a minute to reach thermal equilibrium. Then reboot system, type 'temps' repeatedly. Data from TMP006's should initially be Error; after a second or so it should be good, and shouldn't change more than a few degrees. Change-Id: Id0b42b9b18e94978ba7d3a1ee33194e44b1904bc Signed-off-by: Randall Spangler <rspangler@chromium.org> Reviewed-on: https://gerrit.chromium.org/gerrit/35188
* Enable FPU support for Link ECBill Richardson2012-10-021-3/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | With this CL, if CONFIG_FPU is defined (only for Link, ATM), the EC task switcher will enable CONTROL.FPCA and expect all stack contexts to include floating point state as well as normal state (an additional 18 words). To support this, we need to increase the allocated stack space for each task. The stack sizes are already chosen empirically, so I'm just rounding them up a bit. BUG=chrome-os-partner:14766 BRANCH=Link TEST=manual There should be no noticeable change. If you run the EC command "taskinfo" you'll see the increased size each thread's stack, but everything that was working before should continue to work just fine. The additional overhead required to load and store another 18 words on each context switch is not really measurable (I tried). Change-Id: Ibaca7d7a2565285f049fda6906f32761e83207af Signed-off-by: Bill Richardson <wfrichar@chromium.org> Reviewed-on: https://gerrit.chromium.org/gerrit/34391 Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
* stm32f: ADC driverVic Yang2012-09-262-0/+22
| | | | | | | | | | | | | | | This adds basic ADC support for multiple channel conversion. BUG=chrome-os-partner:14316 BRANCH=none TEST=1. Boot on snow. 2. Use keyboard signal as input. Check read value changes as input signal changes. Change-Id: I3c15c37446fa9273d098f6d581573c11ced45b5e Signed-off-by: Vic Yang <victoryang@chromium.org> Reviewed-on: https://gerrit.chromium.org/gerrit/33883 Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
* Fix spring buildVincent Palatin2012-09-201-1/+1
| | | | | | | | | | | | | | | | | I pushed the wrong version of my previous CL I6384024a, a warning prevents the spring board from building successfully. Signed-off-by: Vincent Palatin <vpalatin@chromium.org> BUG=chrome-os-partner:14313 TEST=make BOARD=spring BRANCH=none Change-Id: If0b088daf7e3db7615fb778f3289d7fd7cf69f2a Reviewed-on: https://gerrit.chromium.org/gerrit/33700 Commit-Ready: Vincent Palatin <vpalatin@chromium.org> Reviewed-by: Vincent Palatin <vpalatin@chromium.org> Tested-by: Vincent Palatin <vpalatin@chromium.org>
* Add Spring board configurationVincent Palatin2012-09-204-0/+421
| | | | | | | | | | | | | | | | | | Assign GPIOs and board specific peripheral/pin mux configurations. Signed-off-by: Vincent Palatin <vpalatin@chromium.org> BUG=chrome-os-partner:14313 TEST=make BOARD=spring run spring binary on snow for basic sanity checking. BRANCH=none Change-Id: I6384024a0f27af67744e98a55b66d08f587bffa0 Reviewed-on: https://gerrit.chromium.org/gerrit/33631 Reviewed-by: David Hendricks <dhendrix@chromium.org> Tested-by: Vincent Palatin <vpalatin@chromium.org> Reviewed-by: Vic Yang <victoryang@chromium.org> Commit-Ready: Vincent Palatin <vpalatin@chromium.org>
* tpschrome: AC detection is board specific.Vincent Palatin2012-09-202-0/+67
| | | | | | | | | | | | | | | | | | | | | | the PMU VACG signal used to detect AC state is connected to a GPIO, so it's a board specific configuration. On top of that, Daisy variants have custom logic on that line which is not present on the next boards, so we need to update it before doing BSP for next-gen boards. Signed-off-by: Vincent Palatin <vpalatin@chromium.org> BUG=chrome-os-partner:14313 TEST=make BOARD=snow && make BOARD=daisy on snow EC console, type "pmu" command with AC plugge and unplugged, see that the "ac gpio" line reflects the right value. BRANCH=none Change-Id: If1e19b89b2f2de45d8dddc8340931e56c5f7f0a5 Reviewed-on: https://gerrit.chromium.org/gerrit/33630 Reviewed-by: David Hendricks <dhendrix@chromium.org> Commit-Ready: Vincent Palatin <vpalatin@chromium.org> Tested-by: Vincent Palatin <vpalatin@chromium.org>
* link: update hinge sensor calibrationVincent Palatin2012-09-191-1/+1
| | | | | | | | | | | | | | | | | | This calibration has been done with black tape covering the screw in front of the sensor to reduce machine to machine variability. Signed-off-by: Vincent Palatin <vpalatin@chromium.org> BUG=chrome-os-partner:9599 TEST=compare to thermocouple measurement on a couple of Link DVT machines at various operating points. BRANCH=link Change-Id: I3664acd49eaae788823a4ca87173c108659ede8c Reviewed-on: https://gerrit.chromium.org/gerrit/33527 Reviewed-by: Sameer Nanda <snanda@chromium.org> Tested-by: Vincent Palatin <vpalatin@chromium.org> Commit-Ready: Vincent Palatin <vpalatin@chromium.org>
* spi: Rewrite driver for new protocol, better performanceSimon Glass2012-09-171-1/+14
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The old spi driver has atrophied in various ways. It doesn't support the new protocol and does not build either. Rewrite the driver to: - Use dma for reception (rather than just reception) - This makes message reception more robust and allows us to process the new multi-byte commands - Add timeouts for rx and tx so that we don't wait forever - Increase buffer sizes to deal with new larger messages - Always send a preamble byte regardless of SPI clock speed (previously above 10MHz we sometimes miss this) - Use the NSS line to delineate transactions. When it drops, a transaction is starting. When it rises the transaction is immediately terminates regardless of state. This keeps the AP and EC in sync even in the event of timeouts, bus errors and other oddities. - Implement the new protocol which has a checksum, version byte, etc - Set up tx dma in advance and kick it when ready, thus ensuring that a message body is always attached immediately after the preamble - Use the new host_cmd_handle_args structure, which makes things much easier for us, since we don't need globals, and can use the send_response handler to know when a slow command is complete. - Handle the new type of 'slow' commands properly BUG=chrome-os-partner:10533 TEST=manual build and boot to kernel on snow Change-Id: I11767d1a6f045a86f6c9a0b4b1e943b660e4da33 Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-on: https://gerrit.chromium.org/gerrit/32076 Reviewed-by: Randall Spangler <rspangler@chromium.org>
* link: disable unused EEPROM modulesRandall Spangler2012-09-122-7/+10
| | | | | | | | | | | | | | | | Haven't found a use for these, so remove to reduce code size (reduces binary by 2KB) / complexity. These are still test-compiled on BDS so they'll be ready if needed. BUG=chrome-os-partner:11232 BRANCH=link TEST=build and boot firmware. 'help' should not show eeread/eewrite commands Change-Id: I0f2e41e21efcbbb0967a5b85b7c8a2ff8147460e Signed-off-by: Randall Spangler <rspangler@chromium.org> Reviewed-on: https://gerrit.chromium.org/gerrit/33112 Reviewed-by: Simon Glass <sjg@chromium.org>
* link: remove TMP006 sensors no longer present in DVT2Randall Spangler2012-09-112-75/+23
| | | | | | | | | | | | | | | | This removes sensors U10, U13, U15, and U29 BUG=chrome-os-partner:13274 BRANCH=link TEST=temps command should show only USB, PCH, hinge, charger die/object temps and PECI should still be the 10th temp sensor Change-Id: If33266ad87ec06a8d4272009d80e382fa4003e2b Signed-off-by: Randall Spangler <rspangler@chromium.org> Reviewed-on: https://gerrit.chromium.org/gerrit/32822 Reviewed-by: Duncan Laurie <dlaurie@chromium.org> Reviewed-by: Vic Yang <victoryang@chromium.org>
* Move pending command logic into host_commandSimon Glass2012-09-101-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | This logic doesn't really belong in drivers, since to enable another driver (like SPI) we must repeat it all. This is tricky if we enable both I2C and SPI. Move the logic into host_command. BUG=chrome-os-partner:10533 BRANCH=none TEST=manual Use U-Boot to test comms status functionality on snow: SMDK5250 # mkbp write rw 40000000 SMDK5250 # mkbp erase rw SMDK5250 # mkbp erase rw Change-Id: I3f90aada80208cd0540be14525f73f980ad33292 Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-on: https://gerrit.chromium.org/gerrit/32075 Reviewed-by: David Hendricks <dhendrix@chromium.org> Reviewed-by: Randall Spangler <rspangler@chromium.org>
* Switch to variable-size stacksRandall Spangler2012-09-094-41/+45
| | | | | | | | | | | | | | | | | | | | Increase stack size slightly for vboot hash task since the vboot SHA256 function allocates ~300 bytes of stack data. Reduce stack size for watchdog, power LED, and a few other tasks with simple call trees where we can be sure an error path isn't going to blow past the reduced stack. This frees up ~1KB of RAM on STM32. BUG=chrome-os-partner:13814 BRANCH=all TEST=boot system; shmem should show more unused RAM; taskinfo should show tasks still have unused stack Change-Id: I47d6b77564a0180d15d86667cc0566a8919b776e Signed-off-by: Randall Spangler <rspangler@chromium.org> Reviewed-on: https://gerrit.chromium.org/gerrit/32608 Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
* snow: re-configure I2C arbitration pins at AP off/on to fix leakageDavid Hendricks2012-09-071-15/+38
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This (re-)configures the I2C arbitration lines as floating inputs when the AP powers off, and restores them strictly before the AP powers on. This is intended to prevent leakage when the AP is off and arbitration is not needed. This CL does not impact the AP on/suspend case. Signed-off-by: David Hendricks <dhendrix@chromium.org> BRANCH=snow BUG=chrome-os-partner:12573,chrome-os-partner:12381 TEST=manual (see notes below) - PA4: SPI1_NSS / AP_CLAIM, input w/ pull-up when AP on - PA6: SPI1_MISO / EC_CLAIM, output when AP is on - Both floating when AP off 8 = input with pull up/down, 4 = floating input, 1 = output AP off (before this CL): > rw 0x40010800 read 0x40010800 = 0x41484144 > gpioget SPI1_NSS 0* SPI1_NSS > gpioget SPI1_MISO 1 SPI1_MISO AP off (after this CL): > rw 0x40010800 read 0x40010800 = 0x44444144 > gpioget SPI1_NSS 0* SPI1_NSS > gpioget SPI1_MISO 0* SPI1_MISO AP on or suspended (before and after this CL): > rw 0x40010800 read 0x40010800 = 0x81484144 > gpioget SPI1_NSS 1* SPI1_NSS > gpioget SPI1_MISO 1* SPI1_MISO Additional testing: - "pmu 10000" and "cros_test i2c" in u-boot only showed the FET2 control changing (as expected). - "pmu 10000" and "while [ 1 ] ; do i2cdump -f -y -r 0-24 4 0x48 b ; done" and ran "suspend_stress_test" for a couple dozen iterations. The registers only changed as expected (FET1 and FET6 turned off when suspending). Change-Id: I72f5cb1883d01b1faad6c2db65dfa09d477e1885 Reviewed-on: https://gerrit.chromium.org/gerrit/32078 Commit-Ready: David Hendricks <dhendrix@chromium.org> Reviewed-by: David Hendricks <dhendrix@chromium.org> Tested-by: David Hendricks <dhendrix@chromium.org>
* daisy: add GPIO_I2C_* pins to board header and GPIO tableDavid Hendricks2012-09-052-1/+12
| | | | | | | | | | | | | | | | This adds the I2C pins to the listing of Daisy GPIOs. This allows us to use GPIO_I2C_* for shared Daisy/Snow code. BRANCH=snow BUG=none TEST=compile tested for Daisy and Snow Signed-off-by: David Hendricks <dhendrix@chromium.org> Change-Id: I7413921b2dbe3f8cd79c88ab4bfc8ace0d72bd56 Reviewed-on: https://gerrit.chromium.org/gerrit/32261 Commit-Ready: David Hendricks <dhendrix@chromium.org> Tested-by: David Hendricks <dhendrix@chromium.org> Reviewed-by: Doug Anderson <dianders@chromium.org>
* Calibrate IR temperature sensors for Link DVTVincent Palatin2012-09-041-6/+6
| | | | | | | | | | | | | | | | | | | | | | | | The TMP006 IR sensors are calibrated against the temperature measured on the *external* side on the casing using a thermocouple stick at the vertical of the sensor. The hinge sensor is sending back strange values, and the Tobject from there should not be trusted. The DC-Jack C-case sensor is not calibrated (and will be removed soon). Signed-off-by: Vincent Palatin <vpalatin@chromium.org> BUG=None TEST=on Link DVT, compare EC temperature values against thermocouple readings. BRANCH=link Change-Id: I03375dd1c2f3a0aa56b0d2f343dad3b8f7581bc2 Reviewed-on: https://gerrit.chromium.org/gerrit/32156 Reviewed-by: Sameer Nanda <snanda@chromium.org> Commit-Ready: Vincent Palatin <vpalatin@chromium.org> Tested-by: Vincent Palatin <vpalatin@chromium.org>
* Snow: Dont hang when trying to pmic-reset boardCharlie Mooney2012-08-311-3/+8
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Old Snow board (non-MP) don't have the capability to hard-reset their pmics unless they've been manually fixed to do so. This means that if you have an old board, with a new copy of the EC on it and it tries to hard-reset the system, it will hang forever and trigger the watchdog. Since there's no way for the EC to check if the hardware fix exists on its board, this adds a timeout after trying to reset. If the board has the fix, it will reset before the timeout expires. Otherwise, it will print a warning message before returning, to prevent it hanging. Additionally, it also fixes the places board_hard_reset() is called to deal with the new possibility of it returning. BUG=chrome-os-partner:13508 TEST=On a machine with the hardware rework and one without it, go to the EC console and run "pmu reset" to try and force a reset. The one with the fix should reset immediately, and the one without should warn you that it tried (and failed) to reset. BRANCH=snow Change-Id: I493122ee4da539f363a31f624ab9dd7db8068ec8 Signed-off-by: Charlie Mooney <charliemooney@chromium.org> Reviewed-on: https://gerrit.chromium.org/gerrit/32043 Reviewed-by: Vincent Palatin <vpalatin@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
* Use new panic stack on all platformsRandall Spangler2012-08-314-4/+0
| | | | | | | | | | | | | | | | Now that the panic stack goes at the end of RAM, there's no overhead to using it on all platforms. When it was a dedicated block of memory, we needed to turn it off on some low-RAM platforms (e.g. Snow). BUG=chrome-os-partner:7466 TEST='crash divzero' or 'crash unaligned'; should print dump and reboot BRANCH=all Change-Id: Iddfeb134e237538215df51abe4e16ee831b3ae2d Signed-off-by: Randall Spangler <rspangler@chromium.org> Reviewed-on: https://gerrit.chromium.org/gerrit/32037 Reviewed-by: Simon Glass <sjg@chromium.org>
* Snow must assert ENTERING_RW GPIO when jumping between imagesRandall Spangler2012-08-304-2/+4
| | | | | | | | | | | | | | | | BUG=chrome-os-partner:13439 BRANCH=snow TEST=manual 1. Ctrl+Refresh+Esc; should go to INSERT screen 2. Ctrl+D; should show TODEV (this confirms it's still possible to get into dev mode the right way) 3. From EC console, 'sysjump rw' 4. Ctrl+D; should NOT show TODEV (this confirms the bug is fixed) Change-Id: Ic4879cb0a7fc47527eac1a5a727f3225744ff880 Signed-off-by: Randall Spangler <rspangler@chromium.org> Reviewed-on: https://gerrit.chromium.org/gerrit/31932
* snow: Don't turn on SPI clockDoug Anderson2012-08-301-3/+0
| | | | | | | | | | | | | | We're not using SPI on snow so no reason to clock it on. BUG=None TEST=Things still boot BRANCH=snow Change-Id: I14fe227ba75501dea28f6a91645c14ae433aac2d Signed-off-by: Doug Anderson <dianders@chromium.org> Reviewed-on: https://gerrit.chromium.org/gerrit/31957 Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: David Hendricks <dhendrix@chromium.org>
* snow: re-factor i2c initDavid Hendricks2012-08-302-15/+31
| | | | | | | | | | | | | | | | | | | | | | | | | | This re-factors i2c initialization to simplify it and make it follow the correct order. This is intended to fix a bug where the I2C lines could be driven low for no good reason on EC startup, potentially causing issues with other devices. The ordering should be: 1. Setup pins as inputs on EC startup. 2. Initialize I2C module(s) 3. Re-configure pins as alternate function. (Thanks to dianders for pointing out this bug) Signed-off-by: David Hendricks <dhendrix@chromium.org> BRANCH=snow BUG=chrome-os-partner:13443 TEST=Tested by examining scope traces during EC reboot Change-Id: Ibb845f3fd538da387132b1c822929f8613de077d Reviewed-on: https://gerrit.chromium.org/gerrit/31647 Commit-Ready: David Hendricks <dhendrix@chromium.org> Reviewed-by: David Hendricks <dhendrix@chromium.org> Tested-by: David Hendricks <dhendrix@chromium.org> Reviewed-by: Doug Anderson <dianders@chromium.org>
* Snow: Adding in EC ability to hard reset pmicCharlie Mooney2012-08-282-16/+50
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | By pulling line gio_A15 high, you can for a hard reset of the pmic after the stuff resistor is changed. This change adds a function that you can call from the EC and trigger this event (board_hard_reset). The user has access to this command over the EC console by running "pmu reset" and it will force the emergency reset. The board_hard_reset function is used in the pmu's reset code. Whenever it is trying to initialize or shut down the pmu, it resets many or all of its registers over i2c. If the i2c commands fail to get a response from the pmu, the EC will now force a hard reset of the system, which restores everything, allowing for a restart to fix any situation where the pmu has gotten its configuration trashed. BUG=chrome-os-partner:12913 TEST=boot the machine. From EC console check the pmic's register values, then alter them. Run "pmu reset" to force a reset, and check the values again. They should be safe values, which you can confirm by powering on the AP. Repeat this from various starting states: only the EC on, AP on as well, and setting various registers to 0x00's and 0xff's. To stress test the hard-reset ability from the EC's POV, run while true; do echo "pmu reset"; sleep 5; done | cu -l DEVICE -s 15200 BRANCH=snow Change-Id: I911fb9623a7c106d1f993ee4681258c05d4dedae Signed-off-by: Charlie Mooney <charliemooney@chromium.org> Reviewed-on: https://gerrit.chromium.org/gerrit/31524 Reviewed-by: Simon Glass <sjg@chromium.org>
* snow: toggle pull-up on PA7 (SUSPEND_L) on power on/offDavid Hendricks2012-08-281-1/+20
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This adds hooks to re-configure SUSPEND_L (GPIO PA7) when the system turns on/off. When the system is turned on, PA7 will have its internal pull-up enabled. This is required since SUSPEND_L is driven by an open- drain buffer. When the AP is off, we can disable the pull-up (configure PA7 as floating input) to reduce leakage. Signed-off-by: David Hendricks <dhendrix@chromium.org> BRANCH=snow BUG=chrome-os-partner:12700,chrome-os-partner:13200 TEST=see notes below 1. Dump GPIO_A CRL when system is off: read 0x40010800 = 0x41484144 2. Dump GPIO_A CRL when system is on: read 0x40010800 = 0x81484144 3. Dump GPIO_A when system is put into suspend: read 0x40010800 = 0x81484144 4. Resume, see power LED react quickly. 5. Soft poweroff, dump GPIO_A CRL: read 0x40010800 = 0x41484144 Change-Id: I62f02324a2a1fbfb6eff539fc6fdc35a035fa020 Reviewed-on: https://gerrit.chromium.org/gerrit/31315 Reviewed-by: Vincent Palatin <vpalatin@chromium.org> Commit-Ready: David Hendricks <dhendrix@chromium.org> Tested-by: David Hendricks <dhendrix@chromium.org>
* Support battery cut-off mechanism for factory.Louis Yung-Chieh Lo2012-08-281-0/+3
| | | | | | | | | | | | | | | | | | | The cut-off command is manufacturer-specific. Thus the logic is implemented in gas gauge IC code. For those boards using this gas gauge, define the CONFIG_BATTERY_BQ20Z453 in board.h. BUG=chrome-os-partner:12962, BRANCH=snow Signed-off-by: Louis Yung-Chieh Lo <yjlou@chromium.org> TEST=Tested on snow ectool batterycutoff ; expect system is off immediately ; if AC power is not connected. Change-Id: Idd290c76439f3263c1c812b236b79623878f73b2 Reviewed-on: https://gerrit.chromium.org/gerrit/31466 Reviewed-by: Rong Chang <rongchang@chromium.org> Commit-Ready: Yung-Chieh Lo <yjlou@chromium.org> Tested-by: Yung-Chieh Lo <yjlou@chromium.org>
* snow: Change TPSCHROME fastcharge timeout to 6 hoursRong Chang2012-08-281-5/+6
| | | | | | | | | | | | | | | | | | When battery temperature t in range 0C to 10C, default charging current is 50%. And it will take longer than 3 hours to charge battery from 0% to full. Signed-off-by: Rong Chang <rongchang@chromium.org> BRANCH=snow BUG=chrome-os-partner:13172 TEST=manual Check pmu register 0x4. FASTCHARGE bits[4:2] should be 0b100. Change-Id: I133acee21c0886b0739b4b41766ca077bb4babbc Reviewed-on: https://gerrit.chromium.org/gerrit/31458 Reviewed-by: Yung-Chieh Lo <yjlou@chromium.org> Commit-Ready: Rong Chang <rongchang@chromium.org> Tested-by: Rong Chang <rongchang@chromium.org>
* Ignore TPSCHROME NTC reading in T40 rangeRong Chang2012-08-281-0/+10
| | | | | | | | | | | | | | | | | | | | | | | TPSCHROME NTC readings didn't match battery gas gauge temperature. The charging was turned off by TPSCHROME too early, and was resumed too late. This change disables TPSCHROME thermal protection in T40 by set charging voltage and current to 100%. Signed-off-by: Rong Chang <rongchang@chromium.org> BRANCH=snow BUG=chrome-os-partner:12221 BUG=chrome-os-partner:13171 TEST=manual Check pmu register settings. VSET/ISET are equal in T23,T34,T40 ranges. Change-Id: Ic60cc2bf606ed02496aad80b02360a19efafd3c0 Reviewed-on: https://gerrit.chromium.org/gerrit/31457 Commit-Ready: Rong Chang <rongchang@chromium.org> Reviewed-by: Rong Chang <rongchang@chromium.org> Tested-by: Rong Chang <rongchang@chromium.org>
* Disable SPI module on linkRandall Spangler2012-08-271-1/+0
| | | | | | | | | | | | | EC won't be accessing BIOS SPI, so no need to compile in this code. BUG=chrome-os-partner:11232 TEST='spi' command on EC console should no longer be valid BRANCH=link Change-Id: I09d5e99dbe1fd63cb7839454030067d29249a9ed Signed-off-by: Randall Spangler <rspangler@chromium.org> Reviewed-on: https://gerrit.chromium.org/gerrit/31516 Reviewed-by: Vic Yang <victoryang@chromium.org>
* i2c: Enable arbitration GPIOs only when activeSimon Glass2012-08-272-4/+9
| | | | | | | | | | | | | | | | | | | | | | | Only setup the arbitration GPIOs when CONFIG_ARBITRATE_I2C is set. BUG=chrome-os-partner:13064 BRANCH=snow TEST=manual build and boot on snow On the EC: > pmu 1000 In U-Boot: cros_test i2c See that there are no failures. Change-Id: I8a7724700ff79406527c3db8708833728eb9a978 Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-on: https://gerrit.chromium.org/gerrit/31305
* Make AC status feature optional at compile timeSimon Glass2012-08-272-1/+12
| | | | | | | | | | | | | | | | This feature is not actually used on current platforms. Avoid setting up the GPIO unless it is specifically enabled. BUG=chrome-os-partner:13064 BRANCH=snow TEST=manual build and boot on snow. See the AC power GPIO does not change when un/plugging power. Change-Id: I6731625a19f30f6dd35471b126f3083b39747203 Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-on: https://gerrit.chromium.org/gerrit/31304 Reviewed-by: David Hendricks <dhendrix@chromium.org>
* Fix poweron state machine in the ECPuneet Kumar2012-08-241-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The existing state machine does the following: - when power button is pressed it 1. powers on the AP 2. sets a timer of 1 sec and then 3. waits for power button to be released When the timer fires it checks xpshold is set by the AP and if so it clears the pwron signal (which is used by the AP to detect power button is pressed). The problem occurs when the user holds the power button for more than a second. The AP turns on xpshold, then notices that pwron is still on and subsequently powers down because it thinks the power button is pressed. When the button is finally released, since it was held down for more than a second, the timer routine notices that xpshold is not on and therefore shuts down the system. Another problem found while analysing this state machine is that loop checking for poweroff only triggers on the rising edge of xpshold. This means that if the AP powers down the EC might miss a possible power event. Here is the proposed fix: When the power button is pressed the EC will: 1. power on the AP 2. Check for xpshold to be asserted with a 1 sec timeout 3. If uboot is healthy xpshold should come on pretty quickly; the EC then waits for the power button to be released in less than 8 seconds 4. If the power button is released then the EC waits for power off events. 5. If the power button is not released it waits for upto 8 seconds before turning off the AP. The added wrinkle is how to address a borked uboot case. In the case where xpshold doesn't come on in < 1 second, the EC will allow the AP to stay on for upto 16 seconds so that USB boot can finish. The user must hold the power button down until uboot boots and sets xpshold. The assumption here is that USB boot takes < 16 seconds. BUG=chrome-os-partner:12748 TEST="follow instructions in bug report" Change-Id: I5b582a6c3ae3449238e2813e4a581bd8f92dd846 Signed-off-by: Puneet Kumar <puneetster@chromium.org> Reviewed-on: https://gerrit.chromium.org/gerrit/31291 Reviewed-by: Vincent Palatin <vpalatin@chromium.org> Reviewed-by: David Hendricks <dhendrix@chromium.org>
* Snow: i2c arbitration cleanup (suspend)Charlie Mooney2012-08-231-9/+5
| | | | | | | | | | | | | | | | | | | | | | | The ec used to have to check the state of the AP since it would leave the arbitration lines when it suspended. That meant you couldn't trust the arbitration lines without checking the power state. Now the AP pulls the arbitration lines high when it suspends, so it no longer needs to test this when trying to acquire master. BUG=chrome-os-partner:12460 TEST=First, on the EC console run "battery" and "pmu" to make sure they work. Then repeat those steps after putting the AP in suspend by running powerd_suspend, they should still work. Then shutdown the machine entirely and try them again. Note: pmu needs the AP to be on to work, so if it fails here that's okay, just make sure it's not an arbitration error. BRANCH=snow Change-Id: I335156bbce4888949111f74e8a83fe9d184a7a63 Signed-off-by: Charlie Mooney <charliemooney@chromium.org> Reviewed-on: https://gerrit.chromium.org/gerrit/30906 Reviewed-by: Jon Kliegman <kliegs@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
* snow: configure USART Rx as an input with pull resistorDavid Hendricks2012-08-211-2/+10
| | | | | | | | | | | | | | | | | | | | | | USART1 has always had its Tx and Rx pins configured as "alternate function output". However, this turns out to be incorrect since there is no concept of an AF input on the STM32F. Instead, the Rx pin should be configured as an input (and the Tx remains an AF output). This also simplifies the console resume code since we only need to enable/disable the interrupt rather than reconfiguring the GPIO. Signed-off-by: David Hendricks <dhendrix@chromium.org> BRANCH=snow BUG=chrome-os-partner:12223 TEST=flashed on snow, EC console works Change-Id: Ia92dbbac16fc55d0db62381dfb487aeb4f4121b4 Reviewed-on: https://gerrit.chromium.org/gerrit/30941 Reviewed-by: Vincent Palatin <vpalatin@chromium.org> Commit-Ready: David Hendricks <dhendrix@chromium.org> Tested-by: David Hendricks <dhendrix@chromium.org>
* snow/stm32: re-configure power LED on the fly (input vs. pwm)David Hendricks2012-08-172-5/+32
| | | | | | | | | | | | | | | | | | | | | | | Usually the power LED is driven by the PWM mode so that its nominal brightness can be set to a "soft" on value. However, when the LED is to remain off the LED should be switched to floating input mode. This reduces voltage leakage. This CL updates the power_led_task to configure the LED however is appropriate and adds board functions to re-configure the GPIO. Signed-off-by: David Hendricks <dhendrix@chromium.org> BRANCH=snow BUG=chrome-os-partner:12381 TEST=LED responds as expected in suspend and on/off states, also tested that leakage is reduced with multimeter Change-Id: If90ac78aaffe7358cce80dd02ec1423c2cb4f664 Reviewed-on: https://gerrit.chromium.org/gerrit/29705 Reviewed-by: Simon Glass <sjg@chromium.org> Commit-Ready: David Hendricks <dhendrix@chromium.org> Tested-by: David Hendricks <dhendrix@chromium.org>
* daisy: Modify charging flow to comply charging specificationRong Chang2012-08-161-3/+6
| | | | | | | | | | | | | | | | | | | | | | | | | This change corrects charger interrupt event handling, charger enable gpio, battery full condition, EC deep sleep mode support when AC unplugged, and lid controlled power off. Signed-off-by: Rong Chang <rongchang@chromium.org> BRANCH=snow BUG=chrome-os-partner:12573,12574,12575 TEST=manual - ec console command 'gpioget': - SPI1_MISO should be 0 when AP off - CHARGER_EN should be 0 after AC unplugged - charging led should be off after AC unplugged - when battery remaining charge < 3%, system should be powered off without AC. - ec console command 'sleepmask 0', turn off AP: - deep sleep only when AC unplugged Change-Id: I0f63835dae67d90de7a8c8c6c3537ca9a16faed4 Reviewed-on: https://gerrit.chromium.org/gerrit/30316 Commit-Ready: Rong Chang <rongchang@chromium.org> Reviewed-by: Rong Chang <rongchang@chromium.org> Tested-by: Rong Chang <rongchang@chromium.org>
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