| Commit message (Collapse) | Author | Age | Files | Lines |
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Hook up lid open interrupt correctly for arcada. This also ensures that
we ignore lid angle when the lid is closed because lid angle can report
360 degrees and falsely enter tablet mode.
BRANCH=none
BUG=b:131785573
TEST=lid open/closed is reported correctly on console with this change.
This also improves the tablet mode calculation, i.e. we do not go into
tablet mode when the lid is closed.
Change-Id: Idece81f3b03575941a22ab09485de7c3e7f85a8f
Signed-off-by: Jett Rink <jettrink@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1594952
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Currently, when a battery is connected, the device boots immediately.
This makes assembly process unreliable.
This patch makes EC cut off a battery at start-up if USBC_THERM reads
about the pull-up voltage because that indicates a USB-C board isn't
connected, which means the devices is being assembled.
Signed-off-by: Daisuke Nojiri <dnojiri@chromium.org>
BUG=b/124540674
BRANCH=none
TEST=Verify a battery is cut off when a USB-C board isn't connected.
Verify a battery isn't cut off when a USB-C board is connected.
TEST=Verify ADC reads 715 mV even when the thermistor is iced.
Change-Id: Iadc756f8705abe083a5d56b5d8ad080dbff15b6a
Reviewed-on: https://chromium-review.googlesource.com/1520950
Commit-Ready: Daisuke Nojiri <dnojiri@chromium.org>
Tested-by: Daisuke Nojiri <dnojiri@chromium.org>
Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org>
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Remove kbbacklight support with non-kbbacklight SKU.
BUG=b:130142249, b:129397770
BRANCH=octopus
TEST=make sure ectool inventory doesn't show keyboard backlight support
with non-kbbacklight SKU.
Change-Id: I820f13fb13c58b63492a6e544e22545e8ee65f4c
Signed-off-by: Devin Lu <Devin.Lu@quantatw.com>
Reviewed-on: https://chromium-review.googlesource.com/1568893
Commit-Ready: Marco Chen <marcochen@chromium.org>
Reviewed-by: Marco Chen <marcochen@chromium.org>
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BUG=b:130142249
BRANCH=octopus
TEST=make buildall -j, make sure ec console kbkight
can adjust keyboard backlight brightness.
Change-Id: I635372efe0b92ff3765de83d9adfe953accd96a1
Signed-off-by: Devin Lu <Devin.Lu@quantatw.com>
Reviewed-on: https://chromium-review.googlesource.com/1535084
Commit-Ready: Marco Chen <marcochen@chromium.org>
Reviewed-by: Marco Chen <marcochen@chromium.org>
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Correct accelerometer orientation, because differece from meep.
BUG=b:130619474
BRANCH=octopus
TEST=When device is laying on a table, lid angle at 180, both sensors
report gravity along Z axis:
ectool motionsense
Motion sensing active
Sensor 0: 507 606 16748
Sensor 1: 17 -334 16442
Sensor 2: 0 0 0
Sensor 3: 0 0 0
When on the base bottom edge, report gravity along Y axis:
ectool motionsense
Motion sensing active
Sensor 0: 403 16491 655
Sensor 1: 19 16163 1540
Sensor 2: 0 0 0
Sensor 3: 0 0 0
When on its left side, report gravity along X axis:
ectool motionsense
Motion sensing active
Sensor 0: 16172 -374 1738
Sensor 1: 16315 -184 1280
Sensor 2: 0 0 0
Sensor 3: 0 0 0
and check the screen rotation was normally.
Change-Id: I20ceab05ac9dce2cba09417a759d6657a185788d
Signed-off-by: Devin Lu <Devin.Lu@quantatw.com>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1569087
Reviewed-by: Justin TerAvest <teravest@chromium.org>
Reviewed-by: Diana Z <dzigterman@chromium.org>
Reviewed-by: Marco Chen <marcochen@chromium.org>
Commit-Queue: Marco Chen <marcochen@chromium.org>
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Initial implementation was copied from hatch, but Kohaku has no fan.
BUG=b:130577450
BRANCH=none
TEST=compiles.
Change-Id: Icbbf4419000938f07613cb4b32f4e82166741e17
Signed-off-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/1568763
Reviewed-by: Furquan Shaikh <furquan@chromium.org>
Reviewed-by: Paul Fagerburg <pfagerburg@chromium.org>
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Red for error state and discharge in low power.
Blue for charging.
Green for charged almost full.
Also, fix the ectool led battery not working.
TEST=See blue LED when charging, green LED when battery full.
TEST=see ectool led battery red=x blue=y green=z works.
xyz are the combinations from 0 to 7.
BUG=b:128812582, b:129720983
BRANCH=None
Change-Id: I45d2395197fd9f0713aae8a41ae69c5bc92548b9
Signed-off-by: Yilun Lin <yllin@google.com>
Reviewed-on: https://chromium-review.googlesource.com/1568891
Commit-Ready: Yilun Lin <yllin@chromium.org>
Tested-by: Yilun Lin <yllin@chromium.org>
Reviewed-by: Ting Shen <phoenixshen@chromium.org>
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Kukui is running out of RO space. In order to save more space, we found
that these two functions takes ~500 bytes, so it's especially worth
removing.
RO size before and after:
122056 Apr 11 17:01 build/kukui/RO/ec.RO.flat
121544 Apr 11 18:14 build/kukui/RO/ec.RO.flat
BUG=b:120588396
TEST=make buildall -j
BRANCH=None
Change-Id: I2e08d45093d5ef88516950e8289e559d4421d126
Signed-off-by: Ting Shen <phoenixshen@google.com>
Reviewed-on: https://chromium-review.googlesource.com/1564490
Commit-Ready: ChromeOS CL Exonerator Bot <chromiumos-cl-exonerator@appspot.gserviceaccount.com>
Tested-by: Ting Shen <phoenixshen@chromium.org>
Reviewed-by: Yilun Lin <yllin@chromium.org>
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Kohaku uses PS8751 for port 0 TCPC. Therefore, the TCPC config and mux
config tables can't be common and must be moved out of baseboard into
their respective board.c files.
BUG=b:130194031
BRANCH=none
TEST=make -j buildall
Change-Id: Iea39e60d675a5ea0df346c52e78f5f472768984c
Signed-off-by: Scott Collyer <scollyer@google.com>
Signed-off-by: Furquan Shaikh <furquan@google.com>
Reviewed-on: https://chromium-review.googlesource.com/1551582
Commit-Ready: Furquan Shaikh <furquan@chromium.org>
Tested-by: Furquan Shaikh <furquan@chromium.org>
Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
Reviewed-by: Jett Rink <jettrink@chromium.org>
Reviewed-by: Paul Fagerburg <pfagerburg@chromium.org>
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tcpc_config contained a field for both the alert polarity and open
drain/push pull configuration. There is also a possible difference in TCPC
reset polarity. Instead of adding yet another field to describe this
configuration, it would be better to convert alert polairty, open
drain and reset polarity into a single flags field.
This CL modifies the tcpc_config struct to use a single flags field
and adds defines for what existing flag options can be.
BUG=b:130194031
BRANCH=none
TEST=make -j buildall
Change-Id: Ifb7e7604edb7021fb2d36ee279049eb52fefc99e
Signed-off-by: Scott Collyer <scollyer@google.com>
Signed-off-by: Furquan Shaikh <furquan@google.com>
Reviewed-on: https://chromium-review.googlesource.com/1551581
Commit-Ready: Furquan Shaikh <furquan@chromium.org>
Tested-by: Furquan Shaikh <furquan@chromium.org>
Reviewed-by: Jett Rink <jettrink@chromium.org>
Reviewed-by: Paul Fagerburg <pfagerburg@chromium.org>
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Copy from kukui, update the mux info which would be used by AP.
TEST=1. Modify dts, and enable extcon-usbc-cros-ec kernel module
2. cat /sys/devices/platform/*/extcon/extcon0/state, and see
when DP plugged:
USB=0
USB-HOST=1
DP=1
when DP unplugged:
USB=0
USB-HOST=1
DP=0
BUG=b:130338464
BRANCH=None
Change-Id: I3ac00e47426d56bf926943d04b91f40391d98deb
Reviewed-on: https://chromium-review.googlesource.com/1564492
Commit-Ready: ChromeOS CL Exonerator Bot <chromiumos-cl-exonerator@appspot.gserviceaccount.com>
Tested-by: Jessy Jiang <jiangchao5@huaqin.corp-partner.google.com>
Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org>
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FAFT no longer needs a workaround to make a DUT detect a USB drive in
recovery mode. See chromium:779260 and CL:1545543 for more info.
This saves about 1.4 kB.
Signed-off-by: Daisuke Nojiri <dnojiri@chromium.org>
BUG=b/129746223,b/127720872
BRANCH=none
TEST=buildall
Change-Id: If6d7348f97cef02e68e162c22d00a24db5459d69
Reviewed-on: https://chromium-review.googlesource.com/1560339
Commit-Ready: ChromeOS CL Exonerator Bot <chromiumos-cl-exonerator@appspot.gserviceaccount.com>
Tested-by: Daisuke Nojiri <dnojiri@chromium.org>
Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
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Set D0i2 and D0i3 latency values to reasonable safe values,
so that we can start exercising D0ix & see power benefits.
We shall fine tune further at later stage.
BUG=b:130032204
TEST=Verify Power numbers in active & S0ix state
BRANCH=none
Change-Id: I1cf29dd71f81036894a58009d027fecc9288d037
Signed-off-by: Rushikesh S Kadam <rushikesh.s.kadam@intel.com>
Reviewed-on: https://chromium-review.googlesource.com/1558150
Commit-Ready: ChromeOS CL Exonerator Bot <chromiumos-cl-exonerator@appspot.gserviceaccount.com>
Reviewed-by: Jett Rink <jettrink@chromium.org>
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First wave projects don't have any board with keyboard backlight so the
GPIO - KB_BL_PWR_EN should be configured by macro of UNIMPLEMENTED
instead of output direction.
BRANCH=octopus
BUG=b:130329644
TEST=buildall
Change-Id: I5c37b4b5ec3eb3f629c6d494064a6a27a3a1417c
Signed-off-by: Marco Chen <marcochen@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/1564493
Commit-Ready: ChromeOS CL Exonerator Bot <chromiumos-cl-exonerator@appspot.gserviceaccount.com>
Reviewed-by: Diana Z <dzigterman@chromium.org>
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Battery led is green when charging is stopped,
AC is connected and system is S5.
BUG=b:130334341
TEST=Build & flash EC then check battery led.
Change-Id: Ib31a94ba5ad9a7e78cc87a3bf1980638ae9599c3
Signed-off-by: YongBeum Ha <ybha@samsung.com>
Reviewed-on: https://chromium-review.googlesource.com/1563873
Commit-Ready: ChromeOS CL Exonerator Bot <chromiumos-cl-exonerator@appspot.gserviceaccount.com>
Reviewed-by: Jett Rink <jettrink@chromium.org>
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Add more IDs per request from vendor.
BRANCH=None
TEST=make BOARD=kukui_scp
BUG=None
Change-Id: I03dc7d98d11ebf386ebd3b7d6fb691af5c707bcd
Signed-off-by: Yilun Lin <yllin@google.com>
Reviewed-on: https://chromium-review.googlesource.com/1563250
Commit-Ready: ChromeOS CL Exonerator Bot <chromiumos-cl-exonerator@appspot.gserviceaccount.com>
Tested-by: Yilun Lin <yllin@chromium.org>
Reviewed-by: Erin Lo <erin.lo@mediatek.com>
Reviewed-by: Nicolas Boichat <drinkcat@chromium.org>
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Removes stepping_stone regions, and move ROM_BASE from 0x800 to 0x0.
stepping_stone region is to smooth SCP's bringing up stage for
being compatible with both original and new implementation.
Now that we have done the kernel side driver implementation,
we can earn more SRAM space by removing the stepping_stone.
TEST=run SCP on kukui, and see it boots.
BRANCH=None
BUG=b:120825336
Change-Id: I253904592fa0187f627b2eaa3f5d12a17db9960f
Signed-off-by: Yilun Lin <yllin@google.com>
Reviewed-on: https://chromium-review.googlesource.com/1563871
Commit-Ready: ChromeOS CL Exonerator Bot <chromiumos-cl-exonerator@appspot.gserviceaccount.com>
Tested-by: Yilun Lin <yllin@chromium.org>
Reviewed-by: Nicolas Boichat <drinkcat@chromium.org>
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BRANCH=none
BUG=b:124996507
TEST=Read HWID from fingerprint sensor (slave) on hatch_fp
Change-Id: I344d7e4a5afec1f7c23f45aca593159ba67e89ed
Signed-off-by: Tom Hughes <tomhughes@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/1558937
Reviewed-by: Nicolas Boichat <drinkcat@chromium.org>
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Read/return LCM_ID (from P0d onward) as part of SKU_ID while
preserving the compatibility of older boards.
BUG=b/129569858
TEST=LCM info should only be printed from P0d onward.
BRANCH=none
Change-Id: I053982f27fc7e6cc95c626b2d40bddff9ba37bfc
Signed-off-by: YH Lin <yueherngl@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/1553578
Commit-Ready: ChromeOS CL Exonerator Bot <chromiumos-cl-exonerator@appspot.gserviceaccount.com>
Tested-by: Daisuke Nojiri <dnojiri@chromium.org>
Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org>
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This patch makes Flapjack read BATT_ID using board_read_id. There is
no functional changes.
Signed-off-by: Daisuke Nojiri <dnojiri@chromium.org>
BUG=b/126770302
BRANCH=none
TEST=Buildall
Change-Id: Iae60f36d6df25cb1aa910fecd721d0740ebe29c0
Reviewed-on: https://chromium-review.googlesource.com/1559104
Commit-Ready: ChromeOS CL Exonerator Bot <chromiumos-cl-exonerator@appspot.gserviceaccount.com>
Tested-by: Daisuke Nojiri <dnojiri@chromium.org>
Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org>
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This prevents the system from negotiating power or reenabling
dualrole after it's turned off in board.c.
BUG=b:129882930
BRANCH=servo
TEST=cc snkdts stays snk.
Change-Id: I0a05eb9e8073cec7da884e071e023bcddadb130f
Signed-off-by: Nick Sanders <nsanders@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/1553308
Commit-Ready: ChromeOS CL Exonerator Bot <chromiumos-cl-exonerator@appspot.gserviceaccount.com>
Reviewed-by: Ruben Rodriguez Buchillon <coconutruben@chromium.org>
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This patch removes PD state names from RO image to save some space.
Before:
91656 build/flapjack/RO/ec.RO.flat
107632 build/flapjack/RW/ec.RW.flat
After
90312 build/flapjack/RO/ec.RO.flat
107632 build/flapjack/RW/ec.RW.flat
Signed-off-by: Daisuke Nojiri <dnojiri@chromium.org>
BUG=b/129746223,b/127720872
BRANCH=none
TEST=buildall
Change-Id: I84f2cb9e685724c88f8637a86a5fbbeeeff09671
Reviewed-on: https://chromium-review.googlesource.com/1551584
Commit-Ready: ChromeOS CL Exonerator Bot <chromiumos-cl-exonerator@appspot.gserviceaccount.com>
Tested-by: Daisuke Nojiri <dnojiri@chromium.org>
Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org>
Reviewed-by: YH Lin <yueherngl@chromium.org>
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This patch removes console commands from RO which are not used by FAFT.
Before:
122824 Apr 5 14:27 build/flapjack/RO/ec.RO.flat
108260 Apr 5 14:28 build/flapjack/RW/ec.RW.flat
After:
120712 Apr 5 14:27 build/flapjack/RO/ec.RO.flat
108260 Apr 5 14:27 build/flapjack/RW/ec.RW.flat
Signed-off-by: Daisuke Nojiri <dnojiri@chromium.org>
BUG=b/129746223,b/127720872
BRANCH=none
TEST=buildall
Change-Id: I4534fed108845fe562255179ac90b5bee8ce5bbc
Reviewed-on: https://chromium-review.googlesource.com/1551583
Commit-Ready: ChromeOS CL Exonerator Bot <chromiumos-cl-exonerator@appspot.gserviceaccount.com>
Tested-by: Daisuke Nojiri <dnojiri@chromium.org>
Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org>
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EC_INT_L on hatch is a push-pull line driven by EC and going to SoC
GPIO. Having this driven high in G3 results in leakage on PP3300_A_SOC
rail. This change configures EC_INT_L to drive it low on entering S5
and re-configures it to drive high on exiting S5.
BUG=b:129306003
BRANCH=None
TEST=Verified that SLP_S0_L, EC_INT_L and SYS_RESET_L are pulled low
in G3.
Change-Id: I9b00eef72762b9d16afc42723e8985d752f83c55
Signed-off-by: Furquan Shaikh <furquan@google.com>
Reviewed-on: https://chromium-review.googlesource.com/1553562
Commit-Ready: ChromeOS CL Exonerator Bot <chromiumos-cl-exonerator@appspot.gserviceaccount.com>
Tested-by: Furquan Shaikh <furquan@chromium.org>
Reviewed-by: Rachel Nancollas <rachelsn@google.com>
Reviewed-by: Philip Chen <philipchen@chromium.org>
Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
Reviewed-by: Paul Fagerburg <pfagerburg@chromium.org>
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It's simply a bad idea to describe a macro in multiple locations.
It'll make it hard to change. It'll be difficult to keep all
locations in sync.
This patch replaces the comment duplicated in all ec.tasklist with
a pointer to the CONFIG_TASK_LIST definition. The macro will be
described in a single place (just like all/most other macros).
Signed-off-by: Daisuke Nojiri <dnojiri@chromium.org>
BUG=none
BRANCH=none
TEST=buildall
Change-Id: Id658b9d68e742e4334c692b804d9c98c8de21313
Reviewed-on: https://chromium-review.googlesource.com/1551579
Commit-Ready: ChromeOS CL Exonerator Bot <chromiumos-cl-exonerator@appspot.gserviceaccount.com>
Tested-by: Daisuke Nojiri <dnojiri@chromium.org>
Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org>
Reviewed-by: Jett Rink <jettrink@chromium.org>
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Implement Chocodile Charge-Through Vconn Powered firmware for mcu
using new Type-C/PD State machine stack.
BUG=b:115626873
BRANCH=none
TEST=manual
Charge-Through was tested on an Atlas running a DRP USB-C/PD state
machine with CTUnattached.SNK and CTAttached.SNK states.
Signed-off-by: Sam Hurst <shurst@chromium.org>
Change-Id: I847f1bcd2fc3ce41e66edd133a10c943d5e8c819
Reviewed-on: https://chromium-review.googlesource.com/1225250
Commit-Ready: ChromeOS CL Exonerator Bot <chromiumos-cl-exonerator@appspot.gserviceaccount.com>
Tested-by: Sam Hurst <shurst@google.com>
Reviewed-by: Stefan Reinauer <reinauer@google.com>
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enabled D0i-3 low power mode and reset_prep and D3 features
BUG=b:122364080
BRANCH=none
TEST=tested on arcada
Change-Id: I6c3949a7ac229a3f33cd75bd103e343f8e9a26f9
Signed-off-by: Hu, Hebo <hebo.hu@intel.com>
Reviewed-on: https://chromium-review.googlesource.com/1536487
Commit-Ready: Rushikesh S Kadam <rushikesh.s.kadam@intel.com>
Commit-Ready: Hebo Hu <hebo.hu@intel.corp-partner.google.com>
Tested-by: Jett Rink <jettrink@chromium.org>
Reviewed-by: Jett Rink <jettrink@chromium.org>
Reviewed-by: Hebo Hu <hebo.hu@intel.corp-partner.google.com>
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We were clearing the tpm in two different ways. There was one
implementation in factory_mode.c and one in wp.c. This change merges the
two, so there's only one board_wipe_tpm.
While modifying the wipe tpm code from factory_mode.c I noticed the
factory_enable_failed stuff is maybe a bit more complicated than
necessary. I opened a bug for cleaning that up(b/129956462). It wont be
addressed in this change.
BUG=none
BRANCH=none
TEST=Run the processes that wipe the tpm
open ccd.
enable factory mode from vendor command.
run rma open process
Change-Id: Ia76df19f7d9e4f308f3f1a7175f130f1ef7249a2
Signed-off-by: Mary Ruthven <mruthven@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/1535156
Reviewed-by: Vadim Bendebury <vbendeb@chromium.org>
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This patch eliminates unnecessary legacy nvmem.c and nvmem_vars.c code
and brings the code base to the state where the new NVMEM layout is
fully functional.
BRANCH=cr50, cr50-mp
BUG=b:69907320, b:129710256
CQ-DEPEND=CL:1450278
TEST=the following tests pass:
- test cases in ./test/nvmem.c
- TCG suite (passes on par with the existing Cr50 code with the
reduced code footprint TPM2 library)
- Chrome OS device migrates from legacy to new implementation with
user account maintained.
- Chrome OS user account is maintained over AP and H1 reboots and
deep sleep cycles.
Change-Id: If4bc2dd125873a79dbe0e268eb32100a8b8b352d
Signed-off-by: Vadim Bendebury <vbendeb@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/1496607
Reviewed-by: Andrey Pronin <apronin@chromium.org>
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Change the VENDOR_CC_GET_PWR_BTN behavior to report the live state of
the power button. On Wilco devices, the AP needs to poll for both a
power button press and release prior to booting an untrusted OS.
The falling edge of the power button is still latched, so the first call
to VENDOR_CC_GET_PWR_BTN command will return a button state of 1 if this
call is made within 10 seconds. Once the latched state is clear,
VENDOR_CC_GET_PWR_BTN returns the live state of the power button.
BUG=b:128431787
BRANCH=cr50
TEST=Added test code into vboot recovery screen to poll
VENDOR_CC_GET_PWR_BTN command for a power button press and a power
button release.
Change-Id: I8bc34e4e6309f6b3bd8020655370eb50032a00f1
Signed-off-by: Keith Short <keithshort@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/1534337
Reviewed-by: Mary Ruthven <mruthven@chromium.org>
Reviewed-by: Matt Delco <delco@google.com>
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BUG=b:112778363
BRANCH=cr50
TEST=ran test_that suite:faft_cr50_prepvt on coral.
Change-Id: I1b3c573ee5fcb40290541f231c78bf31650c13c4
Signed-off-by: Namyoon Woo <namyoon@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/1410482
Reviewed-by: Vadim Bendebury <vbendeb@chromium.org>
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BUG=none
BRANCH=cr50
TEST=make buildall -j
Change-Id: Ic95e75cbfaa15103d83c78dcb9efd5b985f2f190
Signed-off-by: Mary Ruthven <mruthven@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/1542799
Commit-Ready: ChromeOS CL Exonerator Bot <chromiumos-cl-exonerator@appspot.gserviceaccount.com>
Reviewed-by: Namyoon Woo <namyoon@chromium.org>
Reviewed-by: Vadim Bendebury <vbendeb@chromium.org>
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The existing SYS_RST_L implementation enables the output on SYS_RST_L
before setting the level to 0, which results in cr50 briefly driving
SYS_RST_L high when SYS_RST_L is asserted. This patch switches SYS_RST_L
to a pseudo open drain mode, which eliminates the pulse.
The internal pull up on SYS_RST_L is not being removed, so the H1 will
still pull this line up when SYS_RST_L output is set to 1. Removing the
pull up will require careful analysis of existing designs, and if safe
will be done in a different patch.
BUG=b:117676461
BRANCH=cr50
TEST=assert/deassert sys_rst_l and check that 'sysrst' shows the correct
state. Verify this works on cheza which only pulls SYS_RST_L up to 1.8V
even though VDDIOM is 3.3V.
Change-Id: I50c9569e70c97cec434df3095f1b109f3248076b
Signed-off-by: Mary Ruthven <mruthven@google.com>
Reviewed-on: https://chromium-review.googlesource.com/1282020
Commit-Ready: ChromeOS CL Exonerator Bot <chromiumos-cl-exonerator@appspot.gserviceaccount.com>
Tested-by: Mary Ruthven <mruthven@chromium.org>
Reviewed-by: Vadim Bendebury <vbendeb@chromium.org>
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Rowan is long dead. Remove the board.
Signed-off-by: Evan Green <evgreen@chromium.org>
BUG=chromium:840888
BRANCH=none
TEST=make -j buildall
CQ-DEPEND=CL:*1087044,CL:1538915
Change-Id: Ia18d95c8f283d4b2dc2aa29cb0b8b17b574f9bf8
Reviewed-on: https://chromium-review.googlesource.com/1540516
Commit-Ready: Evan Green <evgreen@chromium.org>
Tested-by: Evan Green <evgreen@chromium.org>
Reviewed-by: Jett Rink <jettrink@chromium.org>
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There are only 512 Kbytes of internal flash in Rev.C of npcx7m7w
(i.e. npcx7m7wc.) It is different from the Rev.B of npcx7m7w
(i.e. npcx7m7wb.) This CL illustrates how to set the flash type and
flash size when chip variant is npcx7m7wc.
BRANCH=none
BUG=none
TEST=pass "make buildall".
TEST=with related CLs, switch to different chip variant in build.mk;
build and flash the image; make sure each EC image can boot up on
EVB or internal testing board of different chip variant.
Change-Id: I2b50c7a023b1634ed4a200cb826532174baae117
Signed-off-by: CHLin <CHLIN56@nuvoton.com>
Reviewed-on: https://chromium-review.googlesource.com/1543063
Commit-Ready: CH Lin <chlin56@nuvoton.com>
Tested-by: CH Lin <chlin56@nuvoton.com>
Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
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gpio.c has support for making pins open drain. This implementation will
prevent the signals from being driven high. Use the gpio.c support
instead of the hack we were using before.
BUG=none
BRANCH=cr50
TEST=the EC can assert CCD_MODE_L when cr50 has it deasserted. Verify
this on a ARM and x86 device in the lab.
Change-Id: I7f2a465782f2c60a850c25153fb65eb96fff0712
Signed-off-by: Mary Ruthven <mruthven@google.com>
Reviewed-on: https://chromium-review.googlesource.com/1282019
Commit-Ready: Mary Ruthven <mruthven@chromium.org>
Tested-by: Mary Ruthven <mruthven@chromium.org>
Reviewed-by: Vadim Bendebury <vbendeb@chromium.org>
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BUG=b:126476180
BRANCH=cr50
TEST=kukui uses SPI and PLT_RST_L
Change-Id: Ibeb28b1c40d07d56c0d9bb760026a01cd7a1a754
Signed-off-by: Mary Ruthven <mruthven@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/1541693
Reviewed-by: Vadim Bendebury <vbendeb@chromium.org>
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This CL adds kohaku as a project and is a just a copy of the hatch
reference with no kohaku specific changes.
BUG=b:129714630
BRANCH=none
TEST=make -j BOARD=kohaku
Change-Id: Ibf3059cc9548c66fe8fe560d7d352e11adb2ebf8
Signed-off-by: Scott Collyer <scollyer@google.com>
Reviewed-on: https://chromium-review.googlesource.com/1551580
Commit-Ready: Scott Collyer <scollyer@chromium.org>
Tested-by: Scott Collyer <scollyer@chromium.org>
Reviewed-by: Furquan Shaikh <furquan@chromium.org>
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Though casta isn't using sensors, the GPIO for the MKBP events is still
populated so configure and enable it.
BUG=None
BRANCH=octopus
TEST=builds
Change-Id: Id5efe1dd79efaeb43a94b6fcd005d5ae7078a03c
Signed-off-by: Diana Z <dzigterman@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/1545084
Reviewed-by: Enrico Granata <egranata@chromium.org>
Reviewed-by: Jett Rink <jettrink@chromium.org>
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BUG=b:124344730
BRANCH=None
TEST=Invoke hall interrupt by a magnet and see that EC console will output a lid close/open event
Change-Id: I78290ba4240a494674f2f9e8c7deaa365969319f
Reviewed-on: https://chromium-review.googlesource.com/1475104
Commit-Ready: ChromeOS CL Exonerator Bot <chromiumos-cl-exonerator@appspot.gserviceaccount.com>
Tested-by: Phoenix Wu <wujing6@huaqin.corp-partner.google.com>
Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org>
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The Unlocked config option doesn't really even apply to arcada, remove
as we get further along.
BRANCH=none
BUG=none
TEST=Flashed on to arcada without issue.
Change-Id: I1de4508a7fa7ee51f562a8806e6a1bbf13f40135
Signed-off-by: Jett Rink <jettrink@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/1548504
Reviewed-by: Jack Rosenthal <jrosenth@chromium.org>
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We use BATT_PRES_L to determine if factory mode can be enabled. We need
to be able to control this for cr50 testing. Add a command that can be
used to override battery presence. This change also adds a ccd
capability to control access to this command. If this capability is
enabled, someone can easily use console commands and AP commands to
enable factory mode, so it should be controlled separately from WP and
GscFullConsole.
BUG=b:126197850
BRANCH=cr50
TEST=override battery presence using bpforce. Make sure the state lasts
through reboot, deep sleep, and power-on reset. When bp is forced
disabled you can do ccd open without physical presence and you can
enable factory mode.
Change-Id: I026a537142b6780824192caa2a147c7bdac1545c
Signed-off-by: Mary Ruthven <mruthven@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/1505213
Commit-Ready: ChromeOS CL Exonerator Bot <chromiumos-cl-exonerator@appspot.gserviceaccount.com>
Reviewed-by: Vadim Bendebury <vbendeb@chromium.org>
Reviewed-by: Keith Short <keithshort@chromium.org>
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Fix the test target for ish which is run during the test phase
of chromeos-ish which is not run under buildall in EC codebase.
BRANCH=none
BUG=b:12237171
TEST=make BOARD=arcada_ish tests builds successfully.
FEATURES=test emerge-sarien chromeos-ish now works
Change-Id: I6eeaa7a15a5a026b189b67d54f28d994e6a56bb7
Signed-off-by: Jett Rink <jettrink@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/1548503
Reviewed-by: Furquan Shaikh <furquan@chromium.org>
Reviewed-by: Jack Rosenthal <jrosenth@chromium.org>
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Set the correct GPIOs, SPI dev and ID for Hatch.
Keep the GPIO_PWREN variable empty since there is not such GPIO on
Hatch, power is always on for the FPMCU
BRANCH=None
BUG=b:124405913
BUG=b:126455006
TEST=flash_fp_mcu on hatch doesn't bail
Change-Id: I544868bc088d3aeb0896b8123bfc83c1ea0a156c
Signed-off-by: Nicolas Norvez <norvez@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/1532345
Reviewed-by: Tom Hughes <tomhughes@chromium.org>
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First draft, lots of features still missing.
Dev key generated with this command:
openssl genrsa -3 -out board/hatch_fp/dev_key.pem 3072
BRANCH=none
BUG=b:124996507
TEST=make BOARD=hatch_fp
Change-Id: I7d7f0ce6807f7db9ee67e2e9b72ba6b2a0b87591
Signed-off-by: Nicolas Norvez <norvez@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/1482059
Reviewed-by: Tom Hughes <tomhughes@chromium.org>
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Arcada/ISH5 power management needs the support for dma between
UMA and SRAM to do SRAM swap in and swap out. Add the dma driver
and API which utilizes dma engine to perform dma transfer between
UMA and SRAM.
BUG=b:127723182
BRANCH=none
TEST=tested on arcada
Signed-off-by: Leifu Zhao <leifu.zhao@intel.com>
Change-Id: I22172b176eed92d7f487641f9b5c79dfd04f602a
Reviewed-on: https://chromium-review.googlesource.com/1507326
Commit-Ready: Leifu Zhao <leifu.zhao@intel.corp-partner.google.com>
Tested-by: Jett Rink <jettrink@chromium.org>
Reviewed-by: Leifu Zhao <leifu.zhao@intel.corp-partner.google.com>
Reviewed-by: Jett Rink <jettrink@chromium.org>
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bip has an it8320bx with 256kB of flash space. After dividing by two
and subtracting 0x800, this means the RO section of bip is 126kB.
This is very tight.
We've already removed a few commands to free up space, but this board
hasn't been worked on since summer 2018. Delete it to avoid excessive
maintenance burden.
BUG=b:129283539
BRANCH=none
TEST=make -j buildall
CQ-DEPEND=CL:1538819,CL:*1086038
Signed-off-by: Evan Green <evgreen@chromium.org>
Change-Id: Iac903397dd653c8e012c8b3956807ba1bacf681e
Reviewed-on: https://chromium-review.googlesource.com/1536490
Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org>
Reviewed-by: Karthikeyan Ramasubramanian <kramasub@chromium.org>
Reviewed-by: Jett Rink <jettrink@chromium.org>
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The rotation matrix for the lid accel sensor was incorrect which was
resulting in unreliable lid angle calculations. This then resulted in
tablet mode being constantly activated.
BUG=b:129410925
BRANCH=none
TEST=Using ec console 'accelinfo on 1000' verified lid angle now goes
from 0 to 360 and swtiches to tablet mode after crossing 180 threshold.
Change-Id: I051162261c29659efab84a4c95d5ad1e3bb52306
Signed-off-by: Scott Collyer <scollyer@google.com>
Reviewed-on: https://chromium-review.googlesource.com/1544250
Commit-Ready: ChromeOS CL Exonerator Bot <chromiumos-cl-exonerator@appspot.gserviceaccount.com>
Tested-by: Scott Collyer <scollyer@chromium.org>
Reviewed-by: Furquan Shaikh <furquan@chromium.org>
Reviewed-by: Gwendal Grignou <gwendal@google.com>
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Use the ADC reading to match the battery in the table.
BUG=b:126770302
BRANCH=None
TEST=Check the console with matching "Battery Type:" value.
Change-Id: Ibdc9a96b7f15506deda6e87fec49270a7afe3441
Signed-off-by: YH Lin <yueherngl@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/1507320
Commit-Ready: ChromeOS CL Exonerator Bot <chromiumos-cl-exonerator@appspot.gserviceaccount.com>
Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org>
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Add detailed ATL battery information.
BUG=b:128583096
BRANCH=None
TEST=None
Change-Id: Ie790fb2f78544f91b4fb58c5da79dcfdb4a3efde
Signed-off-by: YH Lin <yueherngl@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/1482634
Commit-Ready: ChromeOS CL Exonerator Bot <chromiumos-cl-exonerator@appspot.gserviceaccount.com>
Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org>
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